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- Newsgroups: comp.benchmarks,comp.arch.storage
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- From: milton@teal.csn.org (Milton Scritsmier)
- Subject: Re: Disk performance issues, was IDE vs SCSI-2 using iozone
- Message-ID: <BxyD5p.5z3@csn.org>
- Sender: news@csn.org (news)
- Nntp-Posting-Host: teal.csn.org
- Organization: Colorado SuperNet, Inc.
- References: <sc77t04@zuni.esd.sgi.com> <1992Nov16.031850.9663@igor.tamri.com> <se37imk@zuni.esd.sgi.com>
- Date: Thu, 19 Nov 1992 07:37:00 GMT
- Lines: 45
-
- In article <se37imk@zuni.esd.sgi.com> olson@anchor.esd.sgi.com (Dave Olson) writes:
- >
- >Another reason for not doing it on the host at all. Newer (read, more
- >or less high performance) drives tend to have hardware dedicated to the
- >block translation to sect/head/cyl, etc. Granted that the drives often
- >have rather underpowered CPU's for all that they are asked to do, they
- >usually throw enough hardware at it to overcome the problems. I'm sure
- >this isn't the case for most IDE drives though.
-
- I am familiar with the design of several drives (and have done firmware
- for a couple of drives and controllers), and the only special hardware
- I know of to do the logical to physical mapping is the CPU. In fact,
- while WD's SCSI chip does (or at least did originally) have a divide,
- it is so slow that even WD doesn't use it. While some drives have a
- DSP chip, the communication path between it and the CPU is usually
- so tedious that a divide done on the DSP and sent back to the CPU is
- slower than one done by the CPU itself. Most microcontroller chips
- used on drives these days can do a 32 x 16 divide in less than
- 4 us. That's a crawl by computer CPU standards, but certainly
- doesn't affect command overhead that much.
-
- I also don't consider most drive CPU's to be underpowered. They are
- chosen quite carefully for what they need to do. The problem with
- designing drives is that you have long periods of little to do
- interspersed with short periods of frantic activity. If the
- CPU can't handle the short bursts of activity quick enough, you
- find yourself losing revolutions. As you mentioned, most CPUs have
- support chips to help them deal with much of this problem. A
- well-designed drive architecture thus has plenty of horsepower
- to do caching and sector mapping. After all, microcontroller
- designs have ridden the same technology curve that computer CPUs
- have ridden. If disk drive purchasers required more CPU intensive
- features in their drives, then drive manufacturers would be able
- to find a microcontroller which provided the needed horsepower
- (with the usual mark-up, of course :-).
-
- I also think that many IDE CPUs are just as powerful as the ones on
- SCSI drives. I know that WD, for example, uses the same Intel 80196
- processor on its IDE drives as it does on its SCSI drives. The reasons
- are that most of the real-time interrupt requirements are the same,
- and that the volume discounts a drive manufacturer gets for using the
- same CPU on all of its drives helps offset the fact that in one
- application the CPU may be somewhat overpowered. Besides, 80196's
- are *cheap* these days. :-)
-
-