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- module mux12t4
- title '12 to 4 multiplexer 24 Feb 1984
- Charles Olivier & Dave Pellerin Data I/O Corp. Redmond WA'
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- "declarations
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- IC1m device 'P14H4';
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- a0,a1,a2,a3 pin 1,2,3,4;
- b0,b1,b2,b3 pin 5,6,7,8;
- c0,c1,c2,c3 pin 9,11,12,13;
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- "define select inputs
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- s1,s0 pin 18,19;
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- "define output
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- y0,y1,y2,y3 pin 14,15,16,17;
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- H = [1,1,1,1];
- L = [0,0,0,0];
- X = [.x.,.x.,.x.,.x.];
- select = [s1, s0];
- y = [y3,y2,y1,y0];
- a = [a3,a2,a1,a0];
- b = [b3,b2,b1,b0];
- c = [c3,c2,c1,c0];
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- equations
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- y = (select == 0) & a #
- (select == 1) & b #
- (select == 2) & c #
- (select == 3) & c ;
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- test_vectors ([select, a, b, c] -> y)
- [0 , 1, X, X] -> 1; "select = 0, gates line a to output
- [0 ,10, H, L] -> 10;
- [0 , 5, H, L] -> 5;
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- [1 , H, 3, H] -> 3; "select = 1, gates line b to output
- [1 ,10, 7, H] -> 7;
- [1 , L,15, L] -> 15;
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- [2 , L, L, 8] -> 8; "select = 2, gates lines c to output
- [2 , H, H, 9] -> 9;
- [2 , L, L, 1] -> 1;
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- [3 , H, H, 0] -> 0; "select = 3, gates lines c to output
- [3 , L, L, 9] -> 9;
- [3 , H, L, 0] -> 0;
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- end mux12t4
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