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- Path: sparky!uunet!biosci!agate!usenet.ins.cwru.edu!axa12-slip.DIALIN.CWRU.Edu!ashok
- From: ashok@biochemistry.cwru.edu (Ashok Aiyar)
- Newsgroups: bionet.software,comp.sys.ibm.pc.hardware
- Subject: Re: Correction of RE: PC 80486 ** CORRECTION **
- Message-ID: <ashok.306.728277661@biochemistry.cwru.edu>
- Date: 29 Jan 93 03:21:01 GMT
- References: <C34907EFA03058B2@uclaue.mbi.ucla.edu>
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- Organization: CWRU School of Medicine
- Lines: 30
- NNTP-Posting-Host: axa12-slip.dialin.cwru.edu
-
- In article <C34907EFA03058B2@uclaue.mbi.ucla.edu> DULANEY@UCLAUE.MBI.UCLA.EDU writes:
-
- > I pulled a couple of magazines off my shelf just to make sure that this
- >is correct. (PC Magazine V11 N17 p115-257 and PC World December 1991 p 148-
- >167) Neither was the definative article that I remember reading somewhere
- >but both contain sidebars about the 486SX. Perhaps Ken was thinking of the
- >Cyrix 486SLC, which is essentially a 386SX (16-bit data path) with a 1K
- >cache and psuedoFPU. Whoops, this is longer than I intended.
- > Bottom line. 486SX= 486DX - FPU. 32 bits internally and externally.
-
- Correct. All CPUs in the *Intel* 486 series, including the 486SX, 486DX,
- 486DX2, OverDrive Processor are 32 bits internally and externally.
-
- The Cyrix 486 SLC is basically a 386SX with a 1K internal cache, and is
- 386SX pin compatible -- i.e 16 bit external bus.
-
- The Cyrix 486 DLC is 386DX pin compatible, making it 32 bits internally and
- externally. Neither Cyrix CPU has an internal FPU.
-
- Cyrix reputedly has double-clocked versions of its 486 processors on the
- cards.
-
- Ashok
-
- Follow-ups to: comp.sys.ibm.pc.hardware
- ----------------------------------------------------------------------
- Ashok Aiyar
- Department of Biochemistry
- CWRU School of Medicine
- ----------------------------------------------------------------------
-