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- Newsgroups: sci.electronics
- Path: sparky!uunet!zaphod.mps.ohio-state.edu!magnus.acs.ohio-state.edu!usenet.ins.cwru.edu!gatech!concert!fletcher!kepley
- From: kepley@cs.unca.edu (Brad Kepley)
- Subject: Re: Electronics Design Question
- Message-ID: <1992Dec31.002122.11601@cs.unca.edu>
- Sender: news@cs.unca.edu (Usenet News Adm)
- Organization: University of North Carolina at Asheville
- References: <1238@blue.cis.pitt.edu>
- Date: Thu, 31 Dec 1992 00:21:22 GMT
- Lines: 10
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-
- FPGA's or PLD's are probably not going to save you any money unless
- you count on saving significant board space. FPGA's are particularly
- expensive. By comparing against "loadable" addresses, do you mean
- permanent stored addresses or changeable address? Anyway, a 24 bit
- address could be considered two twelve bit words and you could use
- either two EPROMS (for permanent address comparison) or two RAMS.
- Store the addresses as two twelve bit words in hi and low RAM/ROM and
- let the hi RAM/ROM output two of the bits and the lo RAM/ROM output
- the other two. See what I mean? It'd probably be cheaper than PLD.
-