NetNews Usenet Archive 1992 #31/NN_1992_31.iso/spool/comp/lang/vhdl/605

Text File | 1992-12-21 | 1.8 KB | 40 lines

Newsgroups: comp.lang.vhdl
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From: [e-mail] (Larry Pearlstein)
Subject: What types should one use?
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Date: Mon, 21 Dec 1992 15:55:28 GMT
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I have been wrestling with the problem of choosing types, and would appreciate
any help or comments on the matter.

The most natural type for implementing designs which involve arithmetic operations
is INTEGER, or INTEGER RANGE ...  The most natural type for flags which are tested
in IF statements is BOOLEAN.  Also, it seems most natural to use enumerated types for
designing state machines.

The other option is to implement these quantities using multi-valued logic.  For
instance Synopsys provides arithmetic operations on MVL vectors called SIGNED and
UNSIGNED.  Also, the IEEE defines the MVL vector type STD_LOGIC_VECTOR, for which
there exists 3rd party arithmetic packages.  I'm not sure what could be done to
replace BOOLEANs with MVL.

The question is ... given that I intend to use VHDL to synthesize chips, what is
the best strategy for choosing types?  Is the use of MVL for simulation a virtual
requirement for success, or will gate-level simulation typically turn up any problems
that would have been caught by using MVL?  Is it feasible to use more abstract
types early in the design process (like INTEGER, enumerated, and BOOLEAN), and then
migrate to MVL by using type re-definitions?  How useful/indespensible is MVL for
designing chips?  If it is indespensible, then what place do abstract types have in
chip design?

                        Thanks for any wisdom,

                        Larry Pearlstein
                        [e-mail]