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- Path: sparky!uunet!olivea!veritas!amdcad!dvorak.amd.com!cayman!pteich
- From: pteich@cayman.amd.com (Paul Teich)
- Newsgroups: comp.arch
- Subject: Re: Registerless processor
- Message-ID: <1992Nov22.040840.2648@dvorak.amd.com>
- Date: 22 Nov 92 04:08:40 GMT
- Sender: usenet@dvorak.amd.com (Usenet News)
- Reply-To: pteich@cayman.amd.com (Paul Teich)
- Organization: Advanced Micro Devices, Austin, TX
- Lines: 21
-
- In article <1992Nov13.181654.11692@fcom.cc.utah.edu> (Darren R. Davis) writes:
- | I have been pondering an idea for a machine architecture. A processor
- | that has no registers. I am familiar with some architectures that have
- | done this. My twist on this theme is to have a very large cache on chip
- | for memory locations (effectivelly becoming registers).
-
- Quite recently AT&T has divulged details of its "Hobbit" microprocessor
- (ATT92010) which indicate that it has neither general-purpose registers or
- traditional instruction cache, but instead operates with only a stack cache
- (and an instruction prefetch/decoded instruction pipeline/cache).
-
- Can anyone shed any light on code development issues for the Hobbit, or on its
- performance in executing compiled C code (as it is a direct decendent of the
- CRISP archtecture)?
- --
- Paul R. Teich pteich@cayman.AMD.COM
- Advanced Micro Devices, Inc. Direct 1-512-462-4268
- 5900 E. Ben White Blvd., MS 561 WATS 1-800-538-8450 x54268
- Austin, Texas 78741 FAX 1-512-462-4756
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