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Text File  |  1995-09-14  |  53.6 KB  |  1,546 lines
  1. // 
  2. //  Copyright (c) 1995 SPEA Software AG All Rights Reserved
  3. // 
  4. //# @(#)figlv78.sdd  3.00   95/06/08 SPEA   (BIOS 1.01)
  5. // 
  6. //  figlv78.sdd  -  SVPMI File for SPEA FIRE GL
  7. // 
  8. //  1600x1200x16 76.6 / 61  kHz / Hz
  9. //  1600x1200x8  76.6 / 61  kHz / Hz
  10. //  1280x1024x32 75.3 / 70  kHz / Hz
  11. //  1280x1024x16 75.3 / 70  kHz / Hz
  12. //  1280x1024x8  75.3 / 70  kHz / Hz
  13. //  1152x864x8   68.9 / 75  kHz / Hz
  14. //  1024x768x32  72.7 / 91  kHz / Hz
  15. //  1024x768x16  72.7 / 91  kHz / Hz
  16. //  1024x768x8   72.7 / 91  kHz / Hz
  17. //  800x600x32   64.0 /100  kHz / Hz
  18. //  800x600x16   64.0 /100  kHz / Hz
  19. //  800x600x8    64.0 /100  kHz / Hz
  20. //  640x480x32   52.5 /100  kHz / Hz
  21. //  640x480x16   52.5 /100  kHz / Hz
  22. //  640x480x8    52.5 /100  kHz / Hz
  23. //  640x400x8    31.4 / 70  kHz / Hz
  24.  
  25. [VERSION]
  26.  1.0;
  27.  
  28. [ACTIVE_ADAPTER]
  29.  SPEA FIRE GL (bis 78 kHz Multiscan);
  30.  
  31. [ADAPTER]
  32.  SPEA FIRE GL (bis 78 kHz Multiscan);
  33.  
  34. [ADAPTER_INFO]
  35.  BoardType = VGA;
  36.  SaveSize = 100;
  37.  PaletteSize = 768;
  38.  //# MemorySize = 4096;
  39.  
  40. // ***********************************
  41. // 0x007E
  42. // ***********************************
  43. [MODE]
  44.  0x007E;
  45. [MODEINFO]
  46.     ModeAttributes      = 0x1b;
  47.     WinAAttributes      = 7;
  48.     WinBAttributes      = 0;
  49.     WinAGranularity     = 64;
  50.     WinBGranularity     = 64;
  51.     WinASize            = 64;
  52.     WinBSize            = 64;
  53.     WinABase            = 0xa0000;
  54.     WinBBase            = 0xa0000;
  55.     BytesPerScanline    = 3200;
  56.     XResolution         = 1600;
  57.     YResolution         = 1200;
  58.     XCharSize           = 8;
  59.     YCharSize           = 16;
  60.     Colormodel          = 2;
  61.     BitsPerPixel        = 16;
  62.     NumberOfColors      = 65536;
  63.     BitsRGB             = 6;
  64.     NumberOfBanks       = 1;
  65.     BankSize            = 0;
  66.     MemoryModel         = 0x6;
  67.     NumberOfImagePages  = 0;
  68.  
  69. [SETMODE]
  70.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  71.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  72.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  73.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  74.  
  75.  r0  = 0x7e; r1  = 0x64; r2  = 0x62; r3  = 0x01; r4  = 0x67;
  76.  r5  = 0x11; r6  = 0xe8; r7  = 0x00; r8  = 0x00; r9  = 0x00;
  77.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  78.  r15 = 0x00; r16 = 0xc0; r17 = 0x8c; r18 = 0xaf; r19 = 0x90;
  79.  r20 = 0x00; r21 = 0xaf; r22 = 0x00; r23 = 0xa3; r24 = 0xaf;
  80.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  81.  
  82.  outb(0x3d4,0x3b);outb(0x3d5,0x77);
  83.  outb(0x3d4,0x34);outb(0x3d5,0x10);
  84.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  85.  outb(0x3d4,0x5e);outb(0x3d5,0x57);
  86.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  87.  outb(0x3d4,0x6d);outb(0x3d5,0x14);
  88.  
  89.  
  90. // TVP3026 clock synthesis
  91. // N/M/P value: fc 3a b0, DCLK = 160363616 Hz
  92.  outb(0x3d4,0x55);
  93. // only p value
  94.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  95. // pixel clock
  96.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  97. // loop clock
  98.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  99.  
  100. // program pixel clock
  101.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  102.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfc);
  103.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  104.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x30);
  105.  
  106. // program loop clock
  107.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  108.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  109.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  110.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf0);
  111.  
  112. // enable pixel clock (bit 7)
  113.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb0);
  114.  
  115. // divider for pixel frequency
  116.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x38);
  117.  
  118. // set index for PLL to status reg (R_ONLY)
  119.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  120.  outb(0x3d5,0x00);
  121.  
  122. // Bit 2&3 set enable loading of DCLK parameters
  123.  outb(0x3c2,0x2f);
  124.  
  125. //# [SPEA]
  126.  //# SerialWord = 0xfc3ab0;
  127.  //# DacMode = 0x5;
  128.  //# Cr42 = 0x52;
  129.  
  130. // ***********************************
  131. // 0x007C
  132. // ***********************************
  133. [MODE]
  134.  0x007C;
  135. [MODEINFO]
  136.     ModeAttributes      = 0x1b;
  137.     WinAAttributes      = 7;
  138.     WinBAttributes      = 0;
  139.     WinAGranularity     = 64;
  140.     WinBGranularity     = 64;
  141.     WinASize            = 64;
  142.     WinBSize            = 64;
  143.     WinABase            = 0xa0000;
  144.     WinBBase            = 0xa0000;
  145.     BytesPerScanline    = 1600;
  146.     XResolution         = 1600;
  147.     YResolution         = 1200;
  148.     XCharSize           = 8;
  149.     YCharSize           = 16;
  150.     Colormodel          = 1;
  151.     BitsPerPixel        = 8;
  152.     NumberOfColors      = 256;
  153.     BitsRGB             = 6;
  154.     NumberOfBanks       = 1;
  155.     BankSize            = 0;
  156.     MemoryModel         = 0x4;
  157.     NumberOfImagePages  = 0;
  158.  
  159. [SETMODE]
  160.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  161.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  162.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  163.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  164.  
  165.  r0  = 0x7e; r1  = 0x64; r2  = 0x62; r3  = 0x01; r4  = 0x67;
  166.  r5  = 0x11; r6  = 0xe8; r7  = 0x00; r8  = 0x00; r9  = 0x00;
  167.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  168.  r15 = 0x00; r16 = 0xc0; r17 = 0x8c; r18 = 0xaf; r19 = 0xc8;
  169.  r20 = 0x00; r21 = 0xaf; r22 = 0x00; r23 = 0xa3; r24 = 0xaf;
  170.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  171.  
  172.  outb(0x3d4,0x3b);outb(0x3d5,0x77);
  173.  outb(0x3d4,0x34);outb(0x3d5,0x10);
  174.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  175.  outb(0x3d4,0x5e);outb(0x3d5,0x57);
  176.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  177.  outb(0x3d4,0x6d);outb(0x3d5,0x12);
  178.  
  179.  
  180. // TVP3026 clock synthesis
  181. // N/M/P value: fc 3a b0, DCLK = 160363616 Hz
  182.  outb(0x3d4,0x55);
  183. // only p value
  184.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  185. // pixel clock
  186.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  187. // loop clock
  188.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  189.  
  190. // program pixel clock
  191.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  192.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfc);
  193.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  194.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x30);
  195.  
  196. // program loop clock
  197.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  198.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  199.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  200.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf0);
  201.  
  202. // enable pixel clock (bit 7)
  203.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb0);
  204.  
  205. // divider for pixel frequency
  206.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x39);
  207.  
  208. // set index for PLL to status reg (R_ONLY)
  209.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  210.  outb(0x3d5,0x00);
  211.  
  212. // Bit 2&3 set enable loading of DCLK parameters
  213.  outb(0x3c2,0x2f);
  214.  
  215. //# [SPEA]
  216.  //# SerialWord = 0xfc3ab0;
  217.  //# DacMode = 0x2;
  218.  //# Cr42 = 0x52;
  219.  
  220. // ***********************************
  221. // 0x007B
  222. // ***********************************
  223. [MODE]
  224.  0x007B;
  225. [MODEINFO]
  226.     ModeAttributes      = 0x1a;
  227.     WinAAttributes      = 7;
  228.     WinBAttributes      = 0;
  229.     WinAGranularity     = 64;
  230.     WinBGranularity     = 64;
  231.     WinASize            = 64;
  232.     WinBSize            = 64;
  233.     WinABase            = 0xa0000;
  234.     WinBBase            = 0xa0000;
  235.     BytesPerScanline    = 5120;
  236.     XResolution         = 1280;
  237.     YResolution         = 1024;
  238.     XCharSize           = 8;
  239.     YCharSize           = 16;
  240.     Colormodel          = 2;
  241.     BitsPerPixel        = 32;
  242.     NumberOfColors      = 16777216;
  243.     BitsRGB             = 6;
  244.     RedSize             = 8;
  245.     RedPosition         = 16;
  246.     GreenSize           = 8;
  247.     GreenPosition       = 8;
  248.     BlueSize            = 8;
  249.     BluePosition        = 0;
  250.     ReservedSize        = 8;
  251.     ReservedPosition    = 24;
  252.     NumberOfBanks       = 1;
  253.     BankSize            = 0;
  254.     MemoryModel         = 0x6;
  255.     NumberOfImagePages  = 0;
  256.  
  257. [SETMODE]
  258.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  259.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  260.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  261.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  262.  
  263.  r0  = 0x64; r1  = 0x4f; r2  = 0x50; r3  = 0x87; r4  = 0x53;
  264.  r5  = 0x96; r6  = 0x2b; r7  = 0x4a; r8  = 0x00; r9  = 0x60;
  265.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  266.  r15 = 0x00; r16 = 0x07; r17 = 0x8c; r18 = 0xff; r19 = 0x80;
  267.  r20 = 0x00; r21 = 0xff; r22 = 0x2b; r23 = 0xe3; r24 = 0xff;
  268.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  269.  
  270.  outb(0x3d4,0x3b);outb(0x3d5,0x5D);
  271.  outb(0x3d4,0x34);outb(0x3d5,0x10);
  272.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  273.  outb(0x3d4,0x5e);outb(0x3d5,0x51);
  274.  outb(0x3d4,0x67);outb(0x3d5,0x00);
  275.  outb(0x3d4,0x6d);outb(0x3d5,0x01);
  276.  
  277.  
  278. // TVP3026 clock synthesis
  279. // N/M/P value: ee 2c b0, DCLK = 126.60 MHz
  280.  outb(0x3d4,0x55);
  281. // only p value
  282.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  283. // pixel clock
  284.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  285. // loop clock
  286.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  287.  
  288. // program pixel clock
  289.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  290.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xee);
  291.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x2c);
  292.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x30);
  293.  
  294. // program loop clock
  295.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  296.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xF9);
  297.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  298.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf0);
  299.  
  300. // enable pixel clock (bit 7)
  301.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb0);
  302.  
  303. // divider for pixel frequency
  304.  //outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x38);
  305.  
  306. // set index for PLL to status reg (R_ONLY)
  307.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  308.  outb(0x3d5,0x00);
  309.  
  310. // Bit 2&3 set enable loading of DCLK parameters
  311.  outb(0x3c2,0xef);
  312.  
  313. //# [SPEA]
  314.  //# SerialWord = 0xee2cb0;
  315.  //# DacMode = 0x7;
  316.  //# Cr42 = 0x4e;
  317.  
  318. // ***********************************
  319. // 0x007A
  320. // ***********************************
  321. [MODE]
  322.  0x007A;
  323. [MODEINFO]
  324.     ModeAttributes      = 0x1a;
  325.     WinAAttributes      = 7;
  326.     WinBAttributes      = 0;
  327.     WinAGranularity     = 64;
  328.     WinBGranularity     = 64;
  329.     WinASize            = 64;
  330.     WinBSize            = 64;
  331.     WinABase            = 0xa0000;
  332.     WinBBase            = 0xa0000;
  333.     BytesPerScanline    = 2560;
  334.     XResolution         = 1280;
  335.     YResolution         = 1024;
  336.     XCharSize           = 8;
  337.     YCharSize           = 16;
  338.     Colormodel          = 2;
  339.     BitsPerPixel        = 16;
  340.     NumberOfColors      = 65536;
  341.     BitsRGB             = 6;
  342.     RedSize             = 5;
  343.     RedPosition         = 11;
  344.     GreenSize           = 6;
  345.     GreenPosition       = 5;
  346.     BlueSize            = 5;
  347.     BluePosition        = 0;
  348.     ReservedSize        = 0;
  349.     ReservedPosition    = 0;
  350.     NumberOfBanks       = 1;
  351.     BankSize            = 0;
  352.     MemoryModel         = 0x6;
  353.     NumberOfImagePages  = 0;
  354.  
  355. [SETMODE]
  356.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  357.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  358.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  359.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  360.  
  361.  r0  = 0x64; r1  = 0x4f; r2  = 0x50; r3  = 0x87; r4  = 0x53;
  362.  r5  = 0x96; r6  = 0x2b; r7  = 0x4a; r8  = 0x00; r9  = 0x60;
  363.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  364.  r15 = 0x00; r16 = 0x07; r17 = 0x8c; r18 = 0xff; r19 = 0x40;
  365.  r20 = 0x00; r21 = 0xff; r22 = 0x2b; r23 = 0xe3; r24 = 0xff;
  366.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  367.  
  368.  outb(0x3d4,0x3b);outb(0x3d5,0x5D);
  369.  outb(0x3d4,0x34);outb(0x3d5,0x10);
  370.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  371.  outb(0x3d4,0x5e);outb(0x3d5,0x51);
  372.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  373.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  374.  
  375.  
  376. // TVP3026 clock synthesis
  377. // N/M/P value: ee 2c b0, DCLK = 126.60 MHz
  378.  outb(0x3d4,0x55);
  379. // only p value
  380.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  381. // pixel clock
  382.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  383. // loop clock
  384.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  385.  
  386. // program pixel clock
  387.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  388.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xee);
  389.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x2c);
  390.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x30);
  391.  
  392. // program loop clock
  393.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  394.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  395.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  396.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf0);
  397.  
  398. // enable pixel clock (bit 7)
  399.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb0);
  400.  
  401. // divider for pixel frequency
  402.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x28);
  403.  
  404. // set index for PLL to status reg (R_ONLY)
  405.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  406.  outb(0x3d5,0x00);
  407.  
  408. // Bit 2&3 set enable loading of DCLK parameters
  409.  outb(0x3c2,0xef);
  410.  
  411. //# [SPEA]
  412.  //# SerialWord = 0xee2cb0;
  413.  //# DacMode = 0x5;
  414.  //# Cr42 = 0x4e;
  415.  
  416. // ***********************************
  417. // 0x006F
  418. // ***********************************
  419. [MODE]
  420.  0x006F;
  421. [MODEINFO]
  422.     ModeAttributes      = 0x1b;
  423.     WinAAttributes      = 7;
  424.     WinBAttributes      = 0;
  425.     WinAGranularity     = 64;
  426.     WinBGranularity     = 64;
  427.     WinASize            = 64;
  428.     WinBSize            = 64;
  429.     WinABase            = 0xa0000;
  430.     WinBBase            = 0xa0000;
  431.     BytesPerScanline    = 1280;
  432.     XResolution         = 1280;
  433.     YResolution         = 1024;
  434.     XCharSize           = 8;
  435.     YCharSize           = 16;
  436.     Colormodel          = 1;
  437.     BitsPerPixel        = 8;
  438.     NumberOfColors      = 256;
  439.     BitsRGB             = 6;
  440.     NumberOfBanks       = 1;
  441.     BankSize            = 0;
  442.     MemoryModel         = 0x4;
  443.     NumberOfImagePages  = 0;
  444.  
  445. [SETMODE]
  446.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  447.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  448.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  449.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  450.  
  451.  r0  = 0x64; r1  = 0x4f; r2  = 0x50; r3  = 0x87; r4  = 0x53;
  452.  r5  = 0x96; r6  = 0x2b; r7  = 0x4a; r8  = 0x00; r9  = 0x60;
  453.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  454.  r15 = 0x00; r16 = 0x07; r17 = 0x8c; r18 = 0xff; r19 = 0xa0;
  455.  r20 = 0x00; r21 = 0xff; r22 = 0x2b; r23 = 0xe3; r24 = 0xff;
  456.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  457.  
  458.  outb(0x3d4,0x3b);outb(0x3d5,0x5D);
  459.  outb(0x3d4,0x34);outb(0x3d5,0x10);
  460.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  461.  outb(0x3d4,0x5e);outb(0x3d5,0x51);
  462.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  463.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  464.  
  465.  
  466. // TVP3026 clock synthesis
  467. // N/M/P value: ee 2c b0, DCLK = 126.60 MHz
  468.  outb(0x3d4,0x55);
  469. // only p value
  470.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  471. // pixel clock
  472.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  473. // loop clock
  474.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  475.  
  476. // program pixel clock
  477.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  478.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xee);
  479.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x2c);
  480.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x30);
  481.  
  482. // program loop clock
  483.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  484.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  485.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  486.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf0);
  487.  
  488. // enable pixel clock (bit 7)
  489.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb0);
  490.  
  491. // divider for pixel frequency
  492.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x29);
  493.  
  494. // set index for PLL to status reg (R_ONLY)
  495.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  496.  outb(0x3d5,0x00);
  497.  
  498. // Bit 2&3 set enable loading of DCLK parameters
  499.  outb(0x3c2,0xef);
  500.  
  501. //# [SPEA]
  502.  //# SerialWord = 0xee2cb0;
  503.  //# DacMode = 0x2;
  504.  //# Cr42 = 0x4e;
  505.  
  506. // ***********************************
  507. // 0x004E
  508. // ***********************************
  509. [MODE]
  510.  0x004E;
  511. [MODEINFO]
  512.     ModeAttributes      = 0x1b;
  513.     WinAAttributes      = 7;
  514.     WinBAttributes      = 0;
  515.     WinAGranularity     = 64;
  516.     WinBGranularity     = 64;
  517.     WinASize            = 64;
  518.     WinBSize            = 64;
  519.     WinABase            = 0xa0000;
  520.     WinBBase            = 0xa0000;
  521.     BytesPerScanline    = 1152;
  522.     XResolution         = 1152;
  523.     YResolution         = 864;
  524.     XCharSize           = 8;
  525.     YCharSize           = 16;
  526.     Colormodel          = 1;
  527.     BitsPerPixel        = 8;
  528.     NumberOfColors      = 256;
  529.     BitsRGB             = 6;
  530.     NumberOfBanks       = 1;
  531.     BankSize            = 0;
  532.     MemoryModel         = 0x4;
  533.     NumberOfImagePages  = 0;
  534.  
  535. [SETMODE]
  536.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  537.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  538.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  539.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  540.  
  541.  r0  = 0x56; r1  = 0x47; r2  = 0x48; r3  = 0x19; r4  = 0x4c;
  542.  r5  = 0x13; r6  = 0x94; r7  = 0xff; r8  = 0x00; r9  = 0x60;
  543.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  544.  r15 = 0x00; r16 = 0x65; r17 = 0x88; r18 = 0x5f; r19 = 0x90;
  545.  r20 = 0x00; r21 = 0x5f; r22 = 0x94; r23 = 0xeb; r24 = 0xff;
  546.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  547.  
  548.  outb(0x3d4,0x3b);outb(0x3d5,0x4e);
  549.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  550.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  551.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  552.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  553.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  554.  
  555.  
  556. // TVP3026 clock synthesis
  557. // N/M/P value: fd 3a b1, DCLK = 100.23 MHz
  558.  outb(0x3d4,0x55);
  559. // only p value
  560.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  561. // pixel clock
  562.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  563. // loop clock
  564.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  565.  
  566. // program pixel clock
  567.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  568.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfd);
  569.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  570.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  571.  
  572. // program loop clock
  573.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  574.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  575.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  576.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  577.  
  578. // enable pixel clock (bit 7)
  579.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  580.  
  581. // divider for pixel frequency
  582.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x29);
  583.  
  584. // set index for PLL to status reg (R_ONLY)
  585.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  586.  outb(0x3d5,0x00);
  587.  
  588. // Bit 2&3 set enable loading of DCLK parameters
  589.  outb(0x3c2,0xef);
  590.  
  591. //# [SPEA]
  592.  //# SerialWord = 0xfd3ab1;
  593.  //# DacMode = 0x2;
  594.  //# Cr42 = 0x8c;
  595.  
  596. // ***********************************
  597. // 0x0078
  598. // ***********************************
  599. [MODE]
  600.  0x0078;
  601. [MODEINFO]
  602.     ModeAttributes      = 0x1a;
  603.     WinAAttributes      = 7;
  604.     WinBAttributes      = 0;
  605.     WinAGranularity     = 64;
  606.     WinBGranularity     = 64;
  607.     WinASize            = 64;
  608.     WinBSize            = 64;
  609.     WinABase            = 0xa0000;
  610.     WinBBase            = 0xa0000;
  611.     BytesPerScanline    = 4096;
  612.     XResolution         = 1024;
  613.     YResolution         = 768;
  614.     XCharSize           = 8;
  615.     YCharSize           = 16;
  616.     Colormodel          = 2;
  617.     BitsPerPixel        = 32;
  618.     NumberOfColors      = 16777216;
  619.     BitsRGB             = 6;
  620.     RedSize             = 8;
  621.     RedPosition         = 16;
  622.     GreenSize           = 8;
  623.     GreenPosition       = 8;
  624.     BlueSize            = 8;
  625.     BluePosition        = 0;
  626.     ReservedSize        = 8;
  627.     ReservedPosition    = 24;
  628.     NumberOfBanks       = 1;
  629.     BankSize            = 0;
  630.     MemoryModel         = 0x6;
  631.     NumberOfImagePages  = 0;
  632.  
  633. [SETMODE]
  634.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  635.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  636.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  637.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  638.  
  639.  r0  = 0x51; r1  = 0x3f; r2  = 0x40; r3  = 0x14; r4  = 0x43;
  640.  r5  = 0x0a; r6  = 0x21; r7  = 0xf5; r8  = 0x00; r9  = 0x60;
  641.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  642.  r15 = 0x00; r16 = 0x00; r17 = 0x83; r18 = 0xff; r19 = 0x00;
  643.  r20 = 0x00; r21 = 0xff; r22 = 0x21; r23 = 0xeb; r24 = 0xff;
  644.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  645.  
  646.  outb(0x3d4,0x3b);outb(0x3d5,0x48);
  647.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  648.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  649.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  650.  outb(0x3d4,0x67);outb(0x3d5,0x00);
  651.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  652.  
  653.  
  654. // TVP3026 clock synthesis
  655. // N/M/P value: fd 3a b1, DCLK = 100.23 MHz
  656.  outb(0x3d4,0x55);
  657. // only p value
  658.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  659. // pixel clock
  660.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  661. // loop clock
  662.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  663.  
  664. // program pixel clock
  665.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  666.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfd);
  667.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  668.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  669.  
  670. // program loop clock
  671.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  672.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf9);
  673.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  674.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  675.  
  676. // enable pixel clock (bit 7)
  677.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  678.  
  679. // divider for pixel frequency
  680.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x28);
  681.  
  682. // set index for PLL to status reg (R_ONLY)
  683.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  684.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x06);
  685.  outb(0x3d5,0x00);
  686.  
  687. // Bit 2&3 set enable loading of DCLK parameters
  688.  outb(0x3c2,0xef);
  689.  
  690. //# [SPEA]
  691.  //# SerialWord = 0xfd3ab1;
  692.  //# DacMode = 0x7;
  693.  //# Cr42 = 0x49;
  694.  
  695. // ***********************************
  696. // 0x0077
  697. // ***********************************
  698. [MODE]
  699.  0x0077;
  700. [MODEINFO]
  701.     ModeAttributes      = 0x1b;
  702.     WinAAttributes      = 7;
  703.     WinBAttributes      = 0;
  704.     WinAGranularity     = 64;
  705.     WinBGranularity     = 64;
  706.     WinASize            = 64;
  707.     WinBSize            = 64;
  708.     WinABase            = 0xa0000;
  709.     WinBBase            = 0xa0000;
  710.     BytesPerScanline    = 2048;
  711.     XResolution         = 1024;
  712.     YResolution         = 768;
  713.     XCharSize           = 8;
  714.     YCharSize           = 16;
  715.     Colormodel          = 2;
  716.     BitsPerPixel        = 16;
  717.     NumberOfColors      = 65536;
  718.     BitsRGB             = 6;
  719.     RedSize             = 5;
  720.     RedPosition         = 11;
  721.     GreenSize           = 6;
  722.     GreenPosition       = 5;
  723.     BlueSize            = 5;
  724.     BluePosition        = 0;
  725.     ReservedSize        = 0;
  726.     ReservedPosition    = 0;
  727.     NumberOfBanks       = 1;
  728.     BankSize            = 0;
  729.     MemoryModel         = 0x6;
  730.     NumberOfImagePages  = 0;
  731.  
  732. [SETMODE]
  733.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  734.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  735.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  736.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  737.  
  738.  r0  = 0x51; r1  = 0x3f; r2  = 0x40; r3  = 0x14; r4  = 0x43;
  739.  r5  = 0x0a; r6  = 0x21; r7  = 0xf5; r8  = 0x00; r9  = 0x60;
  740.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  741.  r15 = 0x00; r16 = 0x00; r17 = 0x83; r18 = 0xff; r19 = 0x00;
  742.  r20 = 0x00; r21 = 0xff; r22 = 0x21; r23 = 0xeb; r24 = 0xff;
  743.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  744.  
  745.  outb(0x3d4,0x3b);outb(0x3d5,0x48);
  746.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  747.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  748.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  749.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  750.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  751.  
  752.  
  753. // TVP3026 clock synthesis
  754. // N/M/P value: fd 3a b1, DCLK = 100.23 MHz
  755.  outb(0x3d4,0x55);
  756. // only p value
  757.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  758. // pixel clock
  759.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  760. // loop clock
  761.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  762.  
  763. // program pixel clock
  764.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  765.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfd);
  766.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  767.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  768.  
  769. // program loop clock
  770.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  771.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  772.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  773.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  774.  
  775. // enable pixel clock (bit 7)
  776.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  777.  
  778. // divider for pixel frequency
  779.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x28);
  780.  
  781. // set index for PLL to status reg (R_ONLY)
  782.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  783.  outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x07);
  784.  outb(0x3d5,0x00);
  785.  
  786. // Bit 2&3 set enable loading of DCLK parameters
  787.  outb(0x3c2,0xef);
  788.  
  789. //# [SPEA]
  790.  //# SerialWord = 0xfd3ab1;
  791.  //# DacMode = 0x5;
  792.  //# Cr42 = 0x89;
  793.  
  794. // ***********************************
  795. // 0x006D
  796. // ***********************************
  797. [MODE]
  798.  0x006D;
  799. [MODEINFO]
  800.     ModeAttributes      = 0x1b;
  801.     WinAAttributes      = 7;
  802.     WinBAttributes      = 0;
  803.     WinAGranularity     = 64;
  804.     WinBGranularity     = 64;
  805.     WinASize            = 64;
  806.     WinBSize            = 64;
  807.     WinABase            = 0xa0000;
  808.     WinBBase            = 0xa0000;
  809.     BytesPerScanline    = 1024;
  810.     XResolution         = 1024;
  811.     YResolution         = 768;
  812.     XCharSize           = 8;
  813.     YCharSize           = 16;
  814.     Colormodel          = 1;
  815.     BitsPerPixel        = 8;
  816.     NumberOfColors      = 256;
  817.     BitsRGB             = 6;
  818.     NumberOfBanks       = 1;
  819.     BankSize            = 0;
  820.     MemoryModel         = 0x4;
  821.     NumberOfImagePages  = 0;
  822.  
  823. [SETMODE]
  824.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  825.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  826.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  827.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  828.  
  829.  r0  = 0x51; r1  = 0x3f; r2  = 0x40; r3  = 0x14; r4  = 0x43;
  830.  r5  = 0x0a; r6  = 0x21; r7  = 0xf5; r8  = 0x00; r9  = 0x60;
  831.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  832.  r15 = 0x00; r16 = 0x00; r17 = 0x83; r18 = 0xff; r19 = 0x80;
  833.  r20 = 0x00; r21 = 0xff; r22 = 0x21; r23 = 0xeb; r24 = 0xff;
  834.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  835.  
  836.  outb(0x3d4,0x3b);outb(0x3d5,0x48);
  837.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  838.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  839.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  840.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  841.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  842.  
  843.  
  844. // TVP3026 clock synthesis
  845. // N/M/P value: fd 3a b1, DCLK = 100.23 MHz
  846.  outb(0x3d4,0x55);
  847. // only p value
  848.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  849. // pixel clock
  850.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  851. // loop clock
  852.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  853.  
  854. // program pixel clock
  855.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  856.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfd);
  857.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  858.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  859.  
  860. // program loop clock
  861.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  862.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  863.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  864.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  865.  
  866. // enable pixel clock (bit 7)
  867.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  868.  
  869. // divider for pixel frequency
  870.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x29);
  871.  
  872. // set index for PLL to status reg (R_ONLY)
  873.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  874.  outb(0x3d5,0x00);
  875.  
  876. // Bit 2&3 set enable loading of DCLK parameters
  877.  outb(0x3c2,0xef);
  878.  
  879. //# [SPEA]
  880.  //# SerialWord = 0xfd3ab1;
  881.  //# DacMode = 0x2;
  882.  //# Cr42 = 0x89;
  883.  
  884. // ***********************************
  885. // 0x0075
  886. // ***********************************
  887. [MODE]
  888.  0x0075;
  889. [MODEINFO]
  890.     ModeAttributes      = 0x1b;
  891.     WinAAttributes      = 7;
  892.     WinBAttributes      = 0;
  893.     WinAGranularity     = 64;
  894.     WinBGranularity     = 64;
  895.     WinASize            = 64;
  896.     WinBSize            = 64;
  897.     WinABase            = 0xa0000;
  898.     WinBBase            = 0xa0000;
  899.     BytesPerScanline    = 3200;
  900.     XResolution         = 800;
  901.     YResolution         = 600;
  902.     XCharSize           = 8;
  903.     YCharSize           = 8;
  904.     Colormodel          = 2;
  905.     BitsPerPixel        = 32;
  906.     NumberOfColors      = 16777216;
  907.     BitsRGB             = 6;
  908.     RedSize             = 8;
  909.     RedPosition         = 16;
  910.     GreenSize           = 8;
  911.     GreenPosition       = 8;
  912.     BlueSize            = 8;
  913.     BluePosition        = 0;
  914.     ReservedSize        = 8;
  915.     ReservedPosition    = 24;
  916.     NumberOfBanks       = 1;
  917.     BankSize            = 0;
  918.     MemoryModel         = 0x6;
  919.     NumberOfImagePages  = 0;
  920.  
  921. [SETMODE]
  922.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  923.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  924.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  925.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  926.  
  927.  r0  = 0x41; r1  = 0x32; r2  = 0x30; r3  = 0x04; r4  = 0x37;
  928.  r5  = 0x00; r6  = 0x7e; r7  = 0xf0; r8  = 0x00; r9  = 0x60;
  929.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  930.  r15 = 0x00; r16 = 0x5f; r17 = 0x89; r18 = 0x57; r19 = 0x90;
  931.  r20 = 0x00; r21 = 0x57; r22 = 0x00; r23 = 0xe3; r24 = 0xff;
  932.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  933.  
  934.  outb(0x3d4,0x3b);outb(0x3d5,0x36);
  935.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  936.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  937.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  938.  outb(0x3d4,0x67);outb(0x3d5,0x00);
  939.  outb(0x3d4,0x6d);outb(0x3d5,0x07);
  940.  
  941.  
  942. // TVP3026 clock synthesis
  943. // N/M/P value: a6 1f b1, DCLK = 72.12 MHz
  944.  outb(0x3d4,0x55);
  945. // only p value
  946.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  947. // pixel clock
  948.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  949. // loop clock
  950.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  951.  
  952. // program pixel clock
  953.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  954.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xa6);
  955.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x1f);
  956.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  957.  
  958. // program loop clock
  959.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  960.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf9);
  961.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  962.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  963.  
  964. // enable pixel clock (bit 7)
  965.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  966.  
  967. // divider for pixel frequency
  968.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x28);
  969.  
  970. // set index for PLL to status reg (R_ONLY)
  971.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  972.  outb(0x3d5,0x00);
  973.  
  974. // Bit 2&3 set enable loading of DCLK parameters
  975.  outb(0x3c2,0x2f);
  976.  
  977. //# [SPEA]
  978.  //# SerialWord = 0xa61fb1;
  979.  //# DacMode = 0x7;
  980.  //# Cr42 = 0x84;
  981.  
  982. // ***********************************
  983. // 0x0074
  984. // ***********************************
  985. [MODE]
  986.  0x0074;
  987. [MODEINFO]
  988.     ModeAttributes      = 0x1b;
  989.     WinAAttributes      = 7;
  990.     WinBAttributes      = 0;
  991.     WinAGranularity     = 64;
  992.     WinBGranularity     = 64;
  993.     WinASize            = 64;
  994.     WinBSize            = 64;
  995.     WinABase            = 0xa0000;
  996.     WinBBase            = 0xa0000;
  997.     BytesPerScanline    = 1600;
  998.     XResolution         = 800;
  999.     YResolution         = 600;
  1000.     XCharSize           = 8;
  1001.     YCharSize           = 8;
  1002.     Colormodel          = 2;
  1003.     BitsPerPixel        = 16;
  1004.     NumberOfColors      = 65536;
  1005.     BitsRGB             = 6;
  1006.     RedSize             = 5;
  1007.     RedPosition         = 11;
  1008.     GreenSize           = 6;
  1009.     GreenPosition       = 5;
  1010.     BlueSize            = 5;
  1011.     BluePosition        = 0;
  1012.     ReservedSize        = 0;
  1013.     ReservedPosition    = 0;
  1014.     NumberOfBanks       = 1;
  1015.     BankSize            = 0;
  1016.     MemoryModel         = 0x6;
  1017.     NumberOfImagePages  = 0;
  1018.  
  1019. [SETMODE]
  1020.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1021.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1022.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1023.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1024.  
  1025.  r0  = 0x41; r1  = 0x32; r2  = 0x30; r3  = 0x04; r4  = 0x37;
  1026.  r5  = 0x00; r6  = 0x7e; r7  = 0xf0; r8  = 0x00; r9  = 0x60;
  1027.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1028.  r15 = 0x00; r16 = 0x5f; r17 = 0x89; r18 = 0x57; r19 = 0xc8;
  1029.  r20 = 0x00; r21 = 0x57; r22 = 0x00; r23 = 0xe3; r24 = 0xff;
  1030.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1031.  
  1032.  outb(0x3d4,0x3b);outb(0x3d5,0x36);
  1033.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1034.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1035.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1036.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  1037.  outb(0x3d4,0x6d);outb(0x3d5,0x03);
  1038.  
  1039.  
  1040. // TVP3026 clock synthesis
  1041. // N/M/P value: a6 1f b1, DCLK = 72.12 MHz
  1042.  outb(0x3d4,0x55);
  1043. // only p value
  1044.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1045. // pixel clock
  1046.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1047. // loop clock
  1048.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1049.  
  1050. // program pixel clock
  1051.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1052.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xa6);
  1053.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x1f);
  1054.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  1055.  
  1056. // program loop clock
  1057.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1058.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  1059.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1060.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  1061.  
  1062. // enable pixel clock (bit 7)
  1063.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  1064.  
  1065. // divider for pixel frequency
  1066.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x28);
  1067.  
  1068. // set index for PLL to status reg (R_ONLY)
  1069.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1070.  outb(0x3d5,0x00);
  1071.  
  1072. // Bit 2&3 set enable loading of DCLK parameters
  1073.  outb(0x3c2,0x2f);
  1074.  
  1075. //# [SPEA]
  1076.  //# SerialWord = 0xa61fb1;
  1077.  //# DacMode = 0x5;
  1078.  //# Cr42 = 0xc4;
  1079.  
  1080. // ***********************************
  1081. // 0x006B
  1082. // ***********************************
  1083. [MODE]
  1084.  0x006B;
  1085. [MODEINFO]
  1086.     ModeAttributes      = 0x1b;
  1087.     WinAAttributes      = 7;
  1088.     WinBAttributes      = 0;
  1089.     WinAGranularity     = 64;
  1090.     WinBGranularity     = 64;
  1091.     WinASize            = 64;
  1092.     WinBSize            = 64;
  1093.     WinABase            = 0xa0000;
  1094.     WinBBase            = 0xa0000;
  1095.     BytesPerScanline    = 800;
  1096.     XResolution         = 800;
  1097.     YResolution         = 600;
  1098.     XCharSize           = 8;
  1099.     YCharSize           = 8;
  1100.     Colormodel          = 1;
  1101.     BitsPerPixel        = 8;
  1102.     NumberOfColors      = 256;
  1103.     BitsRGB             = 6;
  1104.     NumberOfBanks       = 1;
  1105.     BankSize            = 0;
  1106.     MemoryModel         = 0x4;
  1107.     NumberOfImagePages  = 0;
  1108.  
  1109. [SETMODE]
  1110.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1111.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1112.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1113.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1114.  
  1115.  r0  = 0x41; r1  = 0x33; r2  = 0x30; r3  = 0x04; r4  = 0x37;
  1116.  r5  = 0x00; r6  = 0x7e; r7  = 0xf0; r8  = 0x00; r9  = 0x60;
  1117.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1118.  r15 = 0x00; r16 = 0x5f; r17 = 0x89; r18 = 0x57; r19 = 0x64;
  1119.  r20 = 0x00; r21 = 0x57; r22 = 0x00; r23 = 0xe3; r24 = 0xff;
  1120.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1121.  
  1122.  outb(0x3d4,0x3b);outb(0x3d5,0x36);
  1123.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1124.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1125.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1126.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  1127.  outb(0x3d4,0x6d);outb(0x3d5,0x01);
  1128.  
  1129.  
  1130. // TVP3026 clock synthesis
  1131. // N/M/P value: a6 1f b1, DCLK = 72.12 MHz
  1132.  outb(0x3d4,0x55);
  1133. // only p value
  1134.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1135. // pixel clock
  1136.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1137. // loop clock
  1138.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1139.  
  1140. // program pixel clock
  1141.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1142.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xa6);
  1143.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x1f);
  1144.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  1145.  
  1146. // program loop clock
  1147.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1148.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  1149.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1150.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  1151.  
  1152. // enable pixel clock (bit 7)
  1153.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  1154.  
  1155. // divider for pixel frequency
  1156.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x29);
  1157.  
  1158. // set index for PLL to status reg (R_ONLY)
  1159.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1160.  outb(0x3d5,0x00);
  1161.  
  1162. // Bit 2&3 set enable loading of DCLK parameters
  1163.  outb(0x3c2,0x2f);
  1164.  
  1165. //# [SPEA]
  1166.  //# SerialWord = 0xa61fb1;
  1167.  //# DacMode = 0x2;
  1168.  //# Cr42 = 0xc4;
  1169.  
  1170. // ***********************************
  1171. // 0x0072
  1172. // ***********************************
  1173. [MODE]
  1174.  0x0072;
  1175. [MODEINFO]
  1176.     ModeAttributes      = 0x1b;
  1177.     WinAAttributes      = 7;
  1178.     WinBAttributes      = 0;
  1179.     WinAGranularity     = 64;
  1180.     WinBGranularity     = 64;
  1181.     WinASize            = 64;
  1182.     WinBSize            = 64;
  1183.     WinABase            = 0xa0000;
  1184.     WinBBase            = 0xa0000;
  1185.     BytesPerScanline    = 2560;
  1186.     XResolution         = 640;
  1187.     YResolution         = 480;
  1188.     XCharSize           = 8;
  1189.     YCharSize           = 16;
  1190.     Colormodel          = 2;
  1191.     BitsPerPixel        = 32;
  1192.     NumberOfColors      = 16777216;
  1193.     BitsRGB             = 6;
  1194.     RedSize             = 8;
  1195.     RedPosition         = 16;
  1196.     GreenSize           = 8;
  1197.     GreenPosition       = 8;
  1198.     BlueSize            = 8;
  1199.     BluePosition        = 0;
  1200.     ReservedSize        = 8;
  1201.     ReservedPosition    = 24;
  1202.     NumberOfBanks       = 1;
  1203.     BankSize            = 0;
  1204.     MemoryModel         = 0x6;
  1205.     NumberOfImagePages  = 0;
  1206.  
  1207. [SETMODE]
  1208.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1209.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1210.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1211.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1212.  
  1213.  r0  = 0x2d; r1  = 0x27; r2  = 0x28; r3  = 0x10; r4  = 0x2b;
  1214.  r5  = 0x8f; r6  = 0x0b; r7  = 0x3e; r8  = 0x00; r9  = 0x40;
  1215.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1216.  r15 = 0x00; r16 = 0xea; r17 = 0x8c; r18 = 0xdf; r19 = 0x40;
  1217.  r20 = 0x60; r21 = 0xdf; r22 = 0x0b; r23 = 0xab; r24 = 0xff;
  1218.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1219.  
  1220.  outb(0x3d4,0x3b);outb(0x3d5,0x28);
  1221.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1222.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1223.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1224.  outb(0x3d4,0x67);outb(0x3d5,0x00);
  1225.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  1226.  
  1227.  
  1228. // TVP3026 clock synthesis
  1229. // N/M/P value: f2 2b b2, DCLK = 42.00 MHz
  1230.  outb(0x3d4,0x55);
  1231. // only p value
  1232.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1233. // pixel clock
  1234.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1235. // loop clock
  1236.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1237.  
  1238. // program pixel clock
  1239.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1240.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xf2);
  1241.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x2b);
  1242.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x32);
  1243.  
  1244. // program loop clock
  1245.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1246.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf9);
  1247.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1248.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1249.  
  1250. // enable pixel clock (bit 7)
  1251.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1252.  
  1253. // divider for pixel frequency
  1254.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x28);
  1255.  
  1256. // set index for PLL to status reg (R_ONLY)
  1257.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1258.  outb(0x3d5,0x00);
  1259.  
  1260. // Bit 2&3 set enable loading of DCLK parameters
  1261.  outb(0x3c2,0xef);
  1262.  
  1263. //# [SPEA]
  1264.  //# SerialWord = 0xf22bb2;
  1265.  //# DacMode = 0x7;
  1266.  //# Cr42 = 0x82;
  1267.  
  1268. // ***********************************
  1269. // 0x0071
  1270. // ***********************************
  1271. [MODE]
  1272.  0x0071;
  1273. [MODEINFO]
  1274.     ModeAttributes      = 0x1b;
  1275.     WinAAttributes      = 7;
  1276.     WinBAttributes      = 0;
  1277.     WinAGranularity     = 64;
  1278.     WinBGranularity     = 64;
  1279.     WinASize            = 64;
  1280.     WinBSize            = 64;
  1281.     WinABase            = 0xa0000;
  1282.     WinBBase            = 0xa0000;
  1283.     BytesPerScanline    = 1280;
  1284.     XResolution         = 640;
  1285.     YResolution         = 480;
  1286.     XCharSize           = 8;
  1287.     YCharSize           = 16;
  1288.     Colormodel          = 2;
  1289.     BitsPerPixel        = 16;
  1290.     NumberOfColors      = 65536;
  1291.     BitsRGB             = 6;
  1292.     RedSize             = 5;
  1293.     RedPosition         = 11;
  1294.     GreenSize           = 6;
  1295.     GreenPosition       = 5;
  1296.     BlueSize            = 5;
  1297.     BluePosition        = 0;
  1298.     ReservedSize        = 0;
  1299.     ReservedPosition    = 0;
  1300.     NumberOfBanks       = 1;
  1301.     BankSize            = 0;
  1302.     MemoryModel         = 0x6;
  1303.     NumberOfImagePages  = 0;
  1304.  
  1305. [SETMODE]
  1306.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1307.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1308.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1309.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1310.  
  1311.  r0  = 0x2d; r1  = 0x27; r2  = 0x28; r3  = 0x10; r4  = 0x2b;
  1312.  r5  = 0x8f; r6  = 0x0b; r7  = 0x3e; r8  = 0x00; r9  = 0x40;
  1313.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1314.  r15 = 0x00; r16 = 0xea; r17 = 0x8c; r18 = 0xdf; r19 = 0xa0;
  1315.  r20 = 0x60; r21 = 0xdf; r22 = 0x0b; r23 = 0xab; r24 = 0xff;
  1316.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1317.  
  1318.  outb(0x3d4,0x3b);outb(0x3d5,0x28);
  1319.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1320.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1321.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1322.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  1323.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  1324.  
  1325.  
  1326. // TVP3026 clock synthesis
  1327. // N/M/P value: f2 2b b2, DCLK = 42.00 MHz
  1328.  outb(0x3d4,0x55);
  1329. // only p value
  1330.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1331. // pixel clock
  1332.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1333. // loop clock
  1334.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1335.  
  1336. // program pixel clock
  1337.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1338.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xf2);
  1339.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x2b);
  1340.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x32);
  1341.  
  1342. // program loop clock
  1343.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1344.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  1345.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1346.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1347.  
  1348. // enable pixel clock (bit 7)
  1349.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1350.  
  1351. // divider for pixel frequency
  1352.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x28);
  1353.  
  1354. // set index for PLL to status reg (R_ONLY)
  1355.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1356.  outb(0x3d5,0x00);
  1357.  
  1358. // Bit 2&3 set enable loading of DCLK parameters
  1359.  outb(0x3c2,0xef);
  1360.  
  1361. //# [SPEA]
  1362.  //# SerialWord = 0xf22bb2;
  1363.  //# DacMode = 0x5;
  1364.  //# Cr42 = 0xc2;
  1365.  
  1366. // ***********************************
  1367. // 0x0069
  1368. // ***********************************
  1369. [MODE]
  1370.  0x0069;
  1371. [MODEINFO]
  1372.     ModeAttributes      = 0x1b;
  1373.     WinAAttributes      = 7;
  1374.     WinBAttributes      = 0;
  1375.     WinAGranularity     = 64;
  1376.     WinBGranularity     = 64;
  1377.     WinASize            = 64;
  1378.     WinBSize            = 64;
  1379.     WinABase            = 0xa0000;
  1380.     WinBBase            = 0xa0000;
  1381.     BytesPerScanline    = 640;
  1382.     XResolution         = 640;
  1383.     YResolution         = 480;
  1384.     XCharSize           = 8;
  1385.     YCharSize           = 16;
  1386.     Colormodel          = 1;
  1387.     BitsPerPixel        = 8;
  1388.     NumberOfColors      = 256;
  1389.     BitsRGB             = 6;
  1390.     NumberOfBanks       = 1;
  1391.     BankSize            = 0;
  1392.     MemoryModel         = 0x4;
  1393.     NumberOfImagePages  = 0;
  1394.  
  1395. [SETMODE]
  1396.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1397.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1398.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1399.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1400.  
  1401.  r0  = 0x2d; r1  = 0x27; r2  = 0x28; r3  = 0x10; r4  = 0x2b;
  1402.  r5  = 0x8f; r6  = 0x0b; r7  = 0x3e; r8  = 0x00; r9  = 0x40;
  1403.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1404.  r15 = 0x00; r16 = 0xea; r17 = 0x8c; r18 = 0xdf; r19 = 0x50;
  1405.  r20 = 0x60; r21 = 0xdf; r22 = 0x0b; r23 = 0xab; r24 = 0xff;
  1406.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1407.  
  1408.  outb(0x3d4,0x3b);outb(0x3d5,0x28);
  1409.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1410.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1411.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1412.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  1413.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  1414.  
  1415.  
  1416. // TVP3026 clock synthesis
  1417. // N/M/P value: f2 2b b2, DCLK = 42.00 MHz
  1418.  outb(0x3d4,0x55);
  1419. // only p value
  1420.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1421. // pixel clock
  1422.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1423. // loop clock
  1424.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1425.  
  1426. // program pixel clock
  1427.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1428.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xf2);
  1429.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x2b);
  1430.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x32);
  1431.  
  1432. // program loop clock
  1433.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1434.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  1435.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1436.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1437.  
  1438. // enable pixel clock (bit 7)
  1439.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1440.  
  1441. // divider for pixel frequency
  1442.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x29);
  1443.  
  1444. // set index for PLL to status reg (R_ONLY)
  1445.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1446.  outb(0x3d5,0x00);
  1447.  
  1448. // Bit 2&3 set enable loading of DCLK parameters
  1449.  outb(0x3c2,0xef);
  1450.  
  1451. //# [SPEA]
  1452.  //# SerialWord = 0xf22bb2;
  1453.  //# DacMode = 0x2;
  1454.  //# Cr42 = 0xc2;
  1455.  
  1456. // ***********************************
  1457. // 0x0068
  1458. // ***********************************
  1459. [MODE]
  1460.  0x0068;
  1461. [MODEINFO]
  1462.     ModeAttributes      = 0x1b;
  1463.     WinAAttributes      = 7;
  1464.     WinBAttributes      = 0;
  1465.     WinAGranularity     = 64;
  1466.     WinBGranularity     = 64;
  1467.     WinASize            = 64;
  1468.     WinBSize            = 64;
  1469.     WinABase            = 0xa0000;
  1470.     WinBBase            = 0xa0000;
  1471.     BytesPerScanline    = 640;
  1472.     XResolution         = 640;
  1473.     YResolution         = 400;
  1474.     XCharSize           = 8;
  1475.     YCharSize           = 16;
  1476.     Colormodel          = 1;
  1477.     BitsPerPixel        = 8;
  1478.     NumberOfColors      = 256;
  1479.     BitsRGB             = 6;
  1480.     NumberOfBanks       = 1;
  1481.     BankSize            = 0;
  1482.     MemoryModel         = 0x4;
  1483.     NumberOfImagePages  = 0;
  1484.  
  1485. [SETMODE]
  1486.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1487.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1488.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1489.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1490.  
  1491.  r0  = 0x2d; r1  = 0x27; r2  = 0x28; r3  = 0x01; r4  = 0x2a;
  1492.  r5  = 0x10; r6  = 0xbf; r7  = 0x1f; r8  = 0x00; r9  = 0x40;
  1493.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1494.  r15 = 0x00; r16 = 0x9c; r17 = 0x8e; r18 = 0x8f; r19 = 0x50;
  1495.  r20 = 0x40; r21 = 0x96; r22 = 0xb9; r23 = 0xa3; r24 = 0xff;
  1496.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1497.  
  1498.  outb(0x3d4,0x3b);outb(0x3d5,0x26);
  1499.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1500.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1501.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1502.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  1503.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  1504.  
  1505.  
  1506. // TVP3026 clock synthesis
  1507. // N/M/P value: fd 3a b3, DCLK = 25056815 Hz
  1508.  outb(0x3d4,0x55);
  1509. // only p value
  1510.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1511. // pixel clock
  1512.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1513. // loop clock
  1514.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1515.  
  1516. // program pixel clock
  1517.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1518.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfd);
  1519.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  1520.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x33);
  1521.  
  1522. // program loop clock
  1523.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1524.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  1525.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1526.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf3);
  1527.  
  1528. // enable pixel clock (bit 7)
  1529.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb3);
  1530.  
  1531. // divider for pixel frequency
  1532.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x3b);
  1533.  
  1534. // set index for PLL to status reg (R_ONLY)
  1535.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1536.  outb(0x3d5,0x00);
  1537.  
  1538. // Bit 2&3 set enable loading of DCLK parameters
  1539.  outb(0x3c2,0xef);
  1540.  
  1541. //# [SPEA]
  1542.  //# SerialWord = 0xfd3ab3;
  1543.  //# DacMode = 0x2;
  1544.  //# Cr42 = 0x80;
  1545.  
  1546.