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Text File  |  1995-09-14  |  53.2 KB  |  1,529 lines
  1. // 
  2. //  Copyright (c) 1995 SPEA Software AG All Rights Reserved
  3. // 
  4. //# @(#)figlv64.sdd  3.00   95/06/08 SPEA   (BIOS 1.01)
  5. // 
  6. //  figlv64.sdd  -  SVPMI File for SPEA FIRE GL
  7. // 
  8. //  1600x1200x16 76.6 / 61  kHz / Hz
  9. //  1600x1200x8  76.6 / 61  kHz / Hz
  10. //  1280x1024x32 64.0 / 60  kHz / Hz
  11. //  1280x1024x16 64.0 / 60  kHz / Hz
  12. //  1280x1024x8  64.0 / 60  kHz / Hz
  13. //  1152x864x8   64.0 / 70  kHz / Hz
  14. //  1024x768x32  60.4 / 75  kHz / Hz
  15. //  1024x768x16  60.4 / 75  kHz / Hz
  16. //  1024x768x8   60.4 / 75  kHz / Hz
  17. //  800x600x32   57.6 / 90  kHz / Hz
  18. //  800x600x16   57.6 / 90  kHz / Hz
  19. //  800x600x8    57.6 / 90  kHz / Hz
  20. //  640x480x32   43.7 / 85  kHz / Hz
  21. //  640x480x16   43.7 / 85  kHz / Hz
  22. //  640x480x8    43.7 / 85  kHz / Hz
  23. //  640x400x8    31.4 / 70  kHz / Hz
  24.  
  25. [VERSION]
  26.  1.0;
  27.  
  28. [ACTIVE_ADAPTER]
  29.  SPEA FIRE GL (bis 64 kHz Multiscan);
  30.  
  31. [ADAPTER]
  32.  SPEA FIRE GL (bis 64 kHz Multiscan);
  33.  
  34. [ADAPTER_INFO]
  35.  BoardType = VGA;
  36.  SaveSize = 100;
  37.  PaletteSize = 768;
  38.  //# MemorySize = 4096;
  39.  
  40. // ***********************************
  41. // 0x007E
  42. // ***********************************
  43. [MODE]
  44.  0x007E;
  45. [MODEINFO]
  46.     ModeAttributes      = 0x1b;
  47.     WinAAttributes      = 7;
  48.     WinBAttributes      = 0;
  49.     WinAGranularity     = 64;
  50.     WinBGranularity     = 64;
  51.     WinASize            = 64;
  52.     WinBSize            = 64;
  53.     WinABase            = 0xa0000;
  54.     WinBBase            = 0xa0000;
  55.     BytesPerScanline    = 3200;
  56.     XResolution         = 1600;
  57.     YResolution         = 1200;
  58.     XCharSize           = 8;
  59.     YCharSize           = 16;
  60.     Colormodel          = 2;
  61.     BitsPerPixel        = 16;
  62.     NumberOfColors      = 65536;
  63.     BitsRGB             = 6;
  64.     NumberOfBanks       = 1;
  65.     BankSize            = 0;
  66.     MemoryModel         = 0x6;
  67.     NumberOfImagePages  = 0;
  68.  
  69. [SETMODE]
  70.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  71.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  72.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  73.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  74.  
  75.  r0  = 0x7e; r1  = 0x64; r2  = 0x62; r3  = 0x01; r4  = 0x67;
  76.  r5  = 0x11; r6  = 0xe8; r7  = 0x00; r8  = 0x00; r9  = 0x00;
  77.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  78.  r15 = 0x00; r16 = 0xc0; r17 = 0x8c; r18 = 0xaf; r19 = 0x90;
  79.  r20 = 0x00; r21 = 0xaf; r22 = 0x00; r23 = 0xa3; r24 = 0xaf;
  80.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  81.  
  82.  outb(0x3d4,0x3b);outb(0x3d5,0x77);
  83.  outb(0x3d4,0x34);outb(0x3d5,0x10);
  84.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  85.  outb(0x3d4,0x5e);outb(0x3d5,0x57);
  86.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  87.  outb(0x3d4,0x6d);outb(0x3d5,0x14);
  88.  
  89.  
  90. // TVP3026 clock synthesis
  91. // N/M/P value: fc 3a b0, DCLK = 160363616 Hz
  92.  outb(0x3d4,0x55);
  93. // only p value
  94.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  95. // pixel clock
  96.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  97. // loop clock
  98.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  99.  
  100. // program pixel clock
  101.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  102.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfc);
  103.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  104.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x30);
  105.  
  106. // program loop clock
  107.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  108.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  109.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  110.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf0);
  111.  
  112. // enable pixel clock (bit 7)
  113.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb0);
  114.  
  115. // divider for pixel frequency
  116.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x38);
  117.  
  118. // set index for PLL to status reg (R_ONLY)
  119.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  120.  outb(0x3d5,0x00);
  121.  
  122. // Bit 2&3 set enable loading of DCLK parameters
  123.  outb(0x3c2,0x2f);
  124.  
  125. //# [SPEA]
  126.  //# SerialWord = 0xfc3ab0;
  127.  //# DacMode = 0x5;
  128.  //# Cr42 = 0x52;
  129.  
  130. // ***********************************
  131. // 0x007C
  132. // ***********************************
  133. [MODE]
  134.  0x007C;
  135. [MODEINFO]
  136.     ModeAttributes      = 0x1b;
  137.     WinAAttributes      = 7;
  138.     WinBAttributes      = 0;
  139.     WinAGranularity     = 64;
  140.     WinBGranularity     = 64;
  141.     WinASize            = 64;
  142.     WinBSize            = 64;
  143.     WinABase            = 0xa0000;
  144.     WinBBase            = 0xa0000;
  145.     BytesPerScanline    = 1600;
  146.     XResolution         = 1600;
  147.     YResolution         = 1200;
  148.     XCharSize           = 8;
  149.     YCharSize           = 16;
  150.     Colormodel          = 1;
  151.     BitsPerPixel        = 8;
  152.     NumberOfColors      = 256;
  153.     BitsRGB             = 6;
  154.     NumberOfBanks       = 1;
  155.     BankSize            = 0;
  156.     MemoryModel         = 0x4;
  157.     NumberOfImagePages  = 0;
  158.  
  159. [SETMODE]
  160.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  161.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  162.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  163.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  164.  
  165.  r0  = 0x7e; r1  = 0x64; r2  = 0x62; r3  = 0x01; r4  = 0x67;
  166.  r5  = 0x11; r6  = 0xe8; r7  = 0x00; r8  = 0x00; r9  = 0x00;
  167.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  168.  r15 = 0x00; r16 = 0xc0; r17 = 0x8c; r18 = 0xaf; r19 = 0xc8;
  169.  r20 = 0x00; r21 = 0xaf; r22 = 0x00; r23 = 0xa3; r24 = 0xaf;
  170.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  171.  
  172.  outb(0x3d4,0x3b);outb(0x3d5,0x77);
  173.  outb(0x3d4,0x34);outb(0x3d5,0x10);
  174.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  175.  outb(0x3d4,0x5e);outb(0x3d5,0x57);
  176.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  177.  outb(0x3d4,0x6d);outb(0x3d5,0x12);
  178.  
  179.  
  180. // TVP3026 clock synthesis
  181. // N/M/P value: fc 3a b0, DCLK = 160363616 Hz
  182.  outb(0x3d4,0x55);
  183. // only p value
  184.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  185. // pixel clock
  186.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  187. // loop clock
  188.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  189.  
  190. // program pixel clock
  191.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  192.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfc);
  193.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  194.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x30);
  195.  
  196. // program loop clock
  197.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  198.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  199.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  200.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf0);
  201.  
  202. // enable pixel clock (bit 7)
  203.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb0);
  204.  
  205. // divider for pixel frequency
  206.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x39);
  207.  
  208. // set index for PLL to status reg (R_ONLY)
  209.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  210.  outb(0x3d5,0x00);
  211.  
  212. // Bit 2&3 set enable loading of DCLK parameters
  213.  outb(0x3c2,0x2f);
  214.  
  215. //# [SPEA]
  216.  //# SerialWord = 0xfc3ab0;
  217.  //# DacMode = 0x2;
  218.  //# Cr42 = 0x52;
  219.  
  220. // ***********************************
  221. // 0x007B
  222. // ***********************************
  223. [MODE]
  224.  0x007B;
  225. [MODEINFO]
  226.     ModeAttributes      = 0x1a;
  227.     WinAAttributes      = 7;
  228.     WinBAttributes      = 0;
  229.     WinAGranularity     = 64;
  230.     WinBGranularity     = 64;
  231.     WinASize            = 64;
  232.     WinBSize            = 64;
  233.     WinABase            = 0xa0000;
  234.     WinBBase            = 0xa0000;
  235.     BytesPerScanline    = 5120;
  236.     XResolution         = 1280;
  237.     YResolution         = 1024;
  238.     XCharSize           = 8;
  239.     YCharSize           = 16;
  240.     Colormodel          = 2;
  241.     BitsPerPixel        = 32;
  242.     NumberOfColors      = 16777216;
  243.     BitsRGB             = 6;
  244.     RedSize             = 8;
  245.     RedPosition         = 16;
  246.     GreenSize           = 8;
  247.     GreenPosition       = 8;
  248.     BlueSize            = 8;
  249.     BluePosition        = 0;
  250.     ReservedSize        = 8;
  251.     ReservedPosition    = 24;
  252.     NumberOfBanks       = 1;
  253.     BankSize            = 0;
  254.     MemoryModel         = 0x6;
  255.     NumberOfImagePages  = 0;
  256.  
  257. [SETMODE]
  258.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  259.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  260.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  261.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  262.  
  263.  r0  = 0x66; r1  = 0x4f; r2  = 0x50; r3  = 0x89; r4  = 0x53;
  264.  r5  = 0x9c; r6  = 0x22; r7  = 0x4a; r8  = 0x00; r9  = 0x60;
  265.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  266.  r15 = 0x00; r16 = 0x00; r17 = 0x83; r18 = 0xff; r19 = 0x80;
  267.  r20 = 0x00; r21 = 0xff; r22 = 0x22; r23 = 0xe3; r24 = 0xff;
  268.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  269.  
  270.  outb(0x3d4,0x3b);outb(0x3d5,0x5F);
  271.  outb(0x3d4,0x34);outb(0x3d5,0x10);
  272.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  273.  outb(0x3d4,0x5e);outb(0x3d5,0x51);
  274.  outb(0x3d4,0x67);outb(0x3d5,0x00);
  275.  outb(0x3d4,0x6d);outb(0x3d5,0x01);
  276.  
  277.  
  278. // TVP3026 clock synthesis
  279. // N/M/P value: e8 11 b1, DCLK = 109.96 MHz
  280.  outb(0x3d4,0x55);
  281. // only p value
  282.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  283. // pixel clock
  284.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  285. // loop clock
  286.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  287.  
  288. // program pixel clock
  289.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  290.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xe8);
  291.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x11);
  292.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  293.  
  294. // program loop clock
  295.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  296.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xF9);
  297.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  298.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf0);
  299.  
  300. // enable pixel clock (bit 7)
  301.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  302.  
  303. // divider for pixel frequency
  304.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x38);
  305.  
  306. // set index for PLL to status reg (R_ONLY)
  307.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  308.  outb(0x3d5,0x00);
  309.  
  310. // Bit 2&3 set enable loading of DCLK parameters
  311.  outb(0x3c2,0xef);
  312.  
  313. //# [SPEA]
  314.  //# SerialWord = 0xE811B1;
  315.  //# DacMode = 0x7;
  316.  //# Cr42 = 0x4e;
  317.  
  318. // ***********************************
  319. // 0x007A
  320. // ***********************************
  321. [MODE]
  322.  0x007A;
  323. [MODEINFO]
  324.     ModeAttributes      = 0x1a;
  325.     WinAAttributes      = 7;
  326.     WinBAttributes      = 0;
  327.     WinAGranularity     = 64;
  328.     WinBGranularity     = 64;
  329.     WinASize            = 64;
  330.     WinBSize            = 64;
  331.     WinABase            = 0xa0000;
  332.     WinBBase            = 0xa0000;
  333.     BytesPerScanline    = 2560;
  334.     XResolution         = 1280;
  335.     YResolution         = 1024;
  336.     XCharSize           = 8;
  337.     YCharSize           = 16;
  338.     Colormodel          = 2;
  339.     BitsPerPixel        = 16;
  340.     NumberOfColors      = 65536;
  341.     BitsRGB             = 6;
  342.     RedSize             = 5;
  343.     RedPosition         = 11;
  344.     GreenSize           = 6;
  345.     GreenPosition       = 5;
  346.     BlueSize            = 5;
  347.     BluePosition        = 0;
  348.     ReservedSize        = 0;
  349.     ReservedPosition    = 0;
  350.     NumberOfBanks       = 1;
  351.     BankSize            = 0;
  352.     MemoryModel         = 0x6;
  353.     NumberOfImagePages  = 0;
  354.  
  355. [SETMODE]
  356.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  357.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  358.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  359.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  360.  
  361.  r0  = 0x66; r1  = 0x4f; r2  = 0x50; r3  = 0x89; r4  = 0x53;
  362.  r5  = 0x9c; r6  = 0x22; r7  = 0x4a; r8  = 0x00; r9  = 0x60;
  363.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  364.  r15 = 0x00; r16 = 0x00; r17 = 0x83; r18 = 0xff; r19 = 0x40;
  365.  r20 = 0x00; r21 = 0xff; r22 = 0x22; r23 = 0xe3; r24 = 0xff;
  366.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  367.  
  368.  outb(0x3d4,0x3b);outb(0x3d5,0x5F);
  369.  outb(0x3d4,0x34);outb(0x3d5,0x10);
  370.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  371.  outb(0x3d4,0x5e);outb(0x3d5,0x51);
  372.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  373.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  374.  
  375.  
  376. // TVP3026 clock synthesis
  377. // N/M/P value: e8 11 b1, DCLK = 109.96 MHz
  378.  outb(0x3d4,0x55);
  379. // only p value
  380.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  381. // pixel clock
  382.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  383. // loop clock
  384.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  385.  
  386. // program pixel clock
  387.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  388.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xe8);
  389.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x11);
  390.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  391.  
  392. // program loop clock
  393.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  394.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  395.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  396.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  397.  
  398. // enable pixel clock (bit 7)
  399.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  400.  
  401. // divider for pixel frequency
  402.  //outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x28);
  403.  
  404. // set index for PLL to status reg (R_ONLY)
  405.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  406.  //outb(0x3d5,0x00); outb(0x3c8,0x0f); outb(0x3d5,0x02); outb(0x3c6,0x07);
  407.  outb(0x3d5,0x00);
  408.  
  409. // Bit 2&3 set enable loading of DCLK parameters
  410.  outb(0x3c2,0xef);
  411.  
  412. //# [SPEA]
  413.  //# SerialWord = 0xE811B1;
  414.  //# DacMode = 0x5;
  415.  //# Cr42 = 0x4e;
  416.  
  417. // ***********************************
  418. // 0x006F
  419. // ***********************************
  420. [MODE]
  421.  0x006F;
  422. [MODEINFO]
  423.     ModeAttributes      = 0x1b;
  424.     WinAAttributes      = 7;
  425.     WinBAttributes      = 0;
  426.     WinAGranularity     = 64;
  427.     WinBGranularity     = 64;
  428.     WinASize            = 64;
  429.     WinBSize            = 64;
  430.     WinABase            = 0xa0000;
  431.     WinBBase            = 0xa0000;
  432.     BytesPerScanline    = 1280;
  433.     XResolution         = 1280;
  434.     YResolution         = 1024;
  435.     XCharSize           = 8;
  436.     YCharSize           = 16;
  437.     Colormodel          = 1;
  438.     BitsPerPixel        = 8;
  439.     NumberOfColors      = 256;
  440.     BitsRGB             = 6;
  441.     NumberOfBanks       = 1;
  442.     BankSize            = 0;
  443.     MemoryModel         = 0x4;
  444.     NumberOfImagePages  = 0;
  445.  
  446. [SETMODE]
  447.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  448.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  449.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  450.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  451.  
  452.  r0  = 0x66; r1  = 0x4f; r2  = 0x50; r3  = 0x89; r4  = 0x53;
  453.  r5  = 0x9c; r6  = 0x22; r7  = 0x4a; r8  = 0x00; r9  = 0x60;
  454.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  455.  r15 = 0x00; r16 = 0x00; r17 = 0x83; r18 = 0xff; r19 = 0xa0;
  456.  r20 = 0x00; r21 = 0xff; r22 = 0x22; r23 = 0xe3; r24 = 0xff;
  457.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  458.  
  459.  outb(0x3d4,0x3b);outb(0x3d5,0x5F);
  460.  outb(0x3d4,0x34);outb(0x3d5,0x10);
  461.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  462.  outb(0x3d4,0x5e);outb(0x3d5,0x51);
  463.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  464.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  465.  
  466.  
  467. // TVP3026 clock synthesis
  468. // N/M/P value: e8 11 b1, DCLK = 109.96 MHz
  469.  outb(0x3d4,0x55);
  470. // only p value
  471.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  472. // pixel clock
  473.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  474. // loop clock
  475.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  476.  
  477. // program pixel clock
  478.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  479.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xe8);
  480.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x11);
  481.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  482.  
  483. // program loop clock
  484.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  485.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  486.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  487.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  488.  
  489. // enable pixel clock (bit 7)
  490.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  491.  
  492. // divider for pixel frequency
  493.  //outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x29);
  494.  
  495. // set index for PLL to status reg (R_ONLY)
  496.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  497.  outb(0x3d5,0x00);
  498.  
  499. // Bit 2&3 set enable loading of DCLK parameters
  500.  outb(0x3c2,0xef);
  501.  
  502. //# [SPEA]
  503.  //# SerialWord = 0xe811b1;
  504.  //# DacMode = 0x2;
  505.  //# Cr42 = 0x4e;
  506.  
  507. // ***********************************
  508. // 0x004E
  509. // ***********************************
  510. [MODE]
  511.  0x004E;
  512. [MODEINFO]
  513.     ModeAttributes      = 0x1b;
  514.     WinAAttributes      = 7;
  515.     WinBAttributes      = 0;
  516.     WinAGranularity     = 64;
  517.     WinBGranularity     = 64;
  518.     WinASize            = 64;
  519.     WinBSize            = 64;
  520.     WinABase            = 0xa0000;
  521.     WinBBase            = 0xa0000;
  522.     BytesPerScanline    = 1152;
  523.     XResolution         = 1152;
  524.     YResolution         = 864;
  525.     XCharSize           = 8;
  526.     YCharSize           = 16;
  527.     Colormodel          = 1;
  528.     BitsPerPixel        = 8;
  529.     NumberOfColors      = 256;
  530.     BitsRGB             = 6;
  531.     NumberOfBanks       = 1;
  532.     BankSize            = 0;
  533.     MemoryModel         = 0x4;
  534.     NumberOfImagePages  = 0;
  535.  
  536. [SETMODE]
  537.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  538.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  539.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  540.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  541.  
  542.  r0  = 0x56; r1  = 0x47; r2  = 0x48; r3  = 0x19; r4  = 0x4c;
  543.  r5  = 0x13; r6  = 0x94; r7  = 0xFF; r8  = 0x00; r9  = 0x60;
  544.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xFF;
  545.  r15 = 0x00; r16 = 0x65; r17 = 0x88; r18 = 0x5F; r19 = 0x90;
  546.  r20 = 0x00; r21 = 0x5f; r22 = 0x94; r23 = 0xEB; r24 = 0xFF;
  547.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  548.  
  549.  outb(0x3d4,0x3b);outb(0x3d5,0x4e);
  550.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  551.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  552.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  553.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  554.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  555.  
  556.  
  557. // TVP3026 clock synthesis
  558. // N/M/P value: EE 22 B1, DCLK = 93.44 MHz
  559.  outb(0x3d4,0x55); 
  560.  outb(0x3d5,0x00); outb(0x3c8,0x2C); outb(0x3d5,0x02); outb(0x3c6,0x00); 
  561.  outb(0x3d5,0x00); outb(0x3c8,0x2D); outb(0x3d5,0x02); outb(0x3c6,0x00); 
  562.  outb(0x3d5,0x00); outb(0x3c8,0x2F); outb(0x3d5,0x02); outb(0x3c6,0x00); 
  563.  
  564.  outb(0x3d5,0x00); outb(0x3c8,0x2C); outb(0x3d5,0x02); outb(0x3c6,0x00); 
  565.  outb(0x3d5,0x00); outb(0x3c8,0x2D); outb(0x3d5,0x02); outb(0x3c6,0xEE); 
  566.  outb(0x3d5,0x00); outb(0x3c8,0x2D); outb(0x3d5,0x02); outb(0x3c6,0x22); 
  567.  outb(0x3d5,0x00); outb(0x3c8,0x2D); outb(0x3d5,0x02); outb(0x3c6,0x31); 
  568.  
  569.  outb(0x3d5,0x00); outb(0x3c8,0x2C); outb(0x3d5,0x02); outb(0x3c6,0x02); 
  570.  outb(0x3d5,0x00); outb(0x3c8,0x2F); outb(0x3d5,0x02); outb(0x3c6,0xA1); 
  571.  outb(0x3d5,0x00); outb(0x3c8,0x2F); outb(0x3d5,0x02); outb(0x3c6,0x3D); 
  572.  outb(0x3d5,0x00); outb(0x3c8,0x2F); outb(0x3d5,0x02); outb(0x3c6,0xF1); 
  573.  
  574.  outb(0x3d5,0x00); outb(0x3c8,0x2D); outb(0x3d5,0x02); outb(0x3c6,0xB1); 
  575.  
  576.  //outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x29); 
  577.  
  578.  outb(0x3d5,0x00); outb(0x3c8,0x2C); outb(0x3d5,0x02); outb(0x3c6,0xFF); 
  579.  outb(0x3d5,0x00);
  580.  
  581. // Bit 2&3 set enable loading of DCLK parameters
  582.  outb(0x3c2,0xef);
  583.  
  584. //# [SPEA]
  585.  //# SerialWord = 0xee22b1;
  586.  //# DacMode = 0x2;
  587.  //# Cr42 = 0x8c;
  588.  
  589. // ***********************************
  590. // 0x0078
  591. // ***********************************
  592. [MODE]
  593.  0x0078;
  594. [MODEINFO]
  595.     ModeAttributes      = 0x1a;
  596.     WinAAttributes      = 7;
  597.     WinBAttributes      = 0;
  598.     WinAGranularity     = 64;
  599.     WinBGranularity     = 64;
  600.     WinASize            = 64;
  601.     WinBSize            = 64;
  602.     WinABase            = 0xa0000;
  603.     WinBBase            = 0xa0000;
  604.     BytesPerScanline    = 4096;
  605.     XResolution         = 1024;
  606.     YResolution         = 768;
  607.     XCharSize           = 8;
  608.     YCharSize           = 16;
  609.     Colormodel          = 2;
  610.     BitsPerPixel        = 32;
  611.     NumberOfColors      = 16777216;
  612.     BitsRGB             = 6;
  613.     RedSize             = 8;
  614.     RedPosition         = 16;
  615.     GreenSize           = 8;
  616.     GreenPosition       = 8;
  617.     BlueSize            = 8;
  618.     BluePosition        = 0;
  619.     ReservedSize        = 8;
  620.     ReservedPosition    = 24;
  621.     NumberOfBanks       = 1;
  622.     BankSize            = 0;
  623.     MemoryModel         = 0x6;
  624.     NumberOfImagePages  = 0;
  625.  
  626. [SETMODE]
  627.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  628.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  629.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  630.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  631.  
  632.  r0  = 0x4e; r1  = 0x3f; r2  = 0x40; r3  = 0x11; r4  = 0x42;
  633.  r5  = 0x09; r6  = 0x21; r7  = 0xf5; r8  = 0x00; r9  = 0x60;
  634.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  635.  r15 = 0x00; r16 = 0x00; r17 = 0x83; r18 = 0xff; r19 = 0x00;
  636.  r20 = 0x00; r21 = 0xff; r22 = 0x21; r23 = 0xeb; r24 = 0xff;
  637.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  638.  
  639.  outb(0x3d4,0x3b);outb(0x3d5,0x47);
  640.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  641.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  642.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  643.  outb(0x3d4,0x67);outb(0x3d5,0x00);
  644.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  645.  
  646.  
  647. // TVP3026 clock synthesis
  648. // N/M/P value: fc 3a b1, DCLK = 80181808 Hz
  649.  outb(0x3d4,0x55);
  650. // only p value
  651.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  652. // pixel clock
  653.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  654. // loop clock
  655.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  656.  
  657. // program pixel clock
  658.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  659.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfc);
  660.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  661.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  662.  
  663. // program loop clock
  664.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  665.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf9);
  666.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  667.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  668.  
  669. // enable pixel clock (bit 7)
  670.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  671.  
  672. // divider for pixel frequency
  673.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x28);
  674.  
  675. // set index for PLL to status reg (R_ONLY)
  676.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  677.  outb(0x3d5,0x00);
  678.  
  679. // Bit 2&3 set enable loading of DCLK parameters
  680.  outb(0x3c2,0xef);
  681.  
  682. //# [SPEA]
  683.  //# SerialWord = 0xfc3ab1;
  684.  //# DacMode = 0x7;
  685.  //# Cr42 = 0x4c;
  686.  
  687. // ***********************************
  688. // 0x0077
  689. // ***********************************
  690. [MODE]
  691.  0x0077;
  692. [MODEINFO]
  693.     ModeAttributes      = 0x1b;
  694.     WinAAttributes      = 7;
  695.     WinBAttributes      = 0;
  696.     WinAGranularity     = 64;
  697.     WinBGranularity     = 64;
  698.     WinASize            = 64;
  699.     WinBSize            = 64;
  700.     WinABase            = 0xa0000;
  701.     WinBBase            = 0xa0000;
  702.     BytesPerScanline    = 2048;
  703.     XResolution         = 1024;
  704.     YResolution         = 768;
  705.     XCharSize           = 8;
  706.     YCharSize           = 16;
  707.     Colormodel          = 2;
  708.     BitsPerPixel        = 16;
  709.     NumberOfColors      = 65536;
  710.     BitsRGB             = 6;
  711.     RedSize             = 5;
  712.     RedPosition         = 11;
  713.     GreenSize           = 6;
  714.     GreenPosition       = 5;
  715.     BlueSize            = 5;
  716.     BluePosition        = 0;
  717.     ReservedSize        = 0;
  718.     ReservedPosition    = 0;
  719.     NumberOfBanks       = 1;
  720.     BankSize            = 0;
  721.     MemoryModel         = 0x6;
  722.     NumberOfImagePages  = 0;
  723.  
  724. [SETMODE]
  725.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  726.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  727.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  728.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  729.  
  730.  r0  = 0x4e; r1  = 0x3f; r2  = 0x40; r3  = 0x11; r4  = 0x42;
  731.  r5  = 0x09; r6  = 0x21; r7  = 0xf5; r8  = 0x00; r9  = 0x60;
  732.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  733.  r15 = 0x00; r16 = 0x00; r17 = 0x83; r18 = 0xff; r19 = 0x00;
  734.  r20 = 0x00; r21 = 0xff; r22 = 0x21; r23 = 0xeb; r24 = 0xff;
  735.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  736.  
  737.  outb(0x3d4,0x3b);outb(0x3d5,0x47);
  738.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  739.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  740.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  741.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  742.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  743.  
  744.  
  745. // TVP3026 clock synthesis
  746. // N/M/P value: fc 3a b1, DCLK = 80181808 Hz
  747.  outb(0x3d4,0x55);
  748. // only p value
  749.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  750. // pixel clock
  751.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  752. // loop clock
  753.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  754.  
  755. // program pixel clock
  756.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  757.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfc);
  758.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  759.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  760.  
  761. // program loop clock
  762.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  763.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  764.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  765.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  766.  
  767. // enable pixel clock (bit 7)
  768.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  769.  
  770. // divider for pixel frequency
  771.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x28);
  772.  
  773. // set index for PLL to status reg (R_ONLY)
  774.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  775.  outb(0x3d5,0x00);
  776.  
  777. // Bit 2&3 set enable loading of DCLK parameters
  778.  outb(0x3c2,0xef);
  779.  
  780. //# [SPEA]
  781.  //# SerialWord = 0xfc3ab1;
  782.  //# DacMode = 0x5;
  783.  //# Cr42 = 0x8c;
  784.  
  785. // ***********************************
  786. // 0x006D
  787. // ***********************************
  788. [MODE]
  789.  0x006D;
  790. [MODEINFO]
  791.     ModeAttributes      = 0x1b;
  792.     WinAAttributes      = 7;
  793.     WinBAttributes      = 0;
  794.     WinAGranularity     = 64;
  795.     WinBGranularity     = 64;
  796.     WinASize            = 64;
  797.     WinBSize            = 64;
  798.     WinABase            = 0xa0000;
  799.     WinBBase            = 0xa0000;
  800.     BytesPerScanline    = 1024;
  801.     XResolution         = 1024;
  802.     YResolution         = 768;
  803.     XCharSize           = 8;
  804.     YCharSize           = 16;
  805.     Colormodel          = 1;
  806.     BitsPerPixel        = 8;
  807.     NumberOfColors      = 256;
  808.     BitsRGB             = 6;
  809.     NumberOfBanks       = 1;
  810.     BankSize            = 0;
  811.     MemoryModel         = 0x4;
  812.     NumberOfImagePages  = 0;
  813.  
  814. [SETMODE]
  815.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  816.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  817.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  818.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  819.  
  820.  r0  = 0x4e; r1  = 0x3f; r2  = 0x40; r3  = 0x11; r4  = 0x42;
  821.  r5  = 0x09; r6  = 0x21; r7  = 0xf5; r8  = 0x00; r9  = 0x60;
  822.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  823.  r15 = 0x00; r16 = 0x00; r17 = 0x83; r18 = 0xff; r19 = 0x80;
  824.  r20 = 0x00; r21 = 0xff; r22 = 0x21; r23 = 0xeb; r24 = 0xff;
  825.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  826.  
  827.  outb(0x3d4,0x3b);outb(0x3d5,0x47);
  828.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  829.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  830.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  831.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  832.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  833.  
  834.  
  835. // TVP3026 clock synthesis
  836. // N/M/P value: fc 3a b1, DCLK = 80181808 Hz
  837.  outb(0x3d4,0x55);
  838. // only p value
  839.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  840. // pixel clock
  841.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  842. // loop clock
  843.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  844.  
  845. // program pixel clock
  846.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  847.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfc);
  848.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  849.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  850.  
  851. // program loop clock
  852.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  853.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  854.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  855.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  856.  
  857. // enable pixel clock (bit 7)
  858.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  859.  
  860. // divider for pixel frequency
  861.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x29);
  862.  
  863. // set index for PLL to status reg (R_ONLY)
  864.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  865.  outb(0x3d5,0x00);
  866.  
  867. // Bit 2&3 set enable loading of DCLK parameters
  868.  outb(0x3c2,0xef);
  869.  
  870. //# [SPEA]
  871.  //# SerialWord = 0xfc3ab1;
  872.  //# DacMode = 0x2;
  873.  //# Cr42 = 0x8c;
  874.  
  875. // ***********************************
  876. // 0x0075
  877. // ***********************************
  878. [MODE]
  879.  0x0075;
  880. [MODEINFO]
  881.     ModeAttributes      = 0x1b;
  882.     WinAAttributes      = 7;
  883.     WinBAttributes      = 0;
  884.     WinAGranularity     = 64;
  885.     WinBGranularity     = 64;
  886.     WinASize            = 64;
  887.     WinBSize            = 64;
  888.     WinABase            = 0xa0000;
  889.     WinBBase            = 0xa0000;
  890.     BytesPerScanline    = 3200;
  891.     XResolution         = 800;
  892.     YResolution         = 600;
  893.     XCharSize           = 8;
  894.     YCharSize           = 8;
  895.     Colormodel          = 2;
  896.     BitsPerPixel        = 32;
  897.     NumberOfColors      = 16777216;
  898.     BitsRGB             = 6;
  899.     RedSize             = 8;
  900.     RedPosition         = 16;
  901.     GreenSize           = 8;
  902.     GreenPosition       = 8;
  903.     BlueSize            = 8;
  904.     BluePosition        = 0;
  905.     ReservedSize        = 8;
  906.     ReservedPosition    = 24;
  907.     NumberOfBanks       = 1;
  908.     BankSize            = 0;
  909.     MemoryModel         = 0x6;
  910.     NumberOfImagePages  = 0;
  911.  
  912. [SETMODE]
  913.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  914.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  915.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  916.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  917. //
  918.  r0  = 0x41; r1  = 0x31; r2  = 0x30; r3  = 0x04; r4  = 0x37;
  919.  r5  = 0x00; r6  = 0x7E; r7  = 0xF0; r8  = 0x00; r9  = 0x60;
  920.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xFF;
  921.  r15 = 0x00; r16 = 0x5F; r17 = 0x89; r18 = 0x57; r19 = 0x90;
  922.  r20 = 0x00; r21 = 0x57; r22 = 0x00; r23 = 0xE3; r24 = 0xFF;
  923.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  924.  
  925.  outb(0x3d4,0x3b);outb(0x3d5,0x36);
  926.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  927.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  928.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  929.  outb(0x3d4,0x67);outb(0x3d5,0x00);
  930.  outb(0x3d4,0x6d);outb(0x3d5,0x07);
  931.  
  932.  
  933. // TVP3026 clock synthesis
  934. // N/M/P value: AB 28 B1, DCLK = 65.08 MHz
  935.  outb(0x3d4,0x55); 
  936.  outb(0x3d5,0x00); outb(0x3c8,0x2C); outb(0x3d5,0x02); outb(0x3c6,0x22); 
  937.  outb(0x3d5,0x00); outb(0x3c8,0x2D); outb(0x3d5,0x02); outb(0x3c6,0x00); 
  938.  outb(0x3d5,0x00); outb(0x3c8,0x2F); outb(0x3d5,0x02); outb(0x3c6,0x00); 
  939.  
  940.  outb(0x3d5,0x00); outb(0x3c8,0x2C); outb(0x3d5,0x02); outb(0x3c6,0x00); 
  941.  outb(0x3d5,0x00); outb(0x3c8,0x2D); outb(0x3d5,0x02); outb(0x3c6,0xAB); 
  942.  outb(0x3d5,0x00); outb(0x3c8,0x2D); outb(0x3d5,0x02); outb(0x3c6,0x28); 
  943.  outb(0x3d5,0x00); outb(0x3c8,0x2D); outb(0x3d5,0x02); outb(0x3c6,0x31); 
  944.  
  945.  outb(0x3d5,0x00); outb(0x3c8,0x2C); outb(0x3d5,0x02); outb(0x3c6,0x02); 
  946.  outb(0x3d5,0x00); outb(0x3c8,0x2F); outb(0x3d5,0x02); outb(0x3c6,0xF9); 
  947.  outb(0x3d5,0x00); outb(0x3c8,0x2F); outb(0x3d5,0x02); outb(0x3c6,0x3D); 
  948.  outb(0x3d5,0x00); outb(0x3c8,0x2F); outb(0x3d5,0x02); outb(0x3c6,0xF1); 
  949.  
  950.  outb(0x3d5,0x00); outb(0x3c8,0x2D); outb(0x3d5,0x02); outb(0x3c6,0xB1); 
  951.  
  952.  //outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x28); 
  953.  
  954.  outb(0x3d5,0x00); outb(0x3c8,0x2C); outb(0x3d5,0x02); outb(0x3c6,0xFF); 
  955.  outb(0x3d5,0x00);
  956.  
  957. // Bit 2&3 set enable loading of DCLK parameters
  958.  outb(0x3c2,0x2f);
  959.  
  960. //# [SPEA]
  961.  //# SerialWord = 0xab28b1;
  962.  //# DacMode = 0x7;
  963.  //# Cr42 = 0x48;
  964.  
  965. // ***********************************
  966. // 0x0074
  967. // ***********************************
  968. [MODE]
  969.  0x0074;
  970. [MODEINFO]
  971.     ModeAttributes      = 0x1b;
  972.     WinAAttributes      = 7;
  973.     WinBAttributes      = 0;
  974.     WinAGranularity     = 64;
  975.     WinBGranularity     = 64;
  976.     WinASize            = 64;
  977.     WinBSize            = 64;
  978.     WinABase            = 0xa0000;
  979.     WinBBase            = 0xa0000;
  980.     BytesPerScanline    = 1600;
  981.     XResolution         = 800;
  982.     YResolution         = 600;
  983.     XCharSize           = 8;
  984.     YCharSize           = 8;
  985.     Colormodel          = 2;
  986.     BitsPerPixel        = 16;
  987.     NumberOfColors      = 65536;
  988.     BitsRGB             = 6;
  989.     RedSize             = 5;
  990.     RedPosition         = 11;
  991.     GreenSize           = 6;
  992.     GreenPosition       = 5;
  993.     BlueSize            = 5;
  994.     BluePosition        = 0;
  995.     ReservedSize        = 0;
  996.     ReservedPosition    = 0;
  997.     NumberOfBanks       = 1;
  998.     BankSize            = 0;
  999.     MemoryModel         = 0x6;
  1000.     NumberOfImagePages  = 0;
  1001.  
  1002. [SETMODE]
  1003.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1004.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1005.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1006.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1007.  
  1008.  r0  = 0x41; r1  = 0x32; r2  = 0x30; r3  = 0x04; r4  = 0x37;
  1009.  r5  = 0x00; r6  = 0x7e; r7  = 0xf0; r8  = 0x00; r9  = 0x60;
  1010.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1011.  r15 = 0x00; r16 = 0x5f; r17 = 0x89; r18 = 0x57; r19 = 0xc8;
  1012.  r20 = 0x00; r21 = 0x57; r22 = 0x00; r23 = 0xe3; r24 = 0xff;
  1013.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1014.  
  1015.  outb(0x3d4,0x3b);outb(0x3d5,0x36);
  1016.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1017.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1018.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1019.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  1020.  outb(0x3d4,0x6d);outb(0x3d5,0x03);
  1021.  
  1022.  
  1023. // TVP3026 clock synthesis
  1024. // N/M/P value: ab 28 b1, DCLK = 65.08 MHz
  1025.  outb(0x3d4,0x55);
  1026. // only p value
  1027.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1028. // pixel clock
  1029.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1030. // loop clock
  1031.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1032.  
  1033. // program pixel clock
  1034.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1035.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xab);
  1036.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x28);
  1037.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  1038.  
  1039. // program loop clock
  1040.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1041.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  1042.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1043.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  1044.  
  1045. // enable pixel clock (bit 7)
  1046.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  1047.  
  1048. // divider for pixel frequency
  1049.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x28);
  1050.  
  1051. // set index for PLL to status reg (R_ONLY)
  1052.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1053.  outb(0x3d5,0x00);
  1054.  
  1055. // Bit 2&3 set enable loading of DCLK parameters
  1056.  outb(0x3c2,0x2f);
  1057.  
  1058. //# [SPEA]
  1059.  //# SerialWord = 0xab28b1;
  1060.  //# DacMode = 0x5;
  1061.  //# Cr42 = 0x88;
  1062.  
  1063. // ***********************************
  1064. // 0x006B
  1065. // ***********************************
  1066. [MODE]
  1067.  0x006B;
  1068. [MODEINFO]
  1069.     ModeAttributes      = 0x1b;
  1070.     WinAAttributes      = 7;
  1071.     WinBAttributes      = 0;
  1072.     WinAGranularity     = 64;
  1073.     WinBGranularity     = 64;
  1074.     WinASize            = 64;
  1075.     WinBSize            = 64;
  1076.     WinABase            = 0xa0000;
  1077.     WinBBase            = 0xa0000;
  1078.     BytesPerScanline    = 800;
  1079.     XResolution         = 800;
  1080.     YResolution         = 600;
  1081.     XCharSize           = 8;
  1082.     YCharSize           = 8;
  1083.     Colormodel          = 1;
  1084.     BitsPerPixel        = 8;
  1085.     NumberOfColors      = 256;
  1086.     BitsRGB             = 6;
  1087.     NumberOfBanks       = 1;
  1088.     BankSize            = 0;
  1089.     MemoryModel         = 0x4;
  1090.     NumberOfImagePages  = 0;
  1091.  
  1092. [SETMODE]
  1093.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1094.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1095.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1096.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1097.  
  1098.  r0  = 0x41; r1  = 0x32; r2  = 0x30; r3  = 0x04; r4  = 0x37;
  1099.  r5  = 0x00; r6  = 0x7e; r7  = 0xf0; r8  = 0x00; r9  = 0x60;
  1100.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1101.  r15 = 0x00; r16 = 0x5f; r17 = 0x89; r18 = 0x57; r19 = 0x64;
  1102.  r20 = 0x00; r21 = 0x57; r22 = 0x00; r23 = 0xe3; r24 = 0xff;
  1103.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1104.  
  1105.  outb(0x3d4,0x3b);outb(0x3d5,0x36);
  1106.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1107.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1108.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1109.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  1110.  outb(0x3d4,0x6d);outb(0x3d5,0x01);
  1111.  
  1112.  
  1113. // TVP3026 clock synthesis
  1114. // N/M/P value: ab 28 b1, DCLK = 65.08 MHz
  1115.  outb(0x3d4,0x55);
  1116. // only p value
  1117.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1118. // pixel clock
  1119.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1120. // loop clock
  1121.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1122.  
  1123. // program pixel clock
  1124.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1125.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xab);
  1126.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x28);
  1127.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x31);
  1128.  
  1129. // program loop clock
  1130.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1131.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  1132.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1133.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf1);
  1134.  
  1135. // enable pixel clock (bit 7)
  1136.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  1137.  
  1138. // divider for pixel frequency
  1139.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x29);
  1140.  
  1141. // set index for PLL to status reg (R_ONLY)
  1142.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1143.  outb(0x3d5,0x00);
  1144.  
  1145. // Bit 2&3 set enable loading of DCLK parameters
  1146.  outb(0x3c2,0x2f);
  1147.  
  1148. //# [SPEA]
  1149.  //# SerialWord = 0xab28b1;
  1150.  //# DacMode = 0x2;
  1151.  //# Cr42 = 0x88;
  1152.  
  1153. // ***********************************
  1154. // 0x0072
  1155. // ***********************************
  1156. [MODE]
  1157.  0x0072;
  1158. [MODEINFO]
  1159.     ModeAttributes      = 0x1b;
  1160.     WinAAttributes      = 7;
  1161.     WinBAttributes      = 0;
  1162.     WinAGranularity     = 64;
  1163.     WinBGranularity     = 64;
  1164.     WinASize            = 64;
  1165.     WinBSize            = 64;
  1166.     WinABase            = 0xa0000;
  1167.     WinBBase            = 0xa0000;
  1168.     BytesPerScanline    = 2560;
  1169.     XResolution         = 640;
  1170.     YResolution         = 480;
  1171.     XCharSize           = 8;
  1172.     YCharSize           = 16;
  1173.     Colormodel          = 2;
  1174.     BitsPerPixel        = 32;
  1175.     NumberOfColors      = 16777216;
  1176.     BitsRGB             = 6;
  1177.     RedSize             = 8;
  1178.     RedPosition         = 16;
  1179.     GreenSize           = 8;
  1180.     GreenPosition       = 8;
  1181.     BlueSize            = 8;
  1182.     BluePosition        = 0;
  1183.     ReservedSize        = 8;
  1184.     ReservedPosition    = 24;
  1185.     NumberOfBanks       = 1;
  1186.     BankSize            = 0;
  1187.     MemoryModel         = 0x6;
  1188.     NumberOfImagePages  = 0;
  1189.  
  1190. [SETMODE]
  1191.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1192.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1193.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1194.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1195.  
  1196.  r0  = 0x2e; r1  = 0x27; r2  = 0x28; r3  = 0x11; r4  = 0x2b;
  1197.  r5  = 0x8f; r6  = 0xff; r7  = 0x1f; r8  = 0x00; r9  = 0x40;
  1198.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1199.  r15 = 0x00; r16 = 0xe4; r17 = 0x87; r18 = 0xdf; r19 = 0x40;
  1200.  r20 = 0x60; r21 = 0xdf; r22 = 0xff; r23 = 0xab; r24 = 0xff;
  1201.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1202.  
  1203.  outb(0x3d4,0x3b);outb(0x3d5,0x26);
  1204.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1205.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1206.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1207.  outb(0x3d4,0x67);outb(0x3d5,0x00);
  1208.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  1209.  
  1210.  
  1211. // TVP3026 clock synthesis
  1212. // N/M/P value: a6 1f b2, DCLK = 36060601 Hz
  1213.  outb(0x3d4,0x55);
  1214. // only p value
  1215.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1216. // pixel clock
  1217.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1218. // loop clock
  1219.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1220.  
  1221. // program pixel clock
  1222.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1223.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xa6);
  1224.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x1f);
  1225.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x32);
  1226.  
  1227. // program loop clock
  1228.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1229.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf9);
  1230.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1231.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1232.  
  1233. // enable pixel clock (bit 7)
  1234.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1235.  
  1236. // divider for pixel frequency
  1237.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x28);
  1238.  
  1239. // set index for PLL to status reg (R_ONLY)
  1240.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1241.  outb(0x3d5,0x00);
  1242.  
  1243. // Bit 2&3 set enable loading of DCLK parameters
  1244.  outb(0x3c2,0xef);
  1245.  
  1246. //# [SPEA]
  1247.  //# SerialWord = 0xa61fb2;
  1248.  //# DacMode = 0x7;
  1249.  //# Cr42 = 0x93;
  1250.  
  1251. // ***********************************
  1252. // 0x0071
  1253. // ***********************************
  1254. [MODE]
  1255.  0x0071;
  1256. [MODEINFO]
  1257.     ModeAttributes      = 0x1b;
  1258.     WinAAttributes      = 7;
  1259.     WinBAttributes      = 0;
  1260.     WinAGranularity     = 64;
  1261.     WinBGranularity     = 64;
  1262.     WinASize            = 64;
  1263.     WinBSize            = 64;
  1264.     WinABase            = 0xa0000;
  1265.     WinBBase            = 0xa0000;
  1266.     BytesPerScanline    = 1280;
  1267.     XResolution         = 640;
  1268.     YResolution         = 480;
  1269.     XCharSize           = 8;
  1270.     YCharSize           = 16;
  1271.     Colormodel          = 2;
  1272.     BitsPerPixel        = 16;
  1273.     NumberOfColors      = 65536;
  1274.     BitsRGB             = 6;
  1275.     RedSize             = 5;
  1276.     RedPosition         = 11;
  1277.     GreenSize           = 6;
  1278.     GreenPosition       = 5;
  1279.     BlueSize            = 5;
  1280.     BluePosition        = 0;
  1281.     ReservedSize        = 0;
  1282.     ReservedPosition    = 0;
  1283.     NumberOfBanks       = 1;
  1284.     BankSize            = 0;
  1285.     MemoryModel         = 0x6;
  1286.     NumberOfImagePages  = 0;
  1287.  
  1288. [SETMODE]
  1289.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1290.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1291.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1292.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1293.  
  1294.  r0  = 0x2e; r1  = 0x27; r2  = 0x28; r3  = 0x11; r4  = 0x2b;
  1295.  r5  = 0x8f; r6  = 0xff; r7  = 0x1f; r8  = 0x00; r9  = 0x40;
  1296.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1297.  r15 = 0x00; r16 = 0xe4; r17 = 0x87; r18 = 0xdf; r19 = 0xa0;
  1298.  r20 = 0x60; r21 = 0xdf; r22 = 0xff; r23 = 0xab; r24 = 0xff;
  1299.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1300.  
  1301.  outb(0x3d4,0x3b);outb(0x3d5,0x26);
  1302.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1303.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1304.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1305.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  1306.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  1307.  
  1308.  
  1309. // TVP3026 clock synthesis
  1310. // N/M/P value: a6 1f b2, DCLK = 36.06 MHz
  1311.  outb(0x3d4,0x55);
  1312. // only p value
  1313.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1314. // pixel clock
  1315.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1316. // loop clock
  1317.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1318.  
  1319. // program pixel clock
  1320.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1321.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xa6);
  1322.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x1f);
  1323.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x32);
  1324.  
  1325. // program loop clock
  1326.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1327.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb1);
  1328.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1329.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1330.  
  1331. // enable pixel clock (bit 7)
  1332.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1333.  
  1334. // divider for pixel frequency
  1335.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x28);
  1336.  
  1337. // set index for PLL to status reg (R_ONLY)
  1338.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1339.  outb(0x3d5,0x00);
  1340.  
  1341. // Bit 2&3 set enable loading of DCLK parameters
  1342.  outb(0x3c2,0xef);
  1343.  
  1344. //# [SPEA]
  1345.  //# SerialWord = 0xa61fb2;
  1346.  //# DacMode = 0x5;
  1347.  //# Cr42 = 0xc3;
  1348.  
  1349. // ***********************************
  1350. // 0x0069
  1351. // ***********************************
  1352. [MODE]
  1353.  0x0069;
  1354. [MODEINFO]
  1355.     ModeAttributes      = 0x1b;
  1356.     WinAAttributes      = 7;
  1357.     WinBAttributes      = 0;
  1358.     WinAGranularity     = 64;
  1359.     WinBGranularity     = 64;
  1360.     WinASize            = 64;
  1361.     WinBSize            = 64;
  1362.     WinABase            = 0xa0000;
  1363.     WinBBase            = 0xa0000;
  1364.     BytesPerScanline    = 640;
  1365.     XResolution         = 640;
  1366.     YResolution         = 480;
  1367.     XCharSize           = 8;
  1368.     YCharSize           = 16;
  1369.     Colormodel          = 1;
  1370.     BitsPerPixel        = 8;
  1371.     NumberOfColors      = 256;
  1372.     BitsRGB             = 6;
  1373.     NumberOfBanks       = 1;
  1374.     BankSize            = 0;
  1375.     MemoryModel         = 0x4;
  1376.     NumberOfImagePages  = 0;
  1377.  
  1378. [SETMODE]
  1379.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1380.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1381.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1382.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1383.  
  1384.  r0  = 0x2e; r1  = 0x27; r2  = 0x28; r3  = 0x11; r4  = 0x2b;
  1385.  r5  = 0x8f; r6  = 0xff; r7  = 0x1f; r8  = 0x00; r9  = 0x40;
  1386.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1387.  r15 = 0x00; r16 = 0xe4; r17 = 0x87; r18 = 0xdf; r19 = 0x50;
  1388.  r20 = 0x60; r21 = 0xdf; r22 = 0xff; r23 = 0xab; r24 = 0xff;
  1389.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1390.  
  1391.  outb(0x3d4,0x3b);outb(0x3d5,0x26);
  1392.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1393.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1394.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1395.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  1396.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  1397.  
  1398.  
  1399. // TVP3026 clock synthesis
  1400. // N/M/P value: a6 1f b2, DCLK = 36.06 MHz
  1401.  outb(0x3d4,0x55);
  1402. // only p value
  1403.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1404. // pixel clock
  1405.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1406. // loop clock
  1407.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1408.  
  1409. // program pixel clock
  1410.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1411.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xa6);
  1412.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x1f);
  1413.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x32);
  1414.  
  1415. // program loop clock
  1416.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1417.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  1418.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1419.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1420.  
  1421. // enable pixel clock (bit 7)
  1422.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb2);
  1423.  
  1424. // divider for pixel frequency
  1425.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x29);
  1426.  
  1427. // set index for PLL to status reg (R_ONLY)
  1428.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1429.  outb(0x3d5,0x00);
  1430.  
  1431. // Bit 2&3 set enable loading of DCLK parameters
  1432.  outb(0x3c2,0xef);
  1433.  
  1434. //# [SPEA]
  1435.  //# SerialWord = 0xa61fb2;
  1436.  //# DacMode = 0x2;
  1437.  //# Cr42 = 0xc3;
  1438.  
  1439. // ***********************************
  1440. // 0x0068
  1441. // ***********************************
  1442. [MODE]
  1443.  0x0068;
  1444. [MODEINFO]
  1445.     ModeAttributes      = 0x1b;
  1446.     WinAAttributes      = 7;
  1447.     WinBAttributes      = 0;
  1448.     WinAGranularity     = 64;
  1449.     WinBGranularity     = 64;
  1450.     WinASize            = 64;
  1451.     WinBSize            = 64;
  1452.     WinABase            = 0xa0000;
  1453.     WinBBase            = 0xa0000;
  1454.     BytesPerScanline    = 640;
  1455.     XResolution         = 640;
  1456.     YResolution         = 400;
  1457.     XCharSize           = 8;
  1458.     YCharSize           = 16;
  1459.     Colormodel          = 1;
  1460.     BitsPerPixel        = 8;
  1461.     NumberOfColors      = 256;
  1462.     BitsRGB             = 6;
  1463.     NumberOfBanks       = 1;
  1464.     BankSize            = 0;
  1465.     MemoryModel         = 0x4;
  1466.     NumberOfImagePages  = 0;
  1467.  
  1468. [SETMODE]
  1469.  outb(0x3d4,0x38);outb(0x3d5,0x48);      // unlock S3 registers (30..3c);
  1470.  outb(0x3d4,0x39);outb(0x3d5,0xa5);      // unlock system + extension (40..5f);
  1471.  outb(0x3d4,0x35);outb(0x3d5,0x00);      // unlock timing regs;
  1472.  outb(0x3d4,0x11);outb(0x3d5,0x00);      // unlock timing regs;
  1473.  
  1474.  r0  = 0x2d; r1  = 0x27; r2  = 0x28; r3  = 0x01; r4  = 0x2a;
  1475.  r5  = 0x10; r6  = 0xbf; r7  = 0x1f; r8  = 0x00; r9  = 0x40;
  1476.  r10 = 0x00; r11 = 0x00; r12 = 0x00; r13 = 0x00; r14 = 0xff;
  1477.  r15 = 0x00; r16 = 0x9c; r17 = 0x8e; r18 = 0x8f; r19 = 0x50;
  1478.  r20 = 0x40; r21 = 0x96; r22 = 0xb9; r23 = 0xa3; r24 = 0xff;
  1479.  boutb(25,0x3d4,0x3d5);// forced display start address to 0,0
  1480.  
  1481.  outb(0x3d4,0x3b);outb(0x3d5,0x26);
  1482.  outb(0x3d4,0x34);outb(0x3d5,0x00);
  1483.  outb(0x3d4,0x5d);outb(0x3d5,0x00);
  1484.  outb(0x3d4,0x5e);outb(0x3d5,0x00);
  1485.  outb(0x3d4,0x67);outb(0x3d5,0x10);
  1486.  outb(0x3d4,0x6d);outb(0x3d5,0x10);
  1487.  
  1488.  
  1489. // TVP3026 clock synthesis
  1490. // N/M/P value: fd 3a b3, DCLK = 25056815 Hz
  1491.  outb(0x3d4,0x55);
  1492. // only p value
  1493.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x22);
  1494. // pixel clock
  1495.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1496. // loop clock
  1497.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1498.  
  1499. // program pixel clock
  1500.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x00);
  1501.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xfd);
  1502.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x3a);
  1503.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0x33);
  1504.  
  1505. // program loop clock
  1506.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0x02);
  1507.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xa1);
  1508.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0x3d);
  1509.  outb(0x3d5,0x00); outb(0x3c8,0x2f); outb(0x3d5,0x02); outb(0x3c6,0xf3);
  1510.  
  1511. // enable pixel clock (bit 7)
  1512.  outb(0x3d5,0x00); outb(0x3c8,0x2d); outb(0x3d5,0x02); outb(0x3c6,0xb3);
  1513.  
  1514. // divider for pixel frequency
  1515.  outb(0x3d5,0x00); outb(0x3c8,0x39); outb(0x3d5,0x02); outb(0x3c6,0x3b);
  1516.  
  1517. // set index for PLL to status reg (R_ONLY)
  1518.  outb(0x3d5,0x00); outb(0x3c8,0x2c); outb(0x3d5,0x02); outb(0x3c6,0xff);
  1519.  outb(0x3d5,0x00);
  1520.  
  1521. // Bit 2&3 set enable loading of DCLK parameters
  1522.  outb(0x3c2,0xef);
  1523.  
  1524. //# [SPEA]
  1525.  //# SerialWord = 0xfd3ab3;
  1526.  //# DacMode = 0x2;
  1527.  //# Cr42 = 0x80;
  1528.  
  1529.