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2 byte opcodes
© 1996-1997 by Christian Ludloff. Last updated on Sunday, 16-Nov-97 19:30:00 EST.
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| available opcode tables |
1byte opcodes |
2 byte opcodes |
group #0..A opcodes |
ESC (=FPU) opcodes |
opcode encoding |
16bit modR/M byte |
32bit modR/M byte |
32bit SIB byte |
|---|
| 0Fh xxh |
x0h | x1h | x2h | x3h | x4h | x5h | x6h | x7h |
|---|---|---|---|---|---|---|---|---|
| 0xh |
group #6 | group #7 | LAR Gv,Ew |
LSL Gv,Ew |
LOADALL? (80286) |
LOADALL (80286) (note) |
CLTS | LOADALL (80386) (note) |
| 1xh |
UMOV Eb,Gb (80386/486) |
UMOV Ev,Gv (80386/486) |
UMOV Gb,Eb (80386/486) |
UMOV Gv,Ev (80386/486) |
||||
| 2xh |
MOV Rd,Cd (80386+) |
MOV Rd,Dd (80386+) |
MOV Cd,Rd (80386+) |
MOV Dd,Rd (80386+) |
MOV Rd,Td (80386/486) |
MOV Td,Rd (80386/486) |
||
| 3xh |
WRMSR (Pentium+) |
RDTSC (Pentium+) |
RDMSR (Pentium+) |
RDPMC (PentiumPro) |
? (PentiumPro) |
? (PentiumPro) |
(note) | (note) |
| 4xh |
CMOVO Gv,Ev (PentiumPro) |
CMOVNO Gv,Ev (PentiumPro) |
CMOVB Gv,Ev (PentiumPro) |
CMOVNB Gv,Ev (PentiumPro) |
CMOVZ Gv,Ev (PentiumPro) |
CMOVNZ Gv,Ev (PentiumPro) |
CMOVBE Gv,Ev (PentiumPro) |
CMOVNBE Gv,Ev (PentiumPro) |
| 5xh |
||||||||
| 6xh |
PUNPCKL- BW Pq,Qd (MMX) |
PUNPCKL- WD Pq,Qd (MMX) |
PUNPCKL- DQ Pq,Qd (MMX) |
PACKSSWB Pq,Qq (MMX) |
PCMPGTB Pq,Qq (MMX) |
PCMPGTW Pq,Qq (MMX) |
PCMPGTD Pq,Qq (MMX) |
PACKUSWB Pq,Qq (MMX) |
| 7xh |
group #A PSHIMW (MMX) |
group #A PSHIMD (MMX) |
group #A PSHIMQ (MMX) |
PCMPEQB Pq,Qq (MMX) |
PCMPEQW Pq,Qq (MMX) |
PCMPEQD Pq,Qq (MMX) |
EMMS (MMX) |
|
| 8xh |
JO Jv (80386+) |
JNO Jv (80386+) |
JB Jv (80386+) |
JNB Jv (80386+) |
JZ Jv (80386+) |
JNZ Jv (80386+) |
JBE Jv (80386+) |
JNBE Jv (80386+) |
| 9xh |
SETO Eb (80386+) |
SETNO Eb (80386+) |
SETB Eb (80386+) |
SETNB Eb (80386+) |
SETZ Eb (80386+) |
SETNZ Eb (80386+) |
SETBE Eb (80386+) |
SETNBE Eb (80386+) |
| Axh |
PUSH FS (80386+) |
POP FS (80386+) |
CPUID (80486+) |
BT Ev,Gv (80386+) |
SHLD Ev,Gv,Ib (80386+) |
SHLD Ev,Gv,CL (80386+) |
XBTS and CMPXCHG (80386/486-A) |
IBTS and CMPXCHG (80386/486-A) |
| Bxh |
CMPXCHG Eb,Gb (80486-B+) |
CMPXCHG Ev,Gv (80486-B+) |
LSS Gv,Mp (80386+) |
BTR Ev,Gv (80386+) |
LFS Gv,Mp (80386+) |
LGS Gv,Mp (80386+) |
MOVZX Gv,Eb (80386+) |
MOVZX Gv,Ew (80386+) |
| Cxh |
XADD Eb,Gb (80486+) |
XADD Ev,Gv (80486+) |
group #9 (Pentium+) |
|||||
| Dxh |
PSRLW Pq,Qq (MMX) |
PSRLD Pq,Qq (MMX) |
PSRLQ Pq,Qq (MMX) |
PMULLW Pq,Qq (MMX) |
||||
| Exh |
PSRAW Pq,Qq (MMX) |
PSRAD Pq,Qq (MMX) |
PMULHW Pq,Qq (MMX) |
|||||
| Fxh |
PSLLW Pq,Qq (MMX) |
PSLLD Pq,Qq (MMX) |
PSLLQ Pq,Qq (MMX) |
PMADDWD Pq,Qq (MMX) |
| 0Fh xxh |
x8h | x9h | xAh | xBh | xCh | xDh | xEh | xFh |
|---|---|---|---|---|---|---|---|---|
| 0xh |
INVD (80486+) |
WBINVD (80486+) |
UD1 (80286+) |
|||||
| 1xh |
? (PentiumPro) |
? (PentiumPro) |
? (PentiumPro) |
? (PentiumPro) |
? (PentiumPro) |
? (PentiumPro) |
? (PentiumPro) |
? (PentiumPro) |
| 2xh |
||||||||
| 3xh |
(note) | |||||||
| 4xh |
CMOVS Gv,Ev (PentiumPro) |
CMOVNS Gv,Ev (PentiumPro) |
CMOVP Gv,Ev (PentiumPro) |
CMOVNP Gv,Ev (PentiumPro) |
CMOVL Gv,Ev (PentiumPro) |
CMOVNL Gv,Ev (PentiumPro) |
CMOVLE Gv,Ev (PentiumPro) |
CMOVNLE Gv,Ev (PentiumPro) |
| 5xh |
||||||||
| 6xh |
PUNPCKH- BW Pq,Qq (MMX) |
PUNPCKH- WD Pq,Qq (MMX) |
PUNPCKH- DQ Pq,Qq (MMX) |
PACKSSDW Pq,Qq (MMX) |
MOVD Pq,Ed (MMX) |
MOVQ Pq,Qq (MMX) |
||
| 7xh |
(note) | MOVD Ed,Pd (MMX) |
MOVQ Qq,Pq (MMX) |
|||||
| 8xh |
JS Jv (80386+) |
JNS Jv (80386+) |
JP Jv (80386+) |
JNP Jv (80386+) |
JL Jv (80386+) |
JNL Jv (80386+) |
JLE Jv (80386+) |
JNLE Jv (80386+) |
| 9xh |
SETS Eb (80386+) |
SETNS Eb (80386+) |
SETP Eb (80386+) |
SETNP Eb (80386+) |
SETL Eb (80386+) |
SETNL Eb (80386+) |
SETLE Eb (80386+) |
SETNLE Eb (80386+) |
| Axh |
PUSH GS (80386+) |
POP GS (80386+) |
RSM (SMM) (80386SL+?) |
BTS Ev,Gv (80386+) |
SHRD Ev,Gv,Ib (80386+) |
SHRD Ev,Gv,CL (80386+) |
IMUL Gv,Ev (80386+) |
|
| Bxh |
UD2 (80286+) |
group #8 Ev,Ib (80386+) |
BTC Ev,Gv (80386+) |
BSF Ev,Gv (80386+) |
BSR Ev,Gv (80386+) |
MOVSX Gv,Eb (80386+) |
MOVSX Gv,Ew (80386+) |
|
| Cxh |
BSWAP EAX (80486+) |
BSWAP ECX (80486+) |
BSWAP EDX (80486+) |
BSWAP EBX (80486+) |
BSWAP ESP (80486+) |
BSWAP EBP (80486+) |
BSWAP ESI (80486+) |
BSWAP EDI (80486+) |
| Dxh |
PSUBUSB Pq,Qq (MMX) |
PSUBUSW Pq,Qq (MMX) |
PAND Pq,Qq (MMX) |
PADDUSB Pq,Qq (MMX) |
PADDUSW Pq,Qq (MMX) |
PANDN Pq,Qq (MMX) |
||
| Exh |
PSUBSB Pq,Qq (MMX) |
PSUBSW Pq,Qq (MMX) |
POR Pq,Qq (MMX) |
PADDSB Pq,Qq (MMX) |
PADDSW Pq,Qq (MMX) |
PXOR Pq,Qq (MMX) |
||
| Fxh |
PSUBB Pq,Qq (MMX) |
PSUBW Pq,Qq (MMX) |
PSUBD Pq,Qq (MMX) |
PADDB Pq,Qq (MMX) |
PADDW Pq,Qq (MMX) |
PADDD Pq,Qq (MMX) |
The AMD K6 processor supports the SYSCALL and SYSRET opcodes, if EFER.SEC=1. Also AMD claims that all future K86 family processors will generate a #UD exception on the opcode 0Fh FFh.
| 0Fh 05h |
0Fh 07h | 0Fh FFh |
|---|---|---|
| SYSCALL |
SYSRET | UD |
A Cyrix processor supports the following opcodes, if certain conditions are met, which are listed in Appendix B of the Cyrix AP-107 application note for all Cyrix processors.
| 0Fh xxh |
x8h | x9h | xAh | xBh | xCh | xDh | xEh | xFh |
|---|---|---|---|---|---|---|---|---|
| 7xh |
SVDC | RSDC | SVLDT | RSLDT | SVTS | RSTS | SMINT |
In addition a Cyrix 6x86MX processor supports the following opcodes, if these conditions are met. Note, that the SMINT instruction had to be assigned to a new opcode, since the old opcode, 0Fh 7Eh, is used by a MMX instruction now. For further details about these opcodes refer to the Cyrix SMM documentation, please.
| 0Fh xxh |
x6h | x7h | x8h |
|---|---|---|---|
| 3xh |
RDSHR | WRSHR | SMINT |
Furthermore, a Cyrix 6x86MX processor supports the following extended MMX
instruction opcodes, if the CCR7.MMX_PLUS bit
is set. For a detailed description refer to the Cyrix
AP-108 application note.
| 0Fh xxh |
x0h | x1h | x2h | x3h | x4h | x5h | x6h | x7h |
|---|---|---|---|---|---|---|---|---|
| 5xh |
PAVEB Pq,Qq |
PADDSIW Pq,Qq |
PMAGW Pq,Qq |
PDISTIB Pq,Mq |
PSUBSIW Pq,Qq |
|||
| 0Fh xxh |
x8h | x9h | xAh | xBh | xCh | xDh | xEh | xFh |
| 5xh |
PMVZB Pq,Mq |
PMULHRW Pq,Qq |
PMVNZB Pq,Mq |
PMVLZB Pq,Mq |
PMVGEZB Pq,Mq |
PMULHRIW Pq,Qq |
PMACHRIW Pq,Mq |
