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/* HEADER: CUG267; TITLE: 2650 Cross-Assembler (Portable); FILENAME: A26.DOC; VERSION: 0.1; DATE: 08/27/1988; SEE-ALSO: A26.H; AUTHORS: William C. Colley, III; */ 2650 Cross-Assembler (Portable) Version 0.1 Copyright (c) 1985,1987 William C. Colley, III The manual such as it is. Legal Note: This package may be used for any commercial or non-commercial purpose. It may be copied and distributed freely provided that any fee charged by the distributor of the copy does not exceed the sum of: 1) the cost of the media the copy is written on, 2) any required costs of shipping the copy, and 3) a nominal handling fee. Any other distribution requires the written permission of the author. Also, the author's copyright notices shall not be removed from the program source, the program object, or the program documentation. Table of Contents 1.0 How to Use the Cross-Assembler Package .................. 3 2.0 Format of Cross-Assembler Source Lines .................. 4 2.1 Labels ............................................. 5 2.2 Numeric Constants .................................. 5 2.3 String Constants ................................... 5 2.4 Expressions ........................................ 6 3.0 Machine Opcodes ......................................... 7 3.1 Opcodes -- No Arguments ............................ 8 3.2 Opcodes -- Register Operations ..................... 8 3.3 Opcodes -- Register-to-Register Operations ......... 8 3.4 Opcodes -- Register Immediate Operations ........... 8 3.5 Opcodes -- Register Relative Operations ............ 9 3.6 Opcodes -- Register Absolute Operations ............ 9 3.7 Opcodes -- Zero-Relative Branches .................. 9 3.8 Opcodes -- Conditional Relative Branches ........... 10 3.9 Opcodes -- Conditional Absolute Branches ........... 10 3.10 Opcodes -- Register Relative Branches .............. 10 3.11 Opcodes -- Register Absolute Branches .............. 10 3.12 Opcodes -- Indexed Branches ........................ 11 3.13 Opcodes -- Conditional Returns ..................... 11 4.0 Pseudo Opcodes .......................................... 11 4.1 Pseudo-ops -- ACON ................................. 11 4.2 Pseudo-ops -- DATA ................................. 11 4.3 Pseudo-ops -- EJE .................................. 12 4.4 Pseudo-ops -- END .................................. 12 4.5 Pseudo-ops -- EQU .................................. 12 4.6 Pseudo-ops -- IF, ELSE, ENDI ....................... 13 4.7 Pseudo-ops -- INCL ................................. 13 4.8 Pseudo-ops -- ORG .................................. 14 4.9 Pseudo-ops -- RES .................................. 14 4.10 Pseudo-ops -- SET .................................. 14 4.11 Pseudo-ops -- TITL ................................. 14 5.0 Assembly Errors ......................................... 15 5.1 Error * -- Missing Statement ....................... 15 5.2 Error ( -- Parenthesis Imbalance ................... 15 5.3 Error " -- Missing Quotation Mark .................. 15 5.4 Error A -- Address Can't Be Reached ................ 15 5.5 Error C -- Illegal Condition Code .................. 16 5.6 Error D -- Illegal Digit ........................... 16 5.7 Error E -- Illegal Expression ...................... 16 5.8 Error F -- Control Flow Error ...................... 16 5.9 Error I -- IF-ENDIF Imbalance ...................... 16 5.10 Error L -- Illegal Label ........................... 17 5.11 Error M -- Multiply Defined Label .................. 17 5.12 Error O -- Illegal Opcode .......................... 17 5.13 Error P -- Phasing Error ........................... 17 5.14 Error R -- Illegal Register ........................ 17 5.15 Error S -- Illegal Syntax .......................... 18 5.16 Error T -- Too Many Arguments ...................... 18 5.17 Error U -- Undefined Label ......................... 18 5.18 Error V -- Illegal Value ........................... 18 1 6.0 Warning Messages ........................................ 18 6.1 Warning -- Illegal Option Ignored .................. 18 6.2 Warning -- -l Option Ignored -- No File Name ....... 19 6.3 Warning -- -o Option Ignored -- No File Name ....... 19 6.4 Warning -- Extra Source File Ignored ............... 19 6.5 Warning -- Extra Listing File Ignored .............. 19 6.6 Warning -- Extra Object File Ignored ............... 19 7.0 Fatal Error Messages .................................... 19 7.1 Fatal Error -- No Source File Specified ............ 19 7.2 Fatal Error -- Source File Did Not Open ............ 19 7.3 Fatal Error -- Listing File Did Not Open ........... 20 7.4 Fatal Error -- Object File Did Not Open ............ 20 7.5 Fatal Error -- Error Reading Source File ........... 20 7.6 Fatal Error -- Disk or Directory Full .............. 20 7.7 Fatal Error -- File Stack Overflow ................. 20 7.8 Fatal Error -- If Stack Overflow ................... 20 7.9 Fatal Error -- Too Many Symbols .................... 20 2 1.0 How to Use the Cross-Assembler Package First, the question, "What does a cross-assembler do?" needs to be addressed as there is considerable confusion on this point. A cross-assembler is just like any other assembler except that it runs on some CPU other than the one for which it assembles code. For example, this package assembles 2650 source code into 2650 object code, but it runs on a Z-80, an 8088, a 68000, or whatever other CPU you happen to have a C compiler for. The reason that cross-assemblers are useful is that you probably already have a CPU with memory, disk drives, a text editor, an operating system, and all sorts of hard-to-build or expensive facilities on hand. A cross-assembler allows you to use these facilites to develop code for an 2650. This program requires one input file (your 2650 source code) and zero to two output files (the listing and the object). The input file MUST be specified, or the assembler will bomb on a fatal error. The listing and object files are optional. If no listing file is specified, no listing is generated, and if no object file is specified, no object is generated. If the object file is specified, the object is written to this file in "Intel hexadecimal" format. The command line for the cross-assembler looks like this: A26 source_file { >list_file } { -o object_file } where the { } indicates that the specified item is optional. Some examples are in order: a26 test26.asm source: test26.asm listing: none object: none a26 test26.asm -l test26.prn source: test26.asm listing: test26.prn object: none a26 test26.asm -o test26.hex source: test26.asm listing: none object: test26.hex a26 test26.asm -l test26.prn -o test26.hex source: test26.asm listing: test26.prn object: test26.hex The order in which the source, listing, and object files are specified does not matter. Note that no default file name exten- sions are supplied by the assembler as this gives rise to porta- bility problems. 3 2.0 Format of Cross-Assembler Source Lines The source file that the cross-assembler processes into a listing and an object is an ASCII text file that you can prepare with whatever editor you have at hand. The most-significant (parity) bit of each character is cleared as the character is read from disk by the cross-assembler, so editors that set this bit (such as WordStar's document mode) should not bother this program. All printing characters, the ASCII TAB character (09H), and newline character(s) are processed by the assembler. All other characters are passed through to the listing file, but are otherwise ignored. The source file is divided into lines by newline char- acter(s). The internal buffers of the cross-assembler will accommodate lines of up to 255 characters which should be more than ample for almost any job. If you must use longer lines, change the constant MAXLINE in file A26.H and recompile the cross-assembler. Otherwise, you will overflow the buffers, and the program will mysteriously crash. Each source line is made up of three fields: the label field, the opcode field, and the argument field. The label field is optional, but if it is present, it must begin in column 1. The opcode field is optional, but if it is present, it must not begin in column 1. If both a label and an opcode are present, one or more spaces and/or TAB characters must separate the two. If the opcode requires arguments, they are placed in the argument field which is separated from the opcode field by one or more spaces and/or TAB characters. Finally, an optional comment can be added to the end of the line. This comment must begin with a semicolon which signals the assembler to pass the rest of the line to the listing and otherwise ignore it. Thus, the source line looks like this: {label}{ opcode{ arguments}}{;commentary} where the { } indicates that the specified item is optional. Some examples are in order: column 1 | v GRONK STRA,R0 *PTR,R3,+ ; This line has everything. LODA,R0 *PTR,R3 ; This line has no label. BEEP ; This line has no opcode. ; This line has no label and no opcode. ; The previous line has nothing at all. END ; This line has no argument. 4 2.1 Labels A label is any sequence of alphabetic or numeric characters starting with an alphabetic. The legal alphabetics are: ! # $ % & , . : ? @ [ \ ] ^ _ ` { | } ~ A-Z a-z The numeric characters are the digits 0-9. Note that "A" is not the same as "a" in a label. This can explain mysterious U (undefined label) errors occurring when a label appears to be defined. A label is permitted on any line except a line where the opcode is IF, ELSE, or ENDI. The label is assigned the value of the assembly program counter before any of the rest of the line is processed except when the opcode is EQU, ORG, or SET. Labels can have the same name as opcodes, but they cannot have the same name as operators or registers. The reserved (operator and register) names are: $ AND EQ GE GT HIGH LE LT LOW MOD NE NOT OR SHL SHR XOR If a label is used in an expression before it is assigned a value, the label is said to be "forward-referenced." For example: L1 EQU L2 + 1 ; L2 is forward-referenced here. L2 L3 EQU L2 + 1 ; L2 is not forward-referenced here. 2.2 Numeric Constants Numeric constants are formed according to the Intel convention. A numeric constant starts with a numeric character (0-9), continues with zero or more digits (0-9, A-F), and ends with an optional base designator. The base designators are H for hexadecimal, none or D for decimal, O or Q for octal, and B for binary. The hex digits a-f are converted to upper case by the assembler. Note that a numeric constant cannot begin with A-F as it would be indistinguishable from a label. Thus, all of the following evaluate to 255 (decimal): 0ffH 255 255D 377O 377Q 11111111B 2.3 String Constants A string constant is zero or more characters enclosed in either single quotes (' ') or double quotes (" "). Single quotes only match single quotes, and double quotes only match double quotes, so if you want to put a single quote in a string, you can 5 do it like this: "'". In all contexts except the DATA statement, the first character or two of the string constant are all that are used. The rest is ignored. Noting that the ASCII codes for "A" and "B" are 41H and 42H, respectively, will explain the following examples: "" and '' evaluate to 0000H "A" and 'A' evaluate to 0041H "AB" evaluates to 4142H Note that the null string "" is legal and evaluates to 0000H. 2.4 Expressions An expression is made up of labels, numeric constants, and string constants glued together with arithmetic operators, logical operators, and parentheses in the usual way that algebraic expressions are made. Operators have the following fairly natural order of precedence: Highest anything in parentheses unary +, unary - *, /, MOD, SHL, SHR binary +, binary - LT, LE, EQ, GE, GT, NE NOT AND OR, XOR Lowest HIGH, LOW A few notes about the various operators are in order: 1) The remainder operator MOD yields the remainder from dividing its left operand by its right operand. 2) The shifting operators SHL and SHR shift their left operand to the left or right the number of bits specified by their right operand. 3) The relational operators LT, LE, EQ, GE, GT, and NE can also be written as <, <= or =<, =, >= or =>, and <> or ><, respectively. They evaluate to 0FFFFH if the statement is true, 0 otherwise. 4) The logical opeators NOT, AND, OR, and XOR do bitwise operations on their operand(s). 5) HIGH and LOW extract the high or low byte, of an expression. 6) The special symbol $ can be used in place of a label or constant to represent the value of the program counter before any of the current line has been processed. 6 Some examples are in order at this point: 2 + 3 * 4 evaluates to 14 (2 + 3) * 4 evaluates to 20 NOT 11110000B XOR 00001010B evaluates to 00000101B HIGH 1234H SHL 1 evaluates to 0024H 001Q EQ 0 evaluates to 0 001Q = 2 SHR 1 evaluates to 0FFFFH All arithmetic is unsigned with overflow from the 16-bit word ignored. Thus: 32768 * 2 evaluates to 0 3.0 Machine Opcodes The opcodes of the 2650 processor are divided into groups below by the type of arguments required in the argument field of the source line. If an opcode requires multiple arguments, these must be placed in the argument field in order and separated by commas. The following shorthand notations are used in the succeeding sections of the manual: CC a label or numeric constant with a value from 0 to 3 that specifies the condition under which the branch is or is not taken. Rn a label or numeric constant with a value from 0 to 3 that specifies which register the operation applies to. immed an expression that has a value in the range -128 to 255. mask an expression that has a value in the range 0 to 255. rel an expression that evaluates to an address in the range -62 to +65 bytes from the beginning of the current instruction. Bear in mind that 2650 address calculations are done modulo 8192 and that the upper two address bits are unchanged by the computation. Therefore, the target address must be on the same 8K byte page as the instruction. zrel same as rel above except that the allowable range is -64 to +63 bytes from location 0. The upper two address bits are set to 0 during the address computation, so the address must be on 8K byte page 0. abs_13 an expression that evaluates to an address on the 7 same 8K byte page as the current instruction. abs_15 an expression that evaluates to an address anywhere in the range 0 to 7FFFH. [ ] Optional items are enclosed in square brackets. + either a + sign or a - sign. 3.1 Opcodes -- No Arguments The following opcodes allow no arguments at all in their argument fields: HALT LPSL LPSU NOP SPSL SPSU 3.2 Opcodes -- Register Operations The opcodes in this group go like this: DAR,Rn RRR,Rn REDC,Rn WRTC,Rn REDD,Rn WRTD,Rn RRL,Rn 3.3 Opcodes -- Register-to-Register Operations The opcodes in this group operate between a specified register and R0. They go like this: ADDZ Rn ANDZ Rn ;ANDZ R0 will cause an R error ; since 040H is the opcode for ; HALT. COMZ Rn EORZ Rn IORZ Rn LODZ Rn ;LODZ R0 is converted to IORZ R0 ; since opcode 00H is illegal. STRZ Rn ;STRZ R0 will cause an R error ; since 0C0H is the opcode for ; NOP. SUBZ Rn 3.4 Opcodes -- Register Immediate Operations The opcodes in this group operate between a specified register and an immediate value found in the second byte of the instruction. They go like this: ADDI,Rn immed 8 ANDI,Rn immed COMI,Rn immed CPSL mask ;These two operate on the CPSU mask ; program status register. EORI,Rn immed IORI,Rn immed LODI,Rn immed PPSL mask ;These two operate on the PPSU mask ; program status register. SUBI,Rn immed TMI,Rn mask TPSL mask ;These two operate on the TPSU mask ; program status register. Two other opcodes have a similar syntax, though the immediate operand is used as the address of an I/O port instead of as a data byte. The opcodes go like this: REDE,Rn port ;port is an expression with a WRTE,Rn port ; value between 0 and 255. 3.5 Opcodes -- Register Relative Operations The opcodes in this group operate between a specified register and a memory location specified with PC-relative addressing. The opcodes go like this: ADDR,Rn [*]rel IORR,Rn [*]rel ANDR,Rn [*]rel LODR,Rn [*]rel COMR,Rn [*]rel STRR,Rn [*]rel EORR,Rn [*]rel SUBR,Rn [*]rel 3.6 Opcodes -- Register Absolute Operations The opcodes in this group operate between a specified register and a memory location on the same page as the instruction using absolute addressing. The opcodes are: ADDA ANDA COMA EORA IORA LODA STRA SUBA The syntax allows two choices: 1) ADDA,Rn [*]abs_13 2) ADDA,R0 [*]abs_13[,Rn[,+]] 3.7 Opcodes -- Zero-Relative Branches The opcodes ZBRR and ZBSR branch to a location on 8K byte page 0 that is -64 to +63 bytes from location 0. The syntax foes like this: 9 ZBRR [*]zrel 3.8 Opcodes -- Conditional Relative Branches The conditional relative branch opcodes branch to a location -62 to +65 bytes from the first byte of the instruction. Bear in mind that this arithmetic is done modulo 8K with the upper two address bits unchanged. The instructions are: BCFR,CC [*]rel ;CC = 3 will cause a C error ; since 9BH is the opcode for ; ZBRR. BCTR,CC [*]rel BSFR,CC [*]rel ;CC = 3 will cause a C error ; since 0BBH is the opcode ; for ZBSR. BSTR,CC [*]rel 3.9 Opcodes -- Conditional Absolute Branches The conditional absolute branch opcodes branch to a location anywhere in the machine's 32K byte address space. The instructions are: BCFA,CC [*]abs_15 ;CC = 3 will cause a C error ; since 9FH is the opcode for ; BXA. BCTA,CC [*]abs_15 BSFA,CC [*]abs_15 ;CC = 3 will cause a C error ; since 0BFH is the opcode ; for BSXA. BSTA,CC [*]abs_15 3.10 Opcodes -- Register Relative Branches The register relative branch opcodes branch to a location -62 to +65 bytes from the first byte of the instruction. Bear in mind that this arithmetic is done modulo 8K with the upper two address bits unchanged. The instructions are: BDRR,Rn [*]rel BRNR,Rn [*]rel BIRR,Rn [*]rel BSNR,Rn [*]rel 3.11 Opcodes -- Conditional Absolute Branches The conditional absolute branch opcodes branch to a location anywhere in the machine's 32K byte address space. The instructions are: BDRA,Rn [*]abs_15 BRNA,Rn [*]abs_15 10 BIRA,Rn [*]abs_15 BSNA,Rn [*]abs_15 3.12 Opcodes -- Indexed Branches The indexed branch opcodes branch to a location anywhere in the machine's 32K address space indexed on the contents of R3. The instructions go like this: BSXA [*]abs_15,R3 BXA [*]abs_15,R3 3.13 Opcodes -- Conditional Returns The conditional return instructions return from subroutine if a specified condition is met. The instructions are: RETC,CC RETE,CC 4.0 Pseudo Opcodes Unlike 2650 opcodes, pseudo opcodes (pseudo-ops) do not represent machine instructions. They are, rather, directives to the assembler. These directives require various numbers and types of arguments. They will be listed individually below. 4.1 Pseudo-ops -- ACON The DW pseudo-op allows 15-bit words to be spliced into the object code. Its argument is a chain of zero or more expressions separated by commas. If a comma occurs with no preceding expression, a word of 0000H is spliced into the code. The word is placed into memory low byte in low address, high byte in high address as per standard Intel order. The sequence of bytes 07FH, 0FFH, 00H, 00H, 01H, 02H could be spliced into the code with the following statement: ACON 07FFFH, , 0102H 4.2 Pseudo-ops -- DATA The DATA pseudo-op allows arbitrary bytes to be spliced into the object code. Its argument is a chain of zero or more expressions that evaluate to -128 through 255 separated by commas. If a comma occurs with no preceding expression, a 00H byte is spliced into the object code. The sequence of bytes 0FEH, 0FFH, 00H, 01H, 02H could be spliced into the code with the following statement: DATA -2, -1, , 1, 2 11 String constants are handled differently in DATA statements than in other places. If a string constant is written with no other arithmetic done on it, the string constant is not truncated to two bytes. Instead, the entire string is be spliced into the object code. For example: DATA "Kaboom!!", 0DH, 0AH ;This is 10 ;bytes of code. 4.3 Pseudo-ops -- EJE The EJE pseudo-op always causes an immediate page ejection in the listing by inserting a form feed ('\f') character before the next line. If an argument is specified, the argument expression specifies the number of lines per page in the listing. Legal values for the expression are any number except 1 and 2. A value of 0 turns the listing pagination off. Thus, the following statement cause a page ejection and would divide the listing into 60-line pages: PAGE 60 4.4 Pseudo-ops -- END The END pseudo-op tells the assembler that the source program is over. Any further lines of the source file are ignored and not passed on to the listing. If an argument is added to the END statement, the value of the argument will be placed in the execution address slot in the Intel hex object file. The execution address defaults to the program counter value at the point where the END was encountered. Thus, to specify that the program starts at label START, the END statement would be: END START If end-of-file is encountered on the source file before an END statement is reached, the assembler will add an END statement to the listing and flag it with a * (missing statement) error. 4.5 Pseudo-ops -- EQU The EQU pseudo-op is used to assign a specific value to a label, thus the label on this line is REQUIRED. Once the value is assigned, it cannot be reassigned by writing the label in column 1, by another EQU statement, or by a SET statement. Thus, for example, the following statement assigns the value 2 to the label TWO: TWO EQU 1 + 1 The expression in the argument field must contain no forward 12 references. 4.6 Pseudo-ops -- IF, ELSE, ENDI These three pseudo-ops allow the assembler to choose whether or not to assemble certain blocks of code based on the result of an expression. Code that is not assembled is passed through to the listing but otherwise ignored by the assembler. The IF pseudo-op signals the beginning of a conditionally assembled block. It requires one argument that may contain no forward references. If the value of the argument is non-zero, the block is assembled. Otherwise, the block is ignored. The ENDI pseudo- op signals the end of the conditionally assembled block. For example: IF EXPRESSION ;This whole thing generates DB 01H, 02H, 03H ; no code whatsoever if ENDI ; EXPRESSION is zero. The ELSE pseudo-op allows the assembly of either one of two blocks, but not both. The following two sequences are equivalent: IF EXPRESSION ... some stuff ... ELSE ... some more stuff ... ENDI TEMP_LAB SET EXPRESSION IF TEMP_LAB NE 0 ... some stuff ... ENDI IF TEMP_LAB EQ 0 ... some more stuff ... ENDI The pseudo-ops in this group do NOT permit labels to exist on the same line as the status of the label (ignored or not) would be ambiguous. All IF statements (even those in ignored conditionally assembled blocks) must have corresponding ENDI statements and all ELSE and ENDI statements must have a corresponding IF statement. IF blocks can be nested up to 16 levels deep before the assembler dies of a fatal error. This should be adequate for any conceivable job, but if you need more, change the constant IFDEPTH in file A26.H and recompile the assembler. 4.7 Pseudo-ops -- INCL The INCL pseudo-op is used to splice the contents of another 13 file into the current file at assembly time. The name of the file to be INCLuded is specified as a normal string constant, so the following line would splice the contents of file "const.def" into the source code stream: INCL "const.def" INCLuded files may, in turn, INCLude other files until four files are open simultaneously. This limit should be enough for any conceivable job, but if you need more, change the constant FILES in file A26.H and recompile the assembler. 4.8 Pseudo-ops -- ORG The ORG pseudo-op is used to set the assembly program counter to a particular value. The expression that defines this value may contain no forward references. The default initial value of the assembly program counter is 0000H. The following statement would change the assembly program counter to 0F000H: ORG 0F000H If a label is present on the same line as an ORG statement, it is assigned the new value of the assembly program counter. 4.9 Pseudo-ops -- RES The RES pseudo-op is used to reserve a block of storage for program variables, or whatever. This storage is not initialized in any way, so its value at run time will usually be random. The argument expression (which may contain no forward references) is added to the assembly program counter. The following statement would reserve 10 bytes of storage called "STORAGE": STORAGE RES 10 4.10 Pseudo-ops -- SET The SET pseudo-op functions like the EQU pseudo-op except that the SET statement can reassign the value of a label that has already been assigned by another SET statement. Like the EQU statement, the argument expression may contain no forward references. A label defined by a SET statement cannot be redefined by writing it in column 1 or with an EQU statement. The following series of statements would set the value of label "COUNT" to 1, 2, then 3: COUNT SET 1 COUNT SET 2 COUNT SET 3 14 4.11 Pseudo-ops -- TITL The TITL pseudo-op sets the running title for the listing. The argument field is required and must be a string constant, though the null string ("") is legal. This title is printed after every page ejection in the listing, therefore, if page ejections have not been forced by the PAGE pseudo-op, the title will never be printed. The following statement would print the title "Random Bug Generator -- Ver 3.14159" at the top of every page of the listing: TITL "Random Bug Generator -- Ver 3.14159" 5.0 Assembly Errors When a source line contains an illegal construct, the line is flagged in the listing with a single-letter code describing the error. The meaning of each code is listed below. In addition, a count of the number of lines with errors is kept and printed on the C "stderr" device (by default, the console) after the END statement is processed. If more than one error occurs in a given line, only the first is reported. For example, the illegal label "=$#*'(" would generate the following listing line: L 0000 FF 00 00 =$#*'( LDA R0 5.1 Error * -- Illegal or Missing Statement This error occurs when either: 1) the assembler reaches the end of the source file without seeing an END statement, or 2) an END statement is encountered in an INCLude file. If you are "sure" that the END statement is present when the assembler thinks that it is missing, it probably is in the ignored section of an IF block. If the END statement is missing, supply it. If the END statement is in an INCLude file, delete it. 5.2 Error ( -- Parenthesis Imbalance For every left parenthesis, there must be a right paren- thesis. Count them. 5.3 Error " -- Missing Quotation Mark Strings have to begin and end with either " or '. Remember that " only matches " while ' only matches '. 15 5.4 Error A -- Address Can't Be Reached This error occurs under the following conditions: 1) an absolute branch address is > 07FFFH, or 2) an absolute operand address references a different 8K byte page than the instruction is on, or 3) a zero-relative address references a location outside the ranges 0000H - 003FH and 01FC0H - 1FFFH, or 4) a relative address references a location outside the range -62 to +65 bytes from the beginning of the instruction or on a different 8K byte page than the instruction. 5.5 Error C -- Illegal Condition Code This error occurs if a condition code outside the range 0 - 3 is specified or if a condition code of 3 is specified for the instructions BCFA, BCFR, BSFA, and BSFR. 5.6 Error D -- Illegal Digit This error occurs if a digit greater than or equal to the base of a numeric constant is found. For example, a 2 in a binary number would cause a D error. Especially, watch for 8 or 9 in an octal number. 5.7 Error E -- Illegal Expression This error occurs because of: 1) a missing expression where one is required 2) a unary operator used as a binary operator or vice- versa 3) a missing binary operator 4) a SHL or SHR count that is not 0 thru 15 5.8 Error F -- Control Flow Error This error occurs if the flow of control is going to cross the boundary between two 8K byte pages. The 2650 CPU's program counter only increments in its low 13 bits, so such an instruction cannot be fetched by the machine. 16 5.9 Error I -- IF-ENDI Imbalance For every IF there must be a corresponding ENDI. If this error occurs on an ELSE or ENDI statement, the corresponding IF is missing. If this error occurs on an END statement, one or more ENDI statements are missing. 5.10 Error L -- Illegal Label This error occurs because of: 1) a non-alphabetic in column 1 2) a reserved word used as a label 3) a missing label on an EQU or SET statement 4) a label on an IF, ELSE, or ENDI statement 5.11 Error M -- Multiply Defined Label This error occurs because of: 1) a label defined in column 1 or with the EQU statement being redefined 2) a label defined by a SET statement being redefined either in column 1 or with the EQU statement 3) the value of the label changing between assembly passes 5.12 Error O -- Illegal Opcode The opcode field of a source line may contain only a valid machine opcode, a valid pseudo-op, or nothing at all. Anything else causes this error. 5.13 Error P -- Phasing Error This error occurs because of: 1) a forward reference in a DS, EQU, ORG, or SET statement 2) a label disappearing between assembly passes 5.14 Error R -- Illegal Register This error occurs under the following conditions: 17 1) a register other than 0 - 3 is specified, or 2) R0 was specified in the instruction ANDZ or STRZ. 5.15 Error S -- Illegal Syntax This error means that an argument field is scrambled. Sort the mess out and reassemble. 5.13 Error T -- Too Many Arguments This error occurs if there are more items (expressions, register designators, etc.) in the argument field than the opcode or pseudo-op requires. The assembler ignores the extra items but issues this error in case something is really mangled. 5.14 Error U -- Undefined Label This error occurs if a label is referenced in an expression but not defined anywhere in the source program. If you are "sure" you have defined the label, note that upper and lower case letters in labels are different. Defining "LABEL" does not define "Label." 5.15 Error V -- Illegal Value This error occurs because: 1) an immediate value is not -128 thru 255, or 2) a DATA argument is not -128 thru 255, or 3) an I/O port number is not 0 thru 255, or 4) a bit mask is not 0 thru 255, or 5) an ACON argument is not 0 thru 7FFFH, or 6) an EJE argument is 1 or 2, or 7) an INCL argument refers to a file that does not exist. 6.0 Warning Messages Some errors that occur during the parsing of the cross- assembler command line are non-fatal. The cross-assembler flags these with a message on the C "stdout" device (by default, the console) beginning with the word "Warning." The messages are listed below: 18 6.1 Warning -- Illegal Option Ignored The only options that the cross-assembler knows are -l and -o. Any other command line argument beginning with - will draw this error. 6.2 Warning -- -l Option Ignored -- No File Name 6.3 Warning -- -o Option Ignored -- No File Name The -l and -o options require a file name to tell the assembler where to put the listing file or object file. If this file name is missing, the option is ignored. 6.4 Warning -- Extra Source File Ignored The cross-assembler will only assemble one file at a time, so source file names after the first are ignored. To assemble a second file, invoke the assembler again. Note that under CP/M- 80, the old trick of reexecuting a core image will NOT work as the initialized data areas are not reinitialized prior to the second run. 6.5 Warning -- Extra Listing File Ignored 6.6 Warning -- Extra Object File Ignored The cross-assembler will only generate one listing and object file per assembly run, so -l and -o options after the first are ignored. 7.0 Fatal Error Messages Several errors that occur during the parsing of the cross- assembler command line or during the assembly run are fatal. The cross-assembler flags these with a message on the C "stdout" device (by default, the console) beginning with the words "Fatal Error." The messages are explained below: 7.1 Fatal Error -- No Source File Specified This one is self-explanatory. The assembler does not know what to assemble. 7.2 Fatal Error -- Source File Did Not Open The assembler could not open the source file. The most likely cause is that the source file as specified on the command line does not exist. On larger systems, there could also be priviledge violations. Rarely, a read error in the disk 19 directory could cause this error. 7.3 Fatal Error -- Listing File Did Not Open 7.4 Fatal Error -- Object File Did Not Open This error indicates either a defective listing or object file name or a full disk directory. Correct the file name or make more room on the disk. 7.5 Fatal Error -- Error Reading Source File This error generally indicates a read error in the disk data space. Use your backup copy of the source file (You do have one, don't you?) to recreate the mangled file and reassemble. 7.6 Fatal Error -- Disk or Directory Full This one is self-explanatory. Some more space must be found either by deleting files or by using a disk with more room on it. 7.7 Fatal Error -- File Stack Overflow This error occurs if you exceed the INCLude file limit of four files open simultaneously. This limit can be increased by increasing the constant FILES in file A26.H and recompiling the cross-assembler. 7.8 Fatal Error -- If Stack Overflow This error occurs if you exceed the nesting limit of 16 IF blocks. This limit can be increased by increasing the constant IFDEPTH in file A26.H and recompiling the cross-assembler. 7.9 Fatal Error -- Too Many Symbols Congratulations! You have run out of memory. The space for the cross-assembler's symbol table is allocated at run-time using the C library function calloc(), so the cross-assembler will use all available memory. The only solutions to this problem are to lessen the number of labels in the source program or to add more memory. 20