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C/C++ Source or Header  |  1995-05-19  |  11.1 KB  |  228 lines
  1. /* semfisda.h */
  2.  
  3. /* Device Driver for IBM SDLC adapter: Global data                           */
  4.  
  5. /*****************************************************************************/
  6. /* Trace data                                                                */
  7. /*****************************************************************************/
  8. #ifdef IBMSYNC_TRACE
  9. UCHAR           TrcBuffer [TRC_BUFSIZE];
  10. UCHAR          *TrcPtr      = TrcBuffer;
  11. #endif
  12.  
  13. /*****************************************************************************/
  14. /* Bus Type (Eisa, Isa or MicroChannel.                                      */
  15. /*****************************************************************************/
  16. INTERFACE_TYPE    InterfaceType;
  17.  
  18. /*****************************************************************************/
  19. /* 8273 data                                                                 */
  20. /*****************************************************************************/
  21. /* Commands, statically allocated, for copying into target device extension  */
  22. /*                                                                           */
  23. /* Note that only the first two bytes are required - opcode and length.      */
  24. /* Other bytes must be written driver before command is used                 */
  25. /*                                                                           */
  26. /* Note also that the command may be overwritten if appropriate: e.g.        */
  27. /* receive and DataTransferMode commands.                                    */
  28. /*****************************************************************************/
  29.  
  30. UCHAR  LastWaitUntilStatus;
  31. UCHAR  ProtoCmdStringReadPortA[]        = { 0x22, 0 };
  32. UCHAR  ProtoCmdStringResetOpMode[]      = { 0x51, 1 };
  33. UCHAR  ProtoCmdStringResetSerialIOMode[]= { 0x60, 1 };
  34. UCHAR  ProtoCmdStringSetOpMode[]        = { 0x91, 1 };
  35. UCHAR  ProtoCmdStringSetSerialIOMode[]  = { 0xa0, 1 };
  36. UCHAR  ProtoCmdStringDataTransferMode[] = { 0x97, 1 };
  37. UCHAR  ProtoCmdStringResetPortB[]       = { 0x63, 1 };
  38. UCHAR  ProtoCmdStringSetPortB[]         = { 0xa3, 1 };
  39. UCHAR  ProtoCmdStringReceive []         = { 0xc0, 2 };
  40. UCHAR  ProtoCmdStringTransmit[]         = { 0xc8, 4 };
  41. UCHAR  ProtoCmdStringAbortTransmit[]    = { 0xcc, 0 };
  42. UCHAR  ProtoCmdStringDisableReceiver[]  = { 0xc5, 0 };
  43.  
  44. /*****************************************************************************/
  45. /* FSM data                                                                  */
  46. /*****************************************************************************/
  47. char *RxFSMStateNames[] = {"RsId", "RsGo", "RsIH", "RsRH"};
  48.  
  49. char *RxFSMInputNames[] = {"RiGo", "RiSo", "RiHo", "RiRl", "RiGr", "RiEr"};
  50.  
  51. char *TxFSMStateNames[] = {"TsId", "TsAc", "TsTx", "TsAb", "TsCl"};
  52.  
  53. char *TxFSMInputNames[] = {"TiGo", "TiEo", "TiSo", "TiAb", "TiEr"};
  54.  
  55. /*****************************************************************************/
  56. /* This is the declaration of the Receiver FSM                               */
  57. /*****************************************************************************/
  58.  
  59. typedef struct _RXFSMENTRY          /* one entry in Rx FSM                   */
  60. {
  61.     int         NewState;
  62.     void        (*pRxActionRoutine) (PDX);
  63. }
  64.                 RXFSMENTRY;
  65.  
  66. RXFSMENTRY      RxFSM [RXFSMINPUTCOUNT ] [RXFSMSTATECOUNT] =
  67. {
  68.        /* Input = RxFSMInputStart            Start the receiver */
  69.   {
  70.     {  RxFSMStateReady ,RxFSMActionStart  },/* RX State = Idle */
  71.     {  RxFSMStateReady ,  FSMNullAction   },/* RX State = Ready */
  72.     {  RxFSMStateRdyHld,  FSMNullAction   },/* RX State = Idle (held) */
  73.     {  RxFSMStateRdyHld,  FSMNullAction   } /* RX State = Ready(held) */
  74.   },
  75.        /* Input = RxFSMInputStop             Stop the receiver */
  76.   {
  77.     {  RxFSMStateIdle  ,  FSMNullAction   },/* RX State = Idle */
  78.     {  RxFSMStateIdle  ,RxFSMActionStop   },/* RX State = Ready */
  79.     {  RxFSMStateIdlHld,  FSMNullAction   },/* RX State = Idle (held) */
  80.     {  RxFSMStateIdlHld,  FSMNullAction   } /* RX State = Ready(held) */
  81.   },
  82.        /* Input = RxFSMInputHold             Stop the receiver during Tx DMA */
  83.   {
  84.     {  RxFSMStateIdlHld,  FSMNullAction   },/* RX State = Idle */
  85.     {  RxFSMStateRdyHld,RxFSMActionStop   },/* RX State = Ready */
  86.     {  RxFSMStateIdlHld,  FSMNullAction   },/* RX State = Idle (held) */
  87.     {  RxFSMStateRdyHld,  FSMNullAction   } /* RX State = Ready(held) */
  88.   },
  89.        /* Input = RxFSMInputRelease          Restart the receiver after Tx DMA*/
  90.   {
  91.     {  RxFSMStateIdle  ,RxFSMActionInvalid},/* RX State = Idle */
  92.     {  RxFSMStateReady ,RxFSMActionInvalid},/* RX State = Ready */
  93.     {  RxFSMStateIdle  ,  FSMNullAction   },/* RX State = Idle (held) */
  94.     {  RxFSMStateReady ,RxFSMActionRestart} /* RX State = Ready(held) */
  95.   },
  96.        /* Input = RxFSMInputGoodReceive      Receiver interrupt - good result */
  97.   {
  98.     {  RxFSMStateIdle  ,RxFSMActionInvalid},/* RX State = Idle */
  99.     {  RxFSMStateReady ,RxFSMActionRcvOK  },/* RX State = Ready */
  100.     {  RxFSMStateIdlHld,RxFSMActionInvalid},/* RX State = Idle (held) */
  101.     {  RxFSMStateRdyHld,RxFSMActionInvalid} /* RX State = Ready(held) */
  102.   },
  103.        /* Input = RxFSMInputReceiverError    Receiver interrupt - bad result */
  104.   {
  105.     {  RxFSMStateIdle  ,RxFSMActionInvalid}, /* RX State = Idle */
  106.     {  RxFSMStateReady ,RxFSMActionRcvError},/* RX State = Ready */
  107.     {  RxFSMStateIdlHld,  FSMNullAction   }, /* RX State = Idle (held) */
  108.     {  RxFSMStateRdyHld,  FSMNullAction   }  /* RX State = Ready(held) */
  109.   }
  110. };
  111.  
  112. /*****************************************************************************/
  113. /* This is the declaration of the Transmitter FSM                            */
  114. /*****************************************************************************/
  115.  
  116. typedef struct _TXFSMENTRY          /* one entry in Rx FSM                   */
  117. {
  118.     int         NewState;
  119.     void        (*pTxActionRoutine) (PDX);
  120. }
  121.                 TXFSMENTRY;
  122.  
  123. TXFSMENTRY      TxFSM [TXFSMINPUTCOUNT ] [TXFSMSTATECOUNT]  =
  124. {
  125.        /* Input = TxFSMInputStart            Start a transmission. */
  126.   {
  127.     {  TxFSMStateTxing   ,TxFSMActionStart   },  /* TX State = Idle */
  128.     {  TxFSMStateTxing   ,TxFSMActionXmitNext},  /* TX State = Active */
  129.     {  TxFSMStateTxing   ,  FSMNullAction    },  /* TX State = Transmitting */
  130.     {  TxFSMStateAborting,  FSMNullAction    },  /* TX_State = Wait for abort compl */
  131.     {  TxFSMStateAborting,  FSMNullAction    }   /* TX_State = Closing Down */
  132.   },
  133.        /* Input = TxFSMInputEOTX             Good Transmission completion */
  134.   {
  135.     {  TxFSMStateIdle    ,TxFSMActionInvalid },  /* TX State = Idle */
  136.     {  TxFSMStateActive  ,TxFSMActionInvalid },  /* TX State = Active */
  137.     {  TxFSMStateActive  ,TxFSMActionEndOK   },  /* TX State = Transmitting */
  138.     {  TxFSMStateAborting,  FSMNullAction    },  /* TX_State = Wait for abort compl */
  139.     {  TxFSMStateClosing ,  FSMNullAction    }   /* TX_State = Closing Down */
  140.   },
  141.        /* Input = TxFSMInputStop             Stop the transmitter. */
  142.   {
  143.     {  TxFSMStateIdle    ,  FSMNullAction    },  /* TX State = Idle */
  144.     {  TxFSMStateIdle    ,TxFSMActionStop    },  /* TX State = Active */
  145.     {  TxFSMStateClosing ,TxFSMActionAbort   },  /* TX State = Transmitting */
  146.     {  TxFSMStateClosing ,  FSMNullAction    },  /* TX_State = Wait for abort compl */
  147.     {  TxFSMStateClosing ,  FSMNullAction    }   /* TX_State = Closing Down */
  148.   },
  149.        /* Input = TxFSMInputAbortd           Abort Complete interrupt received. */
  150.   {
  151.     {  TxFSMStateIdle    ,TxFSMActionInvalid },  /* TX State = Idle */
  152.     {  TxFSMStateActive  ,TxFSMActionInvalid },  /* TX State = Active */
  153.     {  TxFSMStateTxing   ,TxFSMActionInvalid },  /* TX State = Transmitting */
  154.     {  TxFSMStateTxing   ,TxFSMActionXmitNext},  /* TX_State = Wait for abort compl */
  155.     {  TxFSMStateIdle    ,TxFSMActionStop    }   /* TX_State = Closing Down */
  156.   },
  157.        /* Input = TxFSMInputEOTx_Err         Error Completion interrupt received */
  158.   {
  159.     {  TxFSMStateIdle    ,TxFSMActionInvalid },  /* TX State = Idle */
  160.     {  TxFSMStateActive  ,TxFSMActionInvalid },  /* TX State = Active */
  161.     {  TxFSMStateActive  ,TxFSMActionEndError},  /* TX State = Transmitting */
  162.     {  TxFSMStateAborting,  FSMNullAction    },  /* TX_State = Wait for abort compl */
  163.     {  TxFSMStateClosing ,  FSMNullAction    }   /* TX_State = Closing Down */
  164.   }
  165. };
  166.  
  167. /*****************************************************************************/
  168. /* Configuration data                                                        */
  169. /*****************************************************************************/
  170.  
  171.  
  172. CONFIGDATA ConfigData[] =
  173. {                                           /* must be in ADAPTER_TYPE order */
  174. /* DL$01 */
  175.         { AT_SDLC, "SDLC1",(IO_ADDRESS)0x380, 0,           1,      0,       0,
  176.                            1 /*AddrSpace*/,
  177.                            0 /*BusNumber*/,
  178.                               3,3,FALSE,Latched,
  179.                            0,   0,FALSE,Latched  /* IRQ4 cut ! */
  180.         },
  181. /* DL$02 */
  182.         { AT_SDLC, "SDLC1",(IO_ADDRESS)0x380, 0,           1,      0,       0,
  183.                            1 /*AddrSpace*/,
  184.                            0 /*BusNumber*/,
  185.                               3,3,FALSE,Latched,
  186.                               4,4,FALSE,Latched
  187.         },
  188. /* DL$03 */
  189.         { AT_MPCA1,"MPCA1",(IO_ADDRESS)0x380, 0,           1, (IO_ADDRESS)
  190.                                                               0x3AF,    0x0A,
  191.                            1 /*AddrSpace*/,
  192.                            0 /*BusNumber*/,
  193.                               4,4,FALSE,Latched,  /* 0x0A => IRQ4, DMA chan 1 */
  194.                            0,   0,FALSE,Latched
  195.         },
  196. /* DL$04 */
  197.         { AT_MPCA2,"MPCA2",(IO_ADDRESS)0x3a0, 0,           0, (IO_ADDRESS)
  198.                                                               0x38F,    0x09,
  199.                            1 /*AddrSpace*/,
  200.                            0 /*BusNumber*/,
  201.                               3,3,FALSE,Latched,  /* 0x09 => IRQ3, no DMA     */
  202.                            0,   0,FALSE,Latched
  203.         },
  204. /* DL$05 */
  205.         { AT_MPAA1,"MPAA1",(IO_ADDRESS)0x380, POS_IDMPAA1, 1,     0,       0,
  206.                            1 /*AddrSpace*/,
  207.                            0 /*BusNumber*/,
  208.                               3,3,TRUE,LevelSensitive,
  209.                            0,   0,TRUE,LevelSensitive
  210.         },
  211. /* DL$06 */
  212.         { AT_MPAA2,"MPAA2",(IO_ADDRESS)0x3A0, POS_IDMPAA2, 7,     0,       0,
  213.                            1 /*AddrSpace*/,
  214.                            0 /*BusNumber*/,
  215.                               4,4,TRUE,LevelSensitive,
  216.                            0,   0,TRUE,LevelSensitive
  217.         },
  218. };
  219.  
  220. /*****************************************************************************/
  221. /* Dummy Interface Record for use until the real one comes along, or once    */
  222. /* the real one goes away - so we can do initialisation and wrap up without  */
  223. /* worrying about generating events for anon-existent IR.                    */
  224. /*****************************************************************************/
  225.  
  226. IR      InitIR = {0};
  227.  
  228.