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- module _AdderGAL
- title '5-bit ripple adder using a Lattice GAL
- FutureNet - Data I/O Redmond WA 14 Jan 1985'
-
- AdderGAL device 'P16V8R';
-
- " A GAL must be used for this function because it requires
- " 5 registered outputs and 3 combinatoral outputs.
-
- " To select the ABEL device file for the GAL follow these rules
- " 1. Registers are required.
- " Use the P16V8R.
- " 2. No registers, but feedback is required.
- " Use the P16V8C.
- " 3. No registers or feedback, but 8 terms per output are required.
- " Use the P16V8S.
-
- X,C,L,H = .X., .C., 0, 1;
- Clk,Clr,Ena pin 1, 9,11;
- V4,V3,V2,V1,V0 pin 2, 3, 4, 5, 6; Data = [V4,V3,V2,V1,V0];
- S4,S3,S2,S1,S0 pin 12,13,14,15,16; Sum = [S4,S3,S2,S1,S0];
-
- " Equations for a n-Bit ripple adder
- " Sn = An xor Bn xor Cn
- " Cn+1 = AnBn + (An + Bn)Cn
-
- " Compute the first two carries as sub expressions
- C0 = 0;
- C1 = (V0 & S0 # (V0 # S0) & C0);
-
- " Compute these carries on outputs to save product terms
- C2,C3,C4 pin 17,18,19;
-
- equations
- C2 = V1 & S1 # (V1 # S1) & C1;
- C3 = V2 & S2 # (V2 # S2) & C2;
- C4 = V3 & S3 # (V3 # S3) & C3;
-
- S4 := (S4 $ V4 $ C4) & Clr;
- S3 := (S3 $ V3 $ C3) & Clr;
- S2 := (S2 $ V2 $ C2) & Clr;
- S1 := (S1 $ V1 $ C1) & Clr;
- S0 := (S0 $ V0 $ C0) & Clr;
-
- fuses "User Signature Word
- [2056..2071] = 'V1';
- [2072..2087] = '.3';
- [2088..2103] = 'J-';
- [2104..2119] = '86';
-
- test_vectors
- ([Clk,Clr,Ena,Data] -> Sum )
- [ C , L , L , X ] -> 0; "Clear
- [ C , H , L , 7 ] -> 7;
- [ C , H , L , 10 ] -> 17;
- [ C , L , L , X ] -> 0; "Clear
- [ C , H , L , 1 ] -> 1;
- [ C , H , L , 10 ] -> 11;
- [ C , H , L , 4 ] -> 15;
- [ C , H , L , 8 ] -> 23;
- [ C , H , L , 22 ] -> 13; "45 overflows to 13
- [ C , H , L , 5 ] -> 18;
- end _AdderGAL
-
-