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Text File  |  1990-12-11  |  1.3 KB  |  62 lines
  1. |"MINSEC"   1:CLK,
  2. |           2:-,
  3. |           3:-,
  4. |           4:-,
  5. |           5:-,
  6. |           6:-,
  7. |           7:-,
  8. |           8:-,
  9. |           9:MIL,
  10. |          10:SET,
  11. |          11:CIN,
  12. |          13:RESET,
  13. |          23:LC,
  14. |          22:LBCD3,
  15. |          21:LBCD2,
  16. |          20:LBCD1,
  17. |          19:LBCD0,
  18. |          18:RC,
  19. |          17:RBCD3,
  20. |          16:RBCD2,
  21. |          15:RBCD1,
  22. |          14:RBCD0
  23. |
  24. |Value:   "MINSEC"
  25. |Type:    "22V10"
  26. |Part:    "PLD22V10-35"
  27. |Library: "TUTORPLD.LIB"
  28. |
  29. |Title:   "Digital clock schematic"
  30. |Title:   " December  4, 1990"
  31. |
  32. |Registers:  CLK // LBCD[3..0],RBCD[3..0]
  33. |
  34. |Map:  RBCD[3..0] -> RBCD[3..0]
  35. | {
  36. |  n->0,  (n==9 & (CIN # SET)) # RESET
  37. |  n->n+1,  n<9 & (CIN # SET) & RESET'
  38. |  n->n,    CIN' & SET' & RESET'
  39. | }
  40. | RC = (RBCD[3..0]==9 & (CIN # SET) & RESET')
  41. |
  42. |Map: LBCD[3..0] -> LBCD[3..0]
  43. | {
  44. |  n ->0,  (n==5 & RC) # RESET
  45. |  n ->n,   RC' & RESET'
  46. |  n ->n+1, n<5 & RC & RESET'
  47. | }
  48. |
  49. |LC = (LBCD[3..0]==5 & RBCD[3..0]==9) & (CIN # SET) & RESET'
  50.  
  51. |Vectors:
  52. | {
  53. | Display RESET," ",CLK," ",LC," ",LBCD[3..0]," ", \
  54. |         RC," ",RBCD[3..0]
  55. | Set   CIN
  56. | Set   RESET
  57. | Test  CLK
  58. | Clear RESET
  59. | Test  CLK = 65(0,1)
  60. | End }
  61.  
  62.