home *** CD-ROM | disk | FTP | other *** search
/ Liren Large Software Subsidy 13 / 13.iso / p / p033 / 2.ddi / TUTOR.ZIP / 3_LAYER.DRC next >
Encoding:
Text File  |  1992-07-02  |  5.2 KB  |  155 lines

  1. ************************************************************************
  2. *                                                                      *
  3. *         Program   :   PC-DRC     V6.00B2.1                           *
  4. *         Date      :   Jul 02 1992                                    *
  5. *         Time      :   10:47AM                                        *
  6. *         Database  :   layout2.pcb                                    *
  7. *         Output    :   3_layer.drc                                    *
  8. *                                                                      *
  9. ************************************************************************
  10.  
  11.  
  12.                             Disjoint Subnets 
  13.  
  14. NET      COMP     PIN         COORDINATES     COMP     PIN       COORDINATES
  15.  
  16.  
  17.  
  18.     Total Number of Disjoint Subnets:  0
  19.  
  20. ***********************************************************************
  21. *                                                                     *
  22. *      Program  :   PC-DRC  V6.00B2.1                                 *
  23. *      Date     :   Jul 02 1992  10:47:40 AM                          *
  24. *      Database :   layout2.pcb                                       *
  25. *      Pass     :   pass_1                                            *
  26. *                                                                     *
  27. ***********************************************************************
  28.  
  29.  
  30. LAYERS GROUPED: 
  31. --------------- 
  32. COMP
  33. PADCOM
  34.  
  35.  
  36. DESIGN RULES SET:
  37. -----------------
  38. Pad size....................................60.00
  39. Nonround pad size...........................60.00
  40. Via size....................................50.00
  41. Trace width.................................12.00
  42. Pad to pad spacing..........................10.00
  43. Pad to trace spacing........................10.00
  44. Trace to trace spacing......................10.00
  45. Pad to board edge spacing...................75.00
  46. Trace to board edge spacing.................75.00
  47.  
  48.  
  49.  
  50. Inner Plane Connectivity:
  51. -------------------------
  52. Aperture Values      Nets
  53. ---------------      ----  
  54.        22            
  55.  
  56.  
  57.  
  58.  
  59. No DRC errors were found on this pass.
  60.  
  61.  
  62.  
  63. STATISTICS: 
  64. ----------- 
  65. Number of pads processed                         67
  66. Number of vias processed                          6
  67. Number of traces processed                       80
  68. Number of other shapes processed                  8
  69.  
  70. Number of pad size errors                         0
  71. Number of via size errors                         0
  72. Number of trace width errors                      0
  73.  
  74. Number of pad to pad errors                       0
  75. Number of pad to trace or shape errors            0
  76. Number of trace to trace or shape errors          0
  77. Number of pad to board edge errors                0
  78. Number of trace or shape to board edge errors     0
  79.  
  80.  
  81. Total number of entities processed              161
  82. Total number of size violations                   0
  83. Total number of spacing violations                0
  84. Total number of violations                        0
  85.  
  86. Time finished:  10:47:42 AM
  87.  
  88. ***********************************************************************
  89. *                                                                     *
  90. *      Program  :   PC-DRC  V6.00B2.1                                 *
  91. *      Date     :   Jul 02 1992  10:47:42 AM                          *
  92. *      Database :   layout2.pcb                                       *
  93. *      Pass     :   pass_2                                            *
  94. *                                                                     *
  95. ***********************************************************************
  96.  
  97.  
  98. LAYERS GROUPED: 
  99. --------------- 
  100. SOLDER
  101. PADSLD
  102.  
  103.  
  104. DESIGN RULES SET:
  105. -----------------
  106. Pad size....................................60.00
  107. Nonround pad size...........................60.00
  108. Via size....................................50.00
  109. Trace width.................................12.00
  110. Pad to pad spacing..........................10.00
  111. Pad to trace spacing........................10.00
  112. Trace to trace spacing......................10.00
  113. Pad to board edge spacing...................75.00
  114. Trace to board edge spacing.................75.00
  115.  
  116.  
  117.  
  118. Inner Plane Connectivity:
  119. -------------------------
  120. Aperture Values      Nets
  121. ---------------      ----  
  122.        22            
  123.  
  124.  
  125.  
  126.  
  127. No DRC errors were found on this pass.
  128.  
  129.  
  130.  
  131. STATISTICS: 
  132. ----------- 
  133. Number of pads processed                         67
  134. Number of vias processed                          6
  135. Number of traces processed                        9
  136. Number of other shapes processed                  8
  137.  
  138. Number of pad size errors                         0
  139. Number of via size errors                         0
  140. Number of trace width errors                      0
  141.  
  142. Number of pad to pad errors                       0
  143. Number of pad to trace or shape errors            0
  144. Number of trace to trace or shape errors          0
  145. Number of pad to board edge errors                0
  146. Number of trace or shape to board edge errors     0
  147.  
  148.  
  149. Total number of entities processed               90
  150. Total number of size violations                   0
  151. Total number of spacing violations                0
  152. Total number of violations                        0
  153.  
  154. Time finished:  10:47:44 AM
  155.