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Assembly Source File  |  1989-03-18  |  2.9 KB  |  128 lines
  1. ;
  2. ;       opV20
  3. ;
  4. ;    V20 instructions
  5. ;
  6. ;       For disassembly in 16 bit mode
  7. ;
  8. code2seg    segment
  9. farroutine    proc    far
  10.         mov    ax,4c00H
  11.         int    21H    ; if this file is executed, just terminate
  12. farroutine    endp    
  13. ;
  14. code2seg    ends
  15. ;
  16. dataseg        segment
  17. alpha        dw    0
  18. nearindirect    dw    beta
  19. farindirect    dd    farroutine
  20. dataseg    ends
  21. ;
  22. codeseg    segment
  23. ;
  24.     assume ds:dataseg
  25.     assume es:nothing
  26.     assume ss:nothing
  27.     assume cs:codeseg
  28. ;
  29. beta    proc    near
  30.     ret
  31.     ret    3
  32. beta    endp
  33. ;
  34. ;    ensure disassembler synchronization
  35. ;
  36.     nop
  37.     nop
  38.     nop
  39.     nop
  40.     nop
  41.     nop
  42.     nop
  43.     nop
  44.     nop
  45. ;
  46. ;    80186 & V20 instructions
  47. ;
  48.     db    62h,0            ;bound
  49.     db    0c8h,33h,44h,5        ;enter procedure
  50.     db    69h,0,33h,44h        ;imul immediate
  51.     db    69h,0c0h,33h,44h    ;imul immediate
  52.     db    6bh,0,33h        ;imul immediate
  53.     db    6bh,0c0h,33h        ;imul immediate
  54.     db    6ch            ;ins dx
  55.     db    0f2h,6ch        ;ins dx repeated by count in cx
  56.     db    0c9h            ;leave procedure
  57.     db    6eh            ;outs dx
  58.     db    0f2h,6eh        ;outs dx repeated by count in cx
  59.     db    61h            ;popa
  60.     db    68h,33h,44h        ;push immediate
  61.     db    6ah,33h            ;push immediate
  62.     db    60h            ;pusha
  63.     db    0c0h,00h,3        ;ROL memory by count
  64.     db    0c0h,08h,3        ;ROR memory by count
  65.     db    0c0h,10h,3        ;RCL memory by count
  66.     db    0c0h,18h,3        ;RCR memory by count
  67.     db    0c0h,20h,3        ;SHL/SAL memory by count
  68.     db    0c0h,28h,3        ;SHR memory by count
  69.     db    0c0h,38h,3        ;SAR memory by count
  70. ;
  71.     db 90H,90H,90H,90H,90H,90H,90H,90H,90H        ; alignment
  72.  
  73. ;
  74. ;    V20 unique instructions
  75. ;
  76.     db    0fh,20h            ;add4s
  77.     db    0fh,12h,0c0h        ;clr1 reg8,cl
  78.     db    0fh,12h,000h        ;clr1 mem8,cl
  79.     db    0fh,13h,0c0h        ;clr1 reg16,cl
  80.     db    0fh,13h,000h        ;clr1 mem16,cl
  81.     db    0fh,1ah,0c0h,3        ;clr1 reg8,imm3
  82.     db    0fh,1ah,000h,3        ;clr1 mem8,imm3
  83.     db    0fh,1bh,0c0h,3        ;clr1 reg16,imm4
  84.     db    0fh,1bh,000h,3        ;clr1 mem16,imm4
  85.     db    0fh,26h            ;cmp4s
  86.     db    0fh,33h,0c0h        ;ext bit field
  87.     db    0fh,3bh,0c0h,3        ;ext bit field immediate
  88.     db    66h,0c0h        ;fp02
  89.     db    66h,000h        ;fp02
  90.     db    0fh,31h,0c0h        ;insert bit field
  91.     db    0fh,39h,0c0h,3        ;insert bit field immediate
  92.     db    0fh,16h,0c0h        ;not1 reg8,cl
  93.     db    0fh,16h,000h        ;not1 mem8,cl
  94.     db    0fh,17h,0c0h        ;not1 reg16,cl
  95.     db    0fh,17h,000h        ;not1 mem16,cl
  96.     db    0fh,1eh,0c0h,3        ;not1 reg8,imm3
  97.     db    0fh,1eh,000h,3        ;not1 mem8,imm3
  98.     db    0fh,1fh,0c0h,3        ;not1 reg16,imm4
  99.     db    0fh,1fh,000h,3        ;not1 mem16,imm4
  100.     db    65h            ;repc
  101.     db    64h            ;repnc
  102.     db    0fh,28h,0c0h        ;rol4
  103.     db    0fh,28h,000h        ;rol4
  104.     db    0fh,2ah,0c0h        ;ror4
  105.     db    0fh,2ah,000h        ;ror4
  106.     db    0fh,14h,0c0h        ;set1 reg8,cl
  107.     db    0fh,14h,000h        ;set1 mem8,cl
  108.     db    0fh,15h,0c0h        ;set1 reg16,cl
  109.     db    0fh,15h,000h        ;set1 mem16,cl
  110.     db    0fh,1ch,0c0h,3        ;set1 reg8,imm3
  111.     db    0fh,1ch,000h,3        ;set1 mem8,imm3
  112.     db    0fh,1dh,0c0h,3        ;set1 reg16,imm4
  113.     db    0fh,1dh,000h,3        ;set1 mem16,imm4
  114.     db    0fh,22h            ;sub4s
  115.     db    0fh,10h,0c0h        ;test1 reg8,cl
  116.     db    0fh,10h,000h        ;test1 mem8,cl
  117.     db    0fh,11h,0c0h        ;test1 reg16,cl
  118.     db    0fh,11h,000h        ;test1 mem16,cl
  119.     db    0fh,18h,0c0h,3        ;test1 reg8,imm3
  120.     db    0fh,18h,000h,3        ;test1 mem8,imm3
  121.     db    0fh,19h,0c0h,3        ;test1 reg16,imm4
  122.     db    0fh,19h,000h,3        ;test1 mem16,imm4
  123. ;
  124. codeseg    ends
  125. ;
  126.  
  127.     end
  128.