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- Newsgroups: sci.crypt
- Path: sparky!uunet!inmos!fulcrum!bham!warwick!pipex!demon!gtoal
- From: gtoal@pizzabox.demon.co.uk (Graham Toal)
- Subject: Re: Actual cost of breaker machine for DES
- Message-ID: <C1Jps2.Gw9@demon.co.uk>
- Sender: news@demon.co.uk
- Nntp-Posting-Host: pizzabox.demon.co.uk
- Organization: Cuddlehogs Anonymous
- References: <1993Jan27.165717.2799@netcom.com> <C1JFMC.L3C@vcd.hp.com>
- Date: Thu, 28 Jan 1993 04:00:01 GMT
- Lines: 19
-
- In article <C1JFMC.L3C@vcd.hp.com> johne@PROBLEM_WITH_INEWS_GATEWAY_FILE (John Eaton) writes:
- :Assume such a chip could be clocked at 10 mhz. It would take 16 * 100 ns
- :to perform a single decryption. But since you have all 16 stages you
- :could pipeline the process so that you preformed one decryption every
- :100 ns. With 32 of these going at once you would average one DES operation
- :every 3.125 ns. One chip could cover the entire keyspace in 7.14 years.
- :A parallel machine of 1024 chips could do it in 2.5 days. We are probably
- :talking in the 50-100K$ range.
-
- What about the chip on the output end that decides if the output is a
- valid decryption or just junk? At that rate you can't feed it into a
- general purpose computer can you?
-
- Hmmm... makes me think that double-encryption (with another alg - I'd
- guess double encryption with DES would be decodable in a single DES, or
- no?) might be worthwhile if it forces the algorithm out of hardware
- and back on to a CPU...
-
- G
-