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- From: eggenste@cantor.informatik.uni-dortmund.de (Heinz-Bernd Eggenstein (LS2))
- Newsgroups: comp.sys.intel
- Subject: i386 + 32 Bit Registers
- Date: 28 Jan 1993 15:53:03 GMT
- Organization: CS Department, Dortmund University, Germany
- Lines: 40
- Sender: eggenste@cantor (Heinz-Bernd Eggenstein (LS2))
- Distribution: world
- Message-ID: <1k8vgvINNhs3@fbi-news.Informatik.Uni-Dortmund.DE>
- NNTP-Posting-Host: cantor.informatik.uni-dortmund.de
-
- Hi!
-
- (Hope this is not a FAQ or a stupid one):
-
- What will happen to the upper 16 bit content of the registers EAX,EBX,...EBP,ESP
- etc. when using 16 bit instructions?
- Example:
- MOV EAX HFFFFFFFF
- Add ax,1
- EAX=????????????
-
- My 486DX seams to leave the upper 16 bits unchanged but the
- real question is: is this a documented (where) feature? What about
- all these dozens of 386 and 486 clones, and the 486 part of the
- Pentium??
-
- If the upper bits are unchanged, this would give you a second
- bank of 16 bit registers (switching between the "banks" with ROL E**,16).
-
- However, if for example XOR ax,ax is simply treated as XOR EAX,EAX
- by the processor and the 16 upper bits are changed, this could lead
- to *serious* problems when using DOS programs compiled with the -3
- option of BORLAND C++ 3.1: BC++3.11 code uses 32 bit registers to
- handle "long int"s. MS-DOS interrupts use (and save) only the
- 16-bit registers (the lower 16 bits of E**)
-
- I tried to look this up in various handbooks for assembly programming,
- but none had the answer. I couldn`t find anything Intel-official on this,
- either.
-
- Could someone please give me a hint or pointer to the right
- Intel-docu??
-
- Please reply via e-mail.
- Thanx in advance.
-
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