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- From: preston@dawn.cs.rice.edu (Preston Briggs)
- Subject: Re: Optimizations for Pipelined Processors
- Reply-To: preston@dawn.cs.rice.edu (Preston Briggs)
- Organization: Rice University, Houston
- Date: Fri, 22 Jan 1993 21:21:01 GMT
- Approved: compilers@iecc.cambridge.ma.us
- Message-ID: <93-01-161@comp.compilers>
- References: <93-01-151@comp.compilers>
- Keywords: optimize, parallel, bibliography
- Sender: compilers-sender@iecc.cambridge.ma.us
- Lines: 128
-
- s2861785@techst02.technion.ac.il (Alon Ziv) writes:
- >During a discussion with a friend who works for Intel in microprocessor
- >developement, we found out that nothing is ever taught about implementing
- >compiler back-ends for pipelined processors
-
- This is overly pessimistic. Plenty of people study, write, and teach
- about these things.
-
- Here's some of the papers I could find in old proceedings of the
- Sigplan conference on programming language design and implementation
- (PLDI). There's probably a lot more in the microprogramming community.
-
- Preston Briggs
-
- title="Parallel Processing: A Smart Compiler and a Dumb Machine",
- author="Joseph A. Fisher and John R. Ellis and John C. Ruttenberg and
- Alexandru Nicolau",
- journal=sigplan,
- year=1984,
- month=jun,
- volume=19,
- number=6,
- note=pldi84,
- pages="37--47"
-
-
- title="A {Fortran} Compiler for the {{\small FPS}}-164 {Scientific}
- {Computer}",
- author="Roy F. Touzeau",
- journal=sigplan,
- year=1984,
- month=jun,
- volume=19,
- number=6,
- note=pldi84,
- pages="48--57"
-
-
- title="Efficient Instruction Scheduling for a Pipelined Architecture",
- author="Phillip B. Gibbons and Steven S. Muchnick",
- journal=sigplan,
- year=1986,
- month=jul,
- volume=21,
- number=7,
- note=pldi86,
- pages="11--16"
-
-
- author="Alexander Aiken and Alexandru Nicolau",
- title="Optimal Loop Parallelization",
- pages="308--317",
- journal=sigplan,
- year=1988,
- month=jul,
- volume=23,
- number=7,
- note=pldi88
-
-
- title="Software Pipelining: An Effective Scheduling Technique
- for {{\small VLIW}} Machines",
- author="Monica Lam",
- journal=sigplan,
- year=1988,
- month=jul,
- volume=23,
- number=7,
- note=pldi88,
- pages="318--328"
-
-
- author="Guang R. Gao and Yue-Bong Wong and Qi Ning",
- title="A Timed Petri-Net Model for Fine-Grain Loop Scheduling",
- pages="204--218",
- journal=sigplan,
- year=1991,
- month=jun,
- volume=26,
- number=6,
- note=pldi91
-
-
- author="Suneel Jain",
- title="Circular Scheduling: A New Technique to Perform Software Pipelining",
- pages="219--228",
- journal=sigplan,
- year=1991,
- month=jun,
- volume=26,
- number=6,
- note=pldi91
-
-
- author="David G. Bradlee and Robert R. Henry and Susan J. Eggers",
- title="The {Marion} System for Retargetable Instruction Scheduling",
- pages="229--240",
- journal=sigplan,
- year=1991,
- month=jun,
- volume=26,
- number=6,
- note=pldi91
-
-
- author="David Bernstein and Michael Rodeh",
- title="Global Instruction Scheduling for Superscalar Machines",
- pages="241--255",
- journal=sigplan,
- year=1991,
- month=jun,
- volume=26,
- number=6,
- note=pldi91
-
-
- author="Todd A. Proebsting and Charles N. Fischer",
- title="Linear-Time, Optimal Code Scheduling for Delayed-Load Architectures",
- pages="256--267",
- journal=sigplan,
- year=1991,
- month=jun,
- volume=26,
- number=6,
- note=pldi91
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