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Path: sparky!uunet!wupost!darwin.sura.net!ukma!cs.widener.edu!dsinc!ub!galileo.cc.rochester.edu!ee.rochester.edu!rbc!al
From: al@rbc.uucp (Al Davis)
Newsgroups: alt.sources
Subject: ACS circuit simulator part 03/20
Message-ID: <1993Jan25.052034.4629@rbc.uucp>
Date: 25 Jan 93 05:20:34 GMT
Sender: al@rbc.uucp (Al Davis)
Organization: Huh?
Lines: 1623
#! /bin/sh
# This is a shell archive, meaning:
# 1. Remove everything above the #! /bin/sh line.
# 2. Save the resulting text in a file.
# 3. Execute the file with /bin/sh (not csh) to create the files:
# man/behavior.tex
# man/circuit.tex
# man/commands.tex
# man/man.tex
# man/manl.tex
# man/start.tex
# man/tech.tex
# man/title.tex
# man/Circuit
# This archive created: Mon Jan 25 00:17:42 1993
export PATH; PATH=/bin:$PATH
if test -f 'man/behavior.tex'
echo shar: will not over-write existing file "'man/behavior.tex'"
cat << \SHAR_EOF > 'man/behavior.tex'
% behavior 06/28/90
% man behavior +
% Copyright 1983-1992 Albert Davis
%----------------------------------------------------------------------------
\chapter{Behavioral modeling}
\input{Behavior/language.tex}
\input{Behavior/result.tex}
%----------------------------------------------------------------------------
%----------------------------------------------------------------------------
SHAR_EOF
fi # end of overwriting check
if test -f 'man/circuit.tex'
echo shar: will not over-write existing file "'man/circuit.tex'"
cat << \SHAR_EOF > 'man/circuit.tex'
% circuit.tex 04/13/92
% man circuit +
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\chapter{Circuit description}
\input{Circuit/0summary.tex}
%\input{Circuit/a.tex}
%\input{Circuit/b.tex} % nonlinear dependent source (spice3)
\input{Circuit/c.tex} % capacitor
\input{Circuit/d.tex} % diode
\input{Circuit/e.tex} % vcvs
\input{Circuit/f.tex} % cccs
\input{Circuit/g.tex} % vccs
\input{Circuit/h.tex} % ccvs
\input{Circuit/i.tex} % cs
\input{Circuit/j.tex} % jfet (not yet)
\input{Circuit/k.tex} % mutual inductance (not yet)
\input{Circuit/l.tex} % inductance
\input{Circuit/m.tex} % mosfet
%\input{Circuit/n.tex}
%\input{Circuit/o.tex}
%\input{Circuit/p.tex}
\input{Circuit/q.tex} % bjt (not yet)
\input{Circuit/r.tex} % resistor
%\input{Circuit/s.tex} % vc switch (spice3) (not yet)
\input{Circuit/t.tex} % transmission line
\input{Circuit/u.tex} % logic device
%\input{Circuit/u.tex} % uniform rc line (spice3) (not yet)
\input{Circuit/v.tex} % vs
%\input{Circuit/w.tex} % cc switch (spice3) (not yet)
\input{Circuit/x.tex} % subcircuit
\input{Circuit/y.tex} % admittance (extension)
%\input{Circuit/z.tex} % mesfet (spice3) (not yet)
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
fi # end of overwriting check
if test -f 'man/commands.tex'
echo shar: will not over-write existing file "'man/commands.tex'"
cat << \SHAR_EOF > 'man/commands.tex'
% commands.tex 01/20/93
% man commands +
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\chapter{Command descriptions}
\input{Commands/0summary.tex}
\input{Commands/1shell.tex}
\input{Commands/2batch.tex}
\input{Commands/3outfile.tex}
\input{Commands/ac.tex}
\input{Commands/alter.tex} % stub
\input{Commands/build.tex}
\input{Commands/chdir.tex}
\input{Commands/clear.tex}
\input{Commands/dc.tex}
\input{Commands/delete.tex}
\input{Commands/disto.tex} % stub
\input{Commands/edit.tex}
\input{Commands/end.tex} % stub
\input{Commands/exit.tex}
\input{Commands/fault.tex}
%\input{Commands/fourier.tex}
\input{Commands/generato.tex}
\input{Commands/get.tex}
\input{Commands/help.tex}
\input{Commands/ic.tex} % stub
\input{Commands/insert.tex}
\input{Commands/list.tex}
\input{Commands/log.tex}
\input{Commands/mark.tex}
\input{Commands/merge.tex}
\input{Commands/modify.tex}
\input{Commands/network.tex}
\input{Commands/nodeset.tex} % stub
\input{Commands/noise.tex} % stub
\input{Commands/op.tex}
\input{Commands/options.tex}
\input{Commands/pause.tex}
\input{Commands/plot.tex}
\input{Commands/print.tex}
\input{Commands/quit.tex}
\input{Commands/save.tex}
\input{Commands/sens.tex} % stub
\input{Commands/set.tex}
\input{Commands/status.tex}
\input{Commands/sweep.tex}
\input{Commands/temp.tex} % stub
\input{Commands/tf.tex} % stub
\input{Commands/title.tex}
\input{Commands/transient.tex}
\input{Commands/unfault.tex}
\input{Commands/unmark.tex}
\input{Commands/width.tex}
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
fi # end of overwriting check
if test -f 'man/man.tex'
echo shar: will not over-write existing file "'man/man.tex'"
cat << \SHAR_EOF > 'man/man.tex'
% man.tex 12/31/92
% man +
% Copyright 1983-1992 Albert Davis
\documentstyle[twocolumn,times]{book}
\topmargin 0in
\oddsidemargin 0in
\evensidemargin 0in
\textheight 8.0in
\textwidth 6.5in
\setcounter{tocdepth}{1}
\makeindex
\begin{document}
\input{title.tex}
\tableofcontents
\input{start.tex} % introduction
\input{commands.tex} % command description
\input{circuit.tex} % circuit elements
%\input{analysis.tex} % analysis modes
%\input{errors.tex} % error handling
%\input{filefmt.tex} % input and output formats
%\input{examples.tex} % examples
%\input{install.tex} % installation
\input{tech.tex} % technical manual
\input{man.ind}
\end{document}
%--------------------------------------------------------------------------
%--------------------------------------------------------------------------
SHAR_EOF
fi # end of overwriting check
if test -f 'man/manl.tex'
echo shar: will not over-write existing file "'man/manl.tex'"
cat << \SHAR_EOF > 'man/manl.tex'
% manl.tex 01/20/93 large version
% manl +
% Copyright 1983-1992 Albert Davis
\documentstyle[12pt,times]{book}
\topmargin 0in
\oddsidemargin 0in
\evensidemargin 0in
\textheight 8.0in
\textwidth 6.5in
\setcounter{tocdepth}{1}
\makeindex
\begin{document}
\input{title.tex}
\tableofcontents
\input{start.tex} % introduction
\input{commands.tex} % command description
\input{circuit.tex} % circuit elements
%\input{analysis.tex} % analysis modes
%\input{errors.tex} % error handling
%\input{filefmt.tex} % input and output formats
%\input{examples.tex} % examples
%\input{install.tex} % installation
\input{tech.tex} % technical manual
\input{manl.ind}
\end{document}
%--------------------------------------------------------------------------
%--------------------------------------------------------------------------
SHAR_EOF
fi # end of overwriting check
if test -f 'man/start.tex'
echo shar: will not over-write existing file "'man/start.tex'"
cat << \SHAR_EOF > 'man/start.tex'
% start 01/24/93
% man start .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\chapter{Introduction}
%------------------------------------------------------------------------
\section{What is it?}
ACS is a general purpose mixed analog and digital circuit simulator. It
performs nonlinear dc and transient analyses, fourier analysis, and ac
analysis linearized at an operating point. It is fully interactive and
command driven. It can also be run in batch mode. The output is produced
as it simulates. Spice compatible models for the MOSFET (level 2) and diode
are included in this release. Other models (MOSFET levels 1 and 3 and BJT)
are in the testing phase.
Since it is fully interactive, it is possible to make changes and re-simulate
quickly. The traditional batch approach of repeat(edit, simulate, wait) is
a thing of the past. This makes ACS ideal for experimenting with circuits as
you might do in an iterative design or testing design principles as you might
do in a course on circuits.
In batch mode it is mostly Spice compatible, so it is often possible to use
the same file for both ACS and Spice.
The analog simulation is based on traditional nodal analysis with iteration
by Newton's method and LU decomposition. An event queue and incremental
matrix update speed up the solution considerably for large circuits and
provide most of the benefits of relaxation methods but without the drawbacks.
It also has digital devices, so it is a gate level logic simulator. The
digital devices may be implemented as either analog subcircuits or as true
digital models. The simulator will automatically determine which to use.
Networks of digital devices are simulated as digital, with no conversions to
analog between gates. This results in digital circuits being simulated
faster than on a typical analog simulator, even with behavioral models.
ACS also has a simple behavioral modeling language that allows simple
behavioral descriptions of most components including capacitors and
inductors.
ACS is an ongoing research project. It is being released in a preliminary
phase in hopes that it will be useful and that others will use it as a
thrust or base for their research.
%------------------------------------------------------------------------
\section{Starting}
\index{starting}
To run this program, type and enter the command: {\tt eca}, from the command
shell.
The prompt {\tt -->} shows that the program is in the command mode. You
should enter a command. Normally, the first command will be to {\tt build} a
circuit, or to {\tt get} one from the disk. First time users should turn to
the examples section for further assistance. There is a {\tt help} command,
in case you get lost.
To run in batch mode, use {\tt eca {\em file}}. This will run the {\em
file} in batch mode. If it ends with an {\tt .end} command, it will exit
when done, otherwise it will revert to command mode.
%------------------------------------------------------------------------
\section{How to use this manual}
The best approach is to read this chapter, then read the command summary at
the beginning of chapter 2, then run the examples in the tutorial section.
Later, when you want to use the advanced features, go back for more detail.
This manual is designed as a reference for users who are familiar with
circuit design, and therefore does not present information on circuit design
but only on the use of this program to analyze such a design. Likewise, it
is not a text in modeling, although the models section does touch on it.
\index{notation}
\index{syntax}
Throughout this manual, the following notation conventions are used:
\begin{itemize}
\index{typewriter font}
\item {\tt Typewriter} font represents exactly what you type, or computer
output.
\item {\tt \underline{Underlined typewriter}} font is what you type, in a
dialogue with the computer.
\index{upper case}
\index{lower case}
\index{short commands}
\item Command words are shown in mixed UPPER and lower case. The upper case
part must be entered exactly. The lower case part is optional, but if
included must be spelled correctly.
\index{italics}
\item {\it Italics} indicate that you should substitute the appropriate name
or value.
\index{braces}
\item Braces \{ \} indicate optional parameters.
\item Ellipses (...) indicate that an entry may be repeated as many times as
needed or desired.
\end{itemize}
%------------------------------------------------------------------------
\section{Command structure}
\index{command structure}
\index{short commands}
\index{abbreviations}
Commands are whole words, but usually you only have to type enough of the
word to make it unique. The first three letters will almost always work.
In some cases less will do. The whole word is significant, if used, and
must be spelled correctly.
In files, commands must be prefixed with a dot (.). This is done for
compatibility with other simulation programs, such as SPICE.
Command options should be separated by commas or spaces. In some cases, the
commas or spaces are not necessary, but it is good practice to use them.
\index{upper case}
\index{lower case}
\index{case}
Upper and lower case are usually the same.
\index{order: command}
Usually options can be entered in any order. The exceptions to this are
numeric parameters, where the order determines their meaning, and
command-like parameters, where they are executed in order. If parameters
conflict, the last takes precedence.
In general, standard numeric parameters, such as sweep limits, must be
entered first, before any options.
\index{comment lines}
Any line starting with {\tt *} is considered a comment line, and is
ignored. Anything on any line following a quote is ignored. This is mainly
intended for files.
\index{abbreviated notation}
This program supports abbreviated notation for floating point numeric
entries. `K' means kilo, or `e3', etc. `M' and `m' mean milli, not mega
(for Spice compatibility). `Meg' means mega. Of course, it will also take
the standard scientific notation. Letters following values, without spaces,
are ignored.
\begin{verse}
T = Tera = e12\\
G = Giga = e9\\
Meg = Mega = e6\\
K = Kilo = e3\\
m = milli = e-3\\
u = micro = e-6\\
n = nano = e-9\\
p = pico = e-12\\
f = femto = e-15
\end{verse}
Files are written in this same format. To write a file with standard
scientific notation, append the word {\tt Basic} to the command.
%------------------------------------------------------------------------
\section{Standard options}
\index{standard options}
There are several options that are used in many commands that have a
consistent meaning.
\begin{description}
\index{quiet option}
\item[{\tt Quiet}] Suppress all unnecessary output, such as intermediate
results, disk reads, activity indicators.
\index{echo option}
\item[{\tt Echo}] Echo all disk reads to the console, as read from the disk.
\index{basic option}
\index{scientific notation}
\item[{\tt Basic}] Format the output for compatibility with other software
with primitive input parsers, such as C's {\em scanf} and Basic's {\em input}
statements. It forces exponential notation, instead of our standard
abbreviated notation. Any numbers that would ordinarily be printed without
an exponent are not changed.
\index{pack option}
\item[{\tt Pack}] Remove extra spaces from the output to save space.
\index{input file}
\index{< option}
\item[{\tt <}] Take the input from a file. The file name follows in the
same line.
\index{disk file}
\index{output file}
\index{file option}
\index{> option}
\item[{\tt >}] Direct the output to a file. The file name follows. If the
file already exists, it will ask permission to delete the old one and
replace it with a new one with the same name.
\item[{\tt >>}] Direct the output to a file. If the file already exists,
the new data is appended to it.
\end{description}
%------------------------------------------------------------------------
\section{In case of difficulty}
\index{problems}
\index{bugs}
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
I do not promise any
kind of support or assistance to users. However, I plan to continue to
improve it and keep it reliable, so please send me any complaints and
suggestions you have. I will probably fix anything that is clearly (to me)
a malfunction. I may make an improvement if I consider it worth the effort,
but you should not be surprised if I don't think I can spare time for it.
The direction for enhancements is primarily driven by research interests
and funding. I may provide some assistance to academic users at no charge.
The latest version of the program and libraries is available from the
bulletin board at (716)272-1645. Login as "guest".
As of now, the bulletin board has executables for NeXT, MSDOS and possibly
others. The full source for the latest version is available along with
any new models or hints that anyone may have contributed.
You should register by sending your email address to
davis@ee.rochester.edu. You will be notified by email of any updates to the
program and possibly of what work is being done.
If you have problems, questions or comments send email to
davis@ee.rochester.edu. You can send paper mail to: Albert Davis, 136
Doncaster Road, Rochester, NY 14623.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
fi # end of overwriting check
if test -f 'man/tech.tex'
echo shar: will not over-write existing file "'man/tech.tex'"
cat << \SHAR_EOF > 'man/tech.tex'
% tech.tex 01/16/93
% man tech +
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\chapter{Technical Notes}
%\input{Tech/preface.tex} % qualifications
%\input{Tech/methods.tex} % simulation methods
\input{Tech/datastruct.tex} % data structures, etc.
%\input{Tech/modeleqn.tex} % model equations, etc.
\input{Tech/addmodel.tex} % model addition (coding)
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
fi # end of overwriting check
if test -f 'man/title.tex'
echo shar: will not over-write existing file "'man/title.tex'"
cat << \SHAR_EOF > 'man/title.tex'
% title 02/06/92
% man title .
% Copyright 1983-1992 Albert Davis
\title{ACS \\ (Al's Circuit Simulator) \\ Users manual}
\author{Albert Davis}
\date{\today}
\maketitle
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
fi # end of overwriting check
if test ! -d 'man/Circuit'
mkdir 'man/Circuit'
cd 'man/Circuit'
if test -f '0summary.tex'
echo shar: will not over-write existing file "'0summary.tex'"
cat << \SHAR_EOF > '0summary.tex'
% summary.tex 04/13/92
% man circuit summary .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
To describe a circuit, you must provide a `netlist'. The netlist is simply
a list of the components with their connections and values. The format is
essentially the same as the standard SPICE format.
Before doing this, number the nodes on your schematic. (A node is a place
where parts connect together.) Then, each part gets a line in the netlist
(circuit description). In its simplest form, which you will use most of the
time, it is just the type, such as `R' for resistor, or a label, like `R47',
followed by the two nodes it connects to, then its value.
Example: `{\tt R29 6 8 22k}' is a 22k resistor between nodes 6 and 8.
\index{ground node}
\index{common node}
\index{voltage reference}
Node 0 is used as a reference for all calculations and is assumed to have a
voltage of zero. (This is the ground, earth or common node.) Nodes must be
nonnegative integers, but need not be numbered sequentially.
\index{open circuit error}
There should be a DC path through the circuit to node 0 from every node
that is actually used. The circuit cannot contain a cutset of current
sources and/or capacitors. If either of these cases occurs, it will be
discovered during analysis. The program will attempt to correct the error,
issue an `open circuit' error message and continue. This is rarely a
problem with real circuits. Most circuits have such a path, however
indirect.
Semiconductor devices require both a device statement, and a {\tt .model}
statement (or ``card''). The device statement, described in the Circuit
description chapter, defines individual devices as variations from a
prototype, as is required for different devices on the same substrate. The
model statement, described in this chapter, defines process dependent
parameters, which usually apply to all devices on a substrate.
The {\tt .model} card syntax is:
\begin{verse}
{\tt .model} {\it mnape type} \{{\it args}\}
\end{verse}
{\it Mnane} is the model name, which elements will use to refer to this
model. {\it Type} is one of several types of built-in models. {\it Args}
is a list of the parameters, of the form {\it name}{\tt =}{\it value}.
\begin{description}
\item[{\tt D}] Diode model
\item[{\tt NMOS}] N-channel MOSFET model
\item[{\tt PMOS}] P-channel MOSFET model
\item[{\tt LOGIC}] Logic family description
\end{description}
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
fi # end of overwriting check
if test -f 'c.tex'
echo shar: will not over-write existing file "'c.tex'"
cat << \SHAR_EOF > 'c.tex'
% c.tex 04/13/92
% man circuit c .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt C}: Capacitor}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt C}{\it xxxxxxx n+ n-- value}\\
{\tt C}{\it xxxxxxx n+ n-- value} \{{\tt IC=}{\it incond}\}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Capacitor, or general charge storage element.
%------------------------------------------------------------------------
\subsection{Comments}
{\it N+} and {\it n--} are the positive and negative element nodes,
respectively. {\it Value} is the capacitance in Farads.
The (optional) initial condition is the initial (time = 0) value of the
capacitor voltage (in Volts). Note that the initial conditions (if any)
apply only if the {\tt UIC} option is specified on the {\tt transient}
command.
%Spice-3 has model for semiconductor cap. Syntax: ... val mname L=len
%W=width. Val overrides l and w.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
fi # end of overwriting check
if test -f 'd.tex'
echo shar: will not over-write existing file "'d.tex'"
cat << \SHAR_EOF > 'd.tex'
% d.tex 01/23/93
% man circuit d .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt D}: Diode}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt D}{\it xxxxxxx n+ n-- mname} \{{\it area}\} \{{\it args}\}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Junction diode.
%------------------------------------------------------------------------
\subsection{Comments}
{\it N+} and {\it n--} are the positive and negative element nodes,
respectively. {\it Mname} is the model name. {\it Area} is the area
factor. If the area factor is omitted, a value of 1.0 is assumed. {\it
Args} is a list of additional arguments. The parameters available are a
superset of those available in SPICE.
When the element is printed out, by a {\tt list} or {\tt save} command, the
the computed values of {\tt IS}, {\tt RS}, {\tt CJ}, and {\tt CJSW} are
printed as a comment, if they were not explicitly entered.
%------------------------------------------------------------------------
\subsection{Element Parameters}
\begin{description}
\item[{\tt Area} = {\it x}] Area factor. (Default = 1.0) If optional
parameters {\tt IS}, {\tt RS}, and {\tt CJO} are not specified, the {\tt
.model} value is multiplied by {\tt area} to get the actual value.
\item[{\tt Perim} = {\it x}] Perimeter factor. (Default = 1.0) If optional
parameter {\tt CJSW} is not specified, the {\tt .model} value is multiplied
by {\tt perim} to get the actual value.
\item[{\tt IC} = {\it x}] Initial condition. The initial voltage to use in
transient analysis, if the {\tt UIC} option is specified. Default: don't
use initial condition. This is presently ignored, but accepted for
compatibility.
\item[{\tt OFF}] Start iterating with this diode off, in DC analysis. This
is presently ignored, but accepted for compatibility.
\item[{\tt IS} = {\it x}] Saturation current. This overrides {\tt IS} in
the {\tt .model}, and is not affected by {\tt area}. Default: use {\tt IS}
from {\tt .model} * {\tt area}.
\item[{\tt RS} = {\it x}] Ohmic (series) resistance. This overrides {\tt
RS} in the {\tt .model}, and is not affected by {\tt area}. Default: use
{\tt RS} from {\tt .model} * {\tt area}. This is presently ignored, but
accepted for compatibility.
\item[{\tt CJ} = {\it x}] Zero-bias junction capacitance. This overrides
{\tt CJ} in the {\tt .model}, and is not affected by {\tt area}. Default:
use {\tt CJ} from {\tt .model} * {\tt area}.
\item[{\tt CJSW} = {\it x}] Zero-bias sidewall capacitance. This overrides
{\tt CJSW} in the {\tt .model}, and is not affected by {\tt perim}. Default:
use {\tt CJSW} from {\tt .model} * {\tt perim}.
\end{description}
%------------------------------------------------------------------------
\subsection{Model Parameters}
\begin{description}
\item[{\tt IS} = {\it x}] Normalized saturation current. (Amperes).
(Default = 1.0e-14) {\tt IS} is multiplied by the {\it area} in the element
statement to get the actual saturation current. It may be overridden by
specifying {\tt IS} in the element statement.
\item[{\tt RS} = {\it x}] Normalized ohmic resistance. (Ohms) (Default = 0.)
{\tt RS} is multiplied by the {\it area} in the element statement to get the
actual ohmic resistance. It may be overridden by specifying {\tt RS} in the
element statement. {\tt RS} is accepted, and silently ignored, for
compatibility, but not implemented.
\item[{\tt N} = {\it x}] Emission coefficient. (Default = 1.0)
In ECA-2 the default value was 2.
\item[{\tt TT} = {\it x}] Transit time. (Default = 0.) SPICE parameter
accepted but not implemented. A warning will be issued. Specify
capacitance instead.
\item[{\tt VJ} = {\it x}] Junction potential. (Default = 1.0) Used in
computation of capacitance. For compatibility with older versions of SPICE,
{\tt PB} is accepted as an alias for {\tt VJ}.
\item[{\tt CJo} = {\it x}] Normalized zero-bias junction capacitance.
(Default = 0.) {\tt CJo} is multiplied by the {\it area} in the element
statement to get the actual zero-bias capacitance. It may be overridden by
specifying {\tt CJ} in the element statement.
\item[{\tt Mj} = {\it x}] Grading coefficient. (Default = 0.5)
\item[{\tt CJSw} = {\it x}] Normalized zero-bias sidewall capacitance.
(Default = 0.) {\tt CJSw} is multiplied by the {\it perimeter} in the
element statement to get the actual zero-bias capacitance. It may be
overridden by specifying {\tt CJSW} in the element statement.
\item[{\tt MJSw} = {\it x}] Sidewall grading coefficient. (Default = 0.33)
\item[{\tt EG} = {\it x}] Activation energy. (electron Volts) (Default =
1.11, silicon.) For other types of diodes, use:
\begin{verse}
1.11 ev. Silicon (default value)\\
0.69 ev. Schottky barrier\\
0.67 ev. Germanium\\
1.43 ev. GaAs\\
2.26 ev. GaP
\end{verse}
\item[{\tt XTI} = {\it x}] Saturation current temperature exponent.
(Default = 3.0) For Schottky barrier, use 2.0.
\item[{\tt KF} = {\it x}] Flicker noise coefficient. (Default = 0.) SPICE
parameter accepted but not implemented.
\item[{\tt AF} = {\it x}] Flicker noise exponent. (Default = 1.0) SPICE
parameter accepted but not implemented.
\item[{\tt FC} = {\it x}] Coefficient for forward bias depletion capacitance
formula. (Default = 0.5)
\item[{\tt BV} = {\it x}] Reverse breakdown voltage. (Default = $\infty$.)
SPICE parameter accepted but not implemented.
\item[{\tt IBV} = {\it x}] Current at breakdown voltage. (Default = 1 ma.)
SPICE parameter accepted but not implemented.
\end{description}
%------------------------------------------------------------------------
\subsection{Probes}
\begin{description}
\item[{\tt V}] Voltage. The first node (anode) is assumed positive.
\item[{\tt I}] Total current. It flows into the first node (anode), out of
the second. (IJ + IC)
\item[{\tt IJ}] Junction current. The current through the junction.
\item[{\tt IC}] Capacitor current. The current through the parallel capacitor.
\item[{\tt P}] Power dissipation. (PJ + PC)
\item[{\tt PJ}] Junction power dissipation.
\item[{\tt PC}] Capacitor power dissipation.
\item[{\tt R}] Effective resistance.
\end{description}
All parameters of the internal elements Yj and Cj are available. To access
them, concatenate the labels for the internal element with the diode,
separated by a dot. Yj.D6 is the admittance (Yj) element of the diode D6.
In this release, there are no probes available in AC analysis except for the
internal elements.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
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% e.tex 04/13/92
% man circuit e .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt E}: Voltage Controlled Voltage Source}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt E}{\it xxxxxxx n+ n-- nc+ nc--} {\it value}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Voltage controlled voltage source, or voltage gain block.
%------------------------------------------------------------------------
\subsection{Comments}
{\it N+} and {\it n--} are the positive and negative element (output) nodes,
respectively. {\it Nc+} and {\it nc--} are the positive and negative
controlling nodes, respectively. {\it Value} is the voltage gain.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
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% f.tex 04/13/92
% man circuit f .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt F}: Current Controlled Current Source}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt F}{\it xxxxxxx n+ n-- ce} {\it value}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Current controlled current source, or current gain block.
%------------------------------------------------------------------------
\subsection{Comments}
{\it N+} and {\it n--} are the positive and negative element (output) nodes,
respectively. Current flow is from the positive node, through the source,
to the negative node. {\it Ce} is the name of an element through which the
controlling current flows. The direction of positive controlling current is
from the positive node, through the element, to the negative node of {\it
ce}. {\it Value} is the transconductance in mhos.
The controlling element can be any two terminal element, or controlled
source.
This is not currently implemented.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
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% g.tex 04/13/92
% man circuit g .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt G}: Voltage Controlled Current Source}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt G}{\it xxxxxxx n+ n-- nc+ nc--} {\it value}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Voltage controlled current source, or transconductance block.
%------------------------------------------------------------------------
\subsection{Comments}
{\it N+} and {\it n--} are the positive and negative element (output) nodes,
respectively. Current flow is from the positive node, through the source,
to the negative node. {\it Nc+} and {\it nc--} are the positive and negative
controlling nodes, respectively. {\it Value} is the transconductance in
mhos.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
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% h.tex 04/13/92
% man circuit h .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt H}: Current Controlled Voltage Source}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt H}{\it xxxxxxx n+ n-- ce} {\it value}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Current controlled voltage source, or transresistance block.
%------------------------------------------------------------------------
\subsection{Comments}
{\it N+} and {\it n--} are the positive and negative element (output) nodes,
respectively. {\it Ce} is the name of an element through which the
controlling current flows. The direction of positive controlling current is
from the positive node, through the element, to the negative node of {\it
ce}. {\it Value} is the transresistance in Ohms.
The controlling element can be any two terminal element, or controlled
source.
This is not currently implemented.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
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% i.tex 04/13/92
% man circuit i .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt I}: Independent Current Source}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt I}{\it xxxxxxx n+ n--} {\it value}\\
{\tt I}{\it xxxxxxx n+ n--} {\it expression}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Independent current source.
%------------------------------------------------------------------------
\subsection{Comments}
{\it N+} and {\it n--} are the positive and negative element nodes,
respectively. Positive current flow is from the positive node, through the
source, to the negative node. {\it Value} is the current in Amperes.
All of the SPICE time dependent functions ({\tt pulse}, {\tt sin}, {\tt
exp}, {\tt pwl}, and {\tt sffm} are supported. An additional
function {\tt generator} emulates a laboratory type function generator, for
a more convenient signal input to the circuit.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
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% j.tex 04/13/92
% man circuit j .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt J}: Junction Field-Effect Transistor}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt J}{\it xxxxxxx nd ng ns mname} \{{\it area}\} \{{\it args}\}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Junction Field Effect Transistor.
%------------------------------------------------------------------------
\subsection{Comments}
Not implemented.
Plans are to implement it as in SPICE.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
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% k.tex 04/13/92
% man circuit k .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt K}: Coupled (Mutual) Inductors}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt K}{\it xxxxxxx} {\tt L}{\it yyyyyyy} {\tt L}{\it zzzzzzz} {\it value}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Coupled mutual inductance.
%------------------------------------------------------------------------
\subsection{Comments}
Not implemented.
Plans are to implement it as in SPICE.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
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% l.tex 04/13/92
% man circuit l .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt L}: Inductor}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt L}{\it xxxxxxx n+ n-- value}\\
{\tt L}{\it xxxxxxx n+ n-- value} \{{\tt IC=}{\it incond}\}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Inductor, or general flux storage element.
%------------------------------------------------------------------------
\subsection{Comments}
{\it N+} and {\it n--} are the positive and negative element nodes,
respectively. {\it Value} is the inductance in Henries.
The (optional) initial condition is the initial (time = 0) value of the
inductor current (in Amperes). Note that the initial conditions (if any)
apply only if the {\tt UIC} option is specified on the {\tt transient}
command.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
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% m.tex 01/23/93
% man circuit m .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt M}: MOSFET}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt M}{\it xxxxxxx nd ng ns nb mname} \{{\it args}\}\\
{\tt M}{\it xxxxxxx nd ng ns nb mname}
\{{\it width}{\tt /}{\it length}\} \{{\it args}\}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
MOSFET.
%------------------------------------------------------------------------
\subsection{Comments}
{\it Nd}, {\it ng}, {\it ns}, and {\it nb} are the drain, gate, source, and
bulk (substrate) nodes, respectively. {\it Mname} is the model name.
{\it Length} and {\it width} are the drawn channel length and width, in
microns. Note that the notation W/L has units of microns, but the same
parameters, in the argument list ({\tt W} and {\tt L}) have units of meters.
All other dimensions are in meters.
Only the level 2 model is implemented.
%------------------------------------------------------------------------
\subsection{Element Parameters}
\begin{description}
\item[{\tt L} = {\it x}] Drawn channel length. (Default = {\tt DEFL}
parameter from {\tt options}. {\tt DEFL default = 100$\mu$})
\item[{\tt W} = {\it x}] Drawn channel width. (Default = {\tt DEFW}
parameter from {\tt options}. {\tt DEFW default = 100$\mu$})
\item[{\tt AD} = {\it x}] Area of drain diffusion. (Default = {\tt DEFAD}
parameter from {\tt options}. {\tt DEFAD default = 0})
\item[{\tt AS} = {\it x}] Area of source diffusion. (Default = {\tt DEFAS}
parameter from {\tt options}. {\tt DEFAS default = 0})
\item[{\tt PD} = {\it x}] Perimeter of drain junction. (Default = 0.)
\item[{\tt PS} = {\it x}] Perimeter of source junction. (Default = 0.)
\item[{\tt NRD} = {\it x}] Number of squares of drain diffusion. (Default =
\item[{\tt NRS} = {\it x}] Number of squares of source diffusion. (Default =
\end{description}
%------------------------------------------------------------------------
\subsection{Model Parameters}
\begin{description}
\item[{\tt LEVEL} = {\it x}] Model index. (Default = 2) Selects which of
several models to use. The only one presently implemented is ``Level 2''.
\item[{\tt VTO} = {\it x}] Zero bias threshold voltage. If not input, but
{\tt NSUB} is, it is calculated, otherwise a default value of 0 is used.
\item[{\tt KP} = {\it x}] Transconductance parameter. If not input, it is
calculated by {\tt UO} * {\tt COX}.
\item[{\tt GAMMA} = {\it x}] Bulk threshold parameter. If not input, but
{\tt NSUB} is, it is calculated, otherwise a default value of 0 is used.
\item[{\tt PHI} = {\it x}] Surface potential. If not input, but {\tt NSUB}
is, it is calculated, otherwise a default value of 0.6 is used. A warning
is issued if the calculated value is less than 0.1, in which case 0.1 is
used.
\item[{\tt LAMBDA} = {\it x}] Channel length modulation. If not input, it
is calculated dynamically during simulation. If the value input is larger
than 0.2, a warning is issued, but no correction is made.
\item[{\tt RD} = {\it x}] Drain ohmic resistance. If {\tt RS} is input, the
default value of {\tt RD} is 0. If {\tt RD} and {\tt RS} are both not
input, and {\tt RSH} is input, they are calculated from {\tt RSH}. If any
conflict exists, a warning is issued, indicating the action taken, which is
believed to be compatible with SPICE.
\item[{\tt RS} = {\it x}] Source ohmic resistance. If {\tt RD} is input, the
default value of {\tt RS} is 0. If {\tt RD} and {\tt RS} are both not
input, and {\tt RSH} is input, they are calculated from {\tt RSH}. If any
conflict exists, a warning is issued, indicating the action taken, which is
believed to be compatible with SPICE.
\item[{\tt CBD} = {\it x}] Zero bias B-D junction capacitance. SPICE
parameter accepted but not implemented.
\item[{\tt CBS} = {\it x}] Zero bias B-S junction capacitance. SPICE
parameter accepted but not implemented.
\item[{\tt IS} = {\it x}] Bulk junction saturation current. If not input,
it is calculated from {\tt JS}. If both are input, a warning is issued, and
the calculated value (from {\tt JS}) is used, if {\tt AD} and {\tt AS} are
also input. If neither {\tt IS} or {\tt JS} is input, a default value of
1e-14 is used.
\item[{\tt PB} = {\it x}] Bulk junction potential. (Default = 0.8)
\item[{\tt CGSO} = {\it x}] Gate-source overlap capacitance, per channel
width. (Default = 0.)
\item[{\tt CGDO} = {\it x}] Gate-drain overlap capacitance, per channel
width. (Default = 0.)
\item[{\tt CGBO} = {\it x}] Gate-bulk overlap capacitance, per channel
length. (Default = 0.)
\item[{\tt RSH} = {\it x}] Drain and source diffusion sheet resistance. If
not input, use {\tt RS} and {\tt RD} directly. If a conflict exists, a
warning is issued.
\item[{\tt CJ} = {\it x}] Zero bias bulk junction bottom capacitance per
sq-meter of junction area. If not input, but {\tt NSUB} is, it is
calculated, otherwise a default value of 0 is used.
\item[{\tt MJ} = {\it x}] Bulk junction bottom grading coefficient. (Default
= 0.5)
\item[{\tt CJSW} = {\it x}] Zero bias bulk junction sidewall capacitance per
meter of junction perimeter. (Default = 0.)
\item[{\tt MJSW} = {\it x}] Bulk junction sidewall grading coefficient.
(Default = 0.33)
\item[{\tt JS} = {\it x}] Bulk junction saturation current per sq-meter of
junction area. May be used to calculate {\tt IS}. If a conflict exists, a
warning is issued.
\item[{\tt TOX} = {\it x}] Oxide thickness. (meters) (Default = 1e-7)
\item[{\tt NSUB} = {\it x}] Substrate doping. (atoms / cm$^3$) Used in
calculation of {\tt VTO}, {\tt GAMMA}, {\tt PHI}, and {\tt CJ}. If not
input, default values are used.
\item[{\tt NSS} = {\it x}] Surface state density. (atoms / cm$^2$) (Default
= 0.) Used, with {\tt NSUB} in calculation of {\tt VTO}.
\item[{\tt NFS} = {\it x}] Fast surface state density. (atoms / cm$^2$) Used
in modeling subthreshold effects. If not input, do not model subthreshold
effects.
\item[{\tt TPG} = {\it x}] Type of gate material. (Default = 1.)
\begin{verse}
+1 opposite to substrate\\
--1 same as substrate\\
0 Aluminum
\end{verse}
\item[{\tt XJ} = {\it x}] Metallurgical junction depth. (meters) Used to
calculate short channel effects. If not input, do not model short channel
effects, effectively defaults to 0.
\item[{\tt LD} = {\it x}] Lateral diffusion. (Default = 0.) Effective
channel length is reduced by 2 * {\tt LD}.
\item[{\tt UO} = {\it x}] Surface mobility. (cm$^2$/V-s) (Default = 600.)
\item[{\tt UCRIT} = {\it x}] Critical field for mobility degradation. (V/cm)
(Default = 1e4)
\item[{\tt UEXP} = {\it x}] Critical field exponent in mobility
degradation. If not input, do not model mobility degradation, effectively
defaulting to 0.
\item[{\tt UTRA} = {\it x}] Transverse field coefficient. SPICE parameter
accepted but not implemented. It is also not implemented in most versions
of SPICE.
\item[{\tt VMAX} = {\it x}] Maximum drift velocity of carriers. (m/s)
Used in calculating vdsat, and lambda. If not input, use a different
method. {\tt VMAX} does not always work, if the method fails, the alternate
method is used and the warning ``Baum's theory rejected'' is issued if the
error threshold is set to {\tt debug} or worse.
\item[{\tt NEFF} = {\it x}] Total channel charge (fixed and mobile)
coefficient. (Default = 1.) Used in internal calculation of lambda.
\item[{\tt KF} = {\it x}] Flicker noise coefficient. SPICE parameter
accepted but not implemented.
\item[{\tt AF} = {\it x}] Flicker noise exponent. SPICE parameter accepted
but not implemented.
\item[{\tt FC} = {\it x}] Coefficient for forward bias depletion capacitance
formula. (Default = 0.5)
\item[{\tt DELTA} = {\it x}] Width effect on threshold voltage. (Default =
\item[{\tt THETA} = {\it x}] Mobility modulation. SPICE parameter accepted
but not implemented. SPICE uses it in the Level 3 model only.
\item[{\tt ETA} = {\it x}] Static feedback. SPICE parameter accepted but
not implemented. SPICE uses it in the Level 3 model only.
\item[{\tt KAPPA} = {\it x}] Saturation field vector. SPICE parameter
accepted but not implemented. SPICE uses it in the Level 3 model only.
\end{description}
%------------------------------------------------------------------------
\subsection{Probes}
\begin{description}
\item[{\tt Vds}] Drain - source voltage.
\item[{\tt VGS}] Gate - source voltage.
\item[{\tt VBS}] Body - source voltage.
\item[{\tt VDG}] Drain - gate voltage.
\item[{\tt Id}] Drain current.
\item[{\tt IS}] Source current.
\item[{\tt IG}] Gate current.
\item[{\tt IB}] Body current.
\item[{\tt P}] Power dissipation.
\item[{\tt REgion}] Region code. A numeric code that represents the region
it is operating in. The number is the sum of several factors. A negative
code indicates the source and drain are reversed.
\begin{description}
\item{1} Active. (Not cut off.)
\item{2} Not subthreshold.
\item{4} Saturated.
\item{10} Source to bulk is forward biased.
\item{20} Drain to bulk is forward biased.
\end{description}
\end{description}
All parameters of the internal elements (Ids, Gmr, Gmf, Yds, Gmbr, Gmbf,
Cgb, Cgd, Cgs, Dsb, Ddb, Rd, Rs) are available. To access them, concatenate
the labels for the internal element with the diode, separated by a dot.
Cgd.M6 is the gate to drain capacitance of M6.
In this release, there are no probes available in AC analysis except for the
internal elements.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
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% q.tex 04/13/92
% man circuit q .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt Q}: Bipolar Junction Transistor}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt Q}{\it xxxxxxx nc nb ne mname} \{{\it area}\} \{{\it args}\}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Bipolar junction transistor,
%------------------------------------------------------------------------
\subsection{Comments}
Not implemented.
Plans are to implement it as in SPICE.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
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% r.tex 04/13/92
% man circuit r .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt R}: Resistor}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt R}{\it xxxxxxx n+ n-- value}\\
{\tt R}{\it xxxxxxx n+ n-- expression}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Resistor, or general current controlled dissipative element.
%------------------------------------------------------------------------
\subsection{Comments}
{\it N+} and {\it n--} are the positive and negative element nodes,
respectively. {\it Value} is the resistance in Ohms.
The resistor (type {\tt R}) differs from the admittance (type {\tt Y}) in
that the resistor is a current controlled element, and the conductance is a
voltage controlled element, in addition to the obvious use of conductance
($1/R$) instead of resistance.
%Spice-3 has model for semiconductor resistor. Syntax: ... val mname L=len
%W=width. Val overrides l and w.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
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SHAR_EOF
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% v.tex 04/13/92
% man circuit v .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt V}: Independent Voltage Source}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt V}{\it xxxxxxx n+ n-- value}\\
{\tt V}{\it xxxxxxx n+ n-- expression}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Independent voltage source.
%------------------------------------------------------------------------
\subsection{Comments}
{\it N+} and {\it n--} are the positive and negative element nodes,
respectively. {\it Value} is the voltage in Volts.
All of the SPICE time dependent functions ({\tt pulse}, {\tt sin}, {\tt
exp}, {\tt pwl}, and {\tt sffm} are supported. An additional
function {\tt generator} emulates a laboratory type function generator, for
a more convenient signal input to the circuit.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
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% x.tex 01/23/93
% man circuit x .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt X}: Subcircuit Call}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt X}{\it xxxxxxx n1} \{{\it n2 n3 ...}\} {\it subname}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Subcircuit call
%------------------------------------------------------------------------
\subsection{Comments}
Subcircuits are used by specifying pseudo-elements beginning with {\tt X},
followed by the connection nodes.
%------------------------------------------------------------------------
\subsection{Probes}
\begin{description}
\item[{\tt P}] Power. The sum of the power probes for all the internal elements.
\end{description}
In this release, there are no probes available in AC analysis except for the
internal elements. More parameters will be added. Internal elements can be
probed by concatenating the internal part label with the subcircuit label.
R5.X7 is R5 inside X7.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
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% y.tex 04/13/92
% man circuit y .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt Y}: Admittance}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt Y}{\it xxxxxxx n+ n-- value}\\
{\tt Y}{\it xxxxxxx n+ n-- expression}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Admittance, or general voltage controlled dissipative element.
%------------------------------------------------------------------------
\subsection{Comments}
{\it N+} and {\it n--} are the positive and negative element nodes,
respectively. {\it Value} is the admittance in Mhos.
The resistor (type {\tt R}) differs from the admittance (type {\tt Y}) in
that the resistor is a current controlled element, and the conductance is a
voltage controlled element, in addition to the obvious use of conductance
($1/R$) instead of resistance.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
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% u.tex 01/23/93
% man circuit u .
% Copyright 1983-1992 Albert Davis
%------------------------------------------------------------------------
\section{{\tt U}: Logic Device}
%------------------------------------------------------------------------
\subsection{Syntax}
\begin{verse}
{\tt U}{\it xxxxxxx} {\tt 0} {\it out in1 in2 ... family gatetype}
\end{verse}
%------------------------------------------------------------------------
\subsection{Purpose}
Logic element for mixed or logic mode simulation.
%------------------------------------------------------------------------
\subsection{Comments}
The logic element allows mixed mode simulation. A {\tt .subckt} defines the
analog equivalent of a logic element. The name of the subcircuit is made by
concatenating the {\em family}, {\em gatetype}, and the number of inputs.
For example, if the {\em family} is {\tt cmos} and the {\em gatetype} is
{\tt and} and it has two inputs, the name of the subcircuit is {\tt
cmosand2}.
(This section is unclear because I did it in a hurry.)
%------------------------------------------------------------------------
\subsection{Element Parameters}
{\em Family} refers to the logic family {\tt .model} statement.
{\em Gatetype} is the type of logic gate:
\begin{description}
\item[{\tt AND}]
\item[{\tt NAND}]
\item[{\tt OR}]
\item[{\tt NOR}]
\item[{\tt XOR}]
\item[{\tt INV}]
\end{description}
More will be added including counters, flip-flops and memory cells.
%------------------------------------------------------------------------
\subsection{Model Parameters}
\begin{description}
\item[{\tt DElay} = {\it x}] Propagation delay. (Seconds) (Default = 1e-9)
The propagation delay of a simple gate when simulated in logic mode.
\item[{\tt RIse} = {\it x}] Rise time. (Seconds) (Default = delay / 2) The
nominal rise time of a logic signal. This will be the rise time when a
logic signal is converted to analog.
\item[{\tt FAll} = {\it x}] Fall time. (Seconds) (Default = delay / 2) The
nominal fall time of a logic signal. This will be the fall time when a
logic signal is converted to analog.
\item[{\tt RS} = {\it x}] Series resistance, strong. (Ohms) (Default =
100.) The resistance in series with the output when a logic gate drives
analog circuitry.
\item[{\tt RW} = {\it x}] Series resistance, weak. (Ohms) (Default = 1e9)
The output resistance in a high impedance state.
\item[{\tt THH} = {\it x}] Threshold high. (Unitless) (Default = .75) The
threshold for the input to cross from transition to high expressed as a
fraction of the difference between high and low values. (Low = 0. High =
\item[{\tt THL} = {\it x}] Threshold low. (Unitless) (Default = .25) The
threshold for the input to cross from transition to low expressed as a
fraction of the difference between high and low values. (Low = 0. High =
\item[{\tt MR} = {\it x}] Margin rising. (Unitless) (Default = 5) How much
worse than nominal the analog input rise time can be and still be accepted
as clean enough for logic simulation.
\item[{\tt MF} = {\it x}] Margin falling. (Unitless) (Default = 5) How much
worse than nominal the analog input fall time can be and still be accepted
as clean enough for logic simulation.
\item[{\tt OVer} = {\it x}] Overshoot limit. (Unitless) (Default = .1) How
much overshoot can a signal have and still be accepted as clean enough for
logic simulation, expressed as a fraction of the difference between high and
low values. (Low = 0. High = 1.)
\item[{\tt VMAx} = {\it x}] Nominal logic 1. (Volts) (Default = 5.) The
nominal value for a logic 1.
\item[{\tt VMIn} = {\it x}] Nominal logic 0. (Volts) (Default = 0.) The
nominal value for a logic 0.
\end{description}
%------------------------------------------------------------------------
\subsection{Probes}
\begin{description}
\item[{\tt V}] Output voltage.
\end{description}
In this release, there are no probes available in AC analysis except for the
internal elements. Internal elements in the analog model are available, but
they come and go so they may be unreliable. More parameters will be added.
%------------------------------------------------------------------------
%------------------------------------------------------------------------
SHAR_EOF
fi # end of overwriting check
cd ..
# End of shell archive
exit 0