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  1. Path: sparky!uunet!zaphod.mps.ohio-state.edu!darwin.sura.net!spool.mu.edu!yale.edu!qt.cs.utexas.edu!cs.utexas.edu!rutgers!micro-heart-of-gold.mit.edu!xn.ll.mit.edu!ll.mit.edu!pauls
  2. From: pauls@ll.mit.edu (Richard Pauls)
  3. Newsgroups: comp.sys.mac.hardware
  4. Subject: Re: 486 vs. Mac Benchmarks
  5. Message-ID: <1992Dec21.183509.25097@ll.mit.edu>
  6. Date: 21 Dec 92 18:35:09 GMT
  7. References: <19978.2B35D0BE@zeus.ieee.org>
  8. Sender: news@ll.mit.edu
  9. Organization: MIT Lincoln Lab
  10. Lines: 18
  11.  
  12. In article <19978.2B35D0BE@zeus.ieee.org> eric.larson@f620.n2605.z1.ieee.org (eric larson) writes:
  13. >
  14. > ##                     calc.(sec)       scroll(min:sec)
  15. > ##Mac II                    35.3            2:16.2
  16. > ##Mac IIci                  15.3            1:31.2
  17. > ##Mac IIci/cache off        19.2            1:44.7
  18. > ##386dx                     22.5            2:25.3
  19. >
  20. > # Hmmmm.
  21. >
  22. > # Most 386 motherboards above 25 MHz have a built-in SRAM cache
  23. > # these days. Even the bargain basement jobs.
  24. >
  25. >Need I point out that the 25 MHz IIci/cache off still beats the 386/33?
  26. >
  27. >--  
  28. >=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=
  29. > eric larson - Internet: eric.larson@f620.n2605.z1.ieee.org
  30.