NetNews Usenet Archive 1992 #31/NN_1992_31.iso/spool/comp/sys/ibm/pc/hardware/34404

Internet Message Format | 1992-12-29 | 1.6 KB

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Newsgroups: comp.sys.ibm.pc.hardware,comp.sys.mac.hardware,comp.os.ms-windows.advocacy
Path: sparky!uunet!ftpbox!motsrd!white!sapphire.rtsg.mot.com!catfish16!lamont
From: [e-mail] (Bradley Lamont)
Subject: '040 clock doubling (was Re: "Windoze" slow?)
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Date: Tue, 29 Dec 1992 20:35:37 GMT
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Looking at a Motorola 68040 data book, the '040 has 2 clocks (BCLK and PCLK).
PCLK is used internally and is 2x the freq of BCLK.  All timing in the
timing tables is derived from BCLK.

Many of the instructions are executed in 1 cycle.  This is 1 BCLK cycle.
However, internally this is 2 PCLK cycles.  This allows the '040 to actually
execute 2 internal microcode instructions.

Although the chip is called a 25 MHz or 33 MHz chip, some internal calcs
are done using the PCLK so it can be considered a clock doubler.

The bottom line is that Moto does not call it a clock doubler.

Brad

P.S.  I work for Motorola, but I don't speak for them.  Everything I just
said is from the 68040 data book.
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Bradley H. Lamont                email:  [e-mail]
Wireless Enterprise Systems              [e-mail]
Motorola, Inc.