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- Newsgroups: comp.parallel
- Path: sparky!uunet!zaphod.mps.ohio-state.edu!darwin.sura.net!gatech!hubcap!fpst
- From: kostas@siemens.com. (Konstantinos Diamantaras)
- Subject: Re: Torus vs. Hypercube
- Message-ID: <1992Dec28.220433.5652@siemens.com>
- Sender: news@siemens.com (NeTnEwS)
- Nntp-Posting-Host: tonto
- Organization: Siemens Corp. Res., Inc.
- References: <1992Dec27.201910.28352@ee.eng.ohio-state.edu>
- Date: Mon, 28 Dec 1992 22:04:33 GMT
- Approved: parallel@hubcap.clemson.edu
- Lines: 17
-
- In the following discussion torus means 2-D mesh with wrap-around. I am
- not aware of higher dimensional toruses although can define them I assume.
- The torus of P1xP2 processors has 2xP connections (P=P1xP2).
- The hypercube of P processors has Pxlog_2(P)/2 connections
- (each processor connects to log_2(P) neighbors). So even if
- P is a power of 2 the torus cannot be the same as the hypercube.
- Also P has to be a power of 2 for hypercube but this is not necessary
- for a torus. However, for P=4 and P=8 a torus and a hypercube
- are the same. Also I think all toruses can be embedded
- into appropriate size hypercubes. For good reference see
- Thomson Leighton "Introduction to Parallel Algorithms and Architectures"
- Morgan Kaufman, San Mateo CA, 1992.
-
- Hope this helps
-
- Kostas Diamantaras
-
-