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- Xref: sparky comp.parallel:2809 comp.unix.programmer:5784
- Newsgroups: comp.parallel,comp.unix.programmer,comp.sys.intel.
- Path: sparky!uunet!gumby!destroyer!gatech!hubcap!fpst
- From: sundaram@eng.uiowa.edu (Subbiah Sundaram)
- Subject: Bus arbitrator and lock implementation
- Message-ID: <1992Dec28.160326.27290@hubcap.clemson.edu>
- Apparently-To: comp-parallel@uunet.uu.net
- Sender: sundaram%sabotage@uunet.UU.NET (Subbiah Sundaram)
- Nntp-Posting-Host: sabotage.eng.uiowa.edu
- Organization: Department of Elect. and Comp. Engr., University of Iowa, USA.
- Date: Thu, 24 Dec 1992 16:53:48 GMT
- Approved: parallel@hubcap.clemson.edu
- Lines: 12
-
- I would like to know the way locks are implemented in systems
- like the Encore. I want the hardware details and the way it works.
- It would be nice if someone could point out to me a good reference
- material on this topic. I would also like to know more about
- bus arbitrator design. (In particular I would like to know about
- the bus arbitrator implementations on shared memory parallel
- machines.(Books, papers, articles, etc.))
-
- Thanks,
- Subbiah.
-
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-