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- Path: sparky!uunet!spool.mu.edu!wupost!cs.utexas.edu!rutgers!uwvax!uchinews!machine!ddsw1!gagme!drktowr!magus
- From: magus@drktowr.chi.il.us (Louis Giliberto)
- Newsgroups: comp.os.coherent
- Subject: Re: Questions regarding swapping and memory
- Message-ID: <9212234989@drktowr.chi.il.us>
- Date: 24 Dec 92 12:39:54 GMT
- References: <921217914@umunk.GUN.de>
- Organization: DarkTower Software
- Lines: 32
- X-Newsreader: TIN [version 1.1 PL6]
-
- Udo Munk (udo@umunk.GUN.de) wrote:
- : COHERENT 4.0 uses a flat 32 bit memory model, there is nothing
- : like extended/expanded memory. You've linear access to the whole
- : memory available in your system.
-
- Er, just out of curiosity, do they pull the old "1 CS 1 DS make it look
- like a PDP" trick? The the virtual mem will be page swapped instead
- of segment swapped I guess.
- :
- : The limitation is that COHERENT supports a maximum of 16 MB memory
- : yet, because of the DMA controllers with only 24 bit addresses.
- : This is for ISA bus systems, maybe later it supports more memory
- : with EISA bus systems.
-
- Maybe I'm ignorant, but couldn't this be doubled almost instantly by
- putting the text segment in higher memory where the DMA doesn't need
- access and the data seg in lower where it could reach it? For internal
- kernel buffers you could just DMA to low physical, and page swap it to
- where you need it. After all, the OS has control over the descriptors
- and could change the protection ring as needed.
-
- I'm writing an OS for class, and my head is swimming with Intel "logic"
- right now. Ignore me if I don't make sense. If I do, let me know I'm
- on the right track.
-
- -Louis
- --
- ---------------------------------------------------------
- Louis J. Giliberto, Jr. ! magus@drktowr.chi.il.us
- -sysadmin drktowr ! lgilibe@orion.it.luc.edu
- Chicago, IL USA !
- ---------------------------------------------------------
-