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- Newsgroups: comp.arch
- Path: sparky!uunet!cs.utexas.edu!torn!nott!bnrgate!bmerh85!bcarh2d8!schow
- From: schow@bcarh2d8.bnr.ca (Stanley T.H. Chow)
- Subject: Re: DEC Alpha architecture issues
- Message-ID: <1992Nov23.161111.13930@bmerh85.bnr.ca>
- Sender: news@bmerh85.bnr.ca (Usenet News)
- Organization: Bell Northern Research Ltd, Ottawa
- References: <1992Nov20.064529.20293@nntpd.lkg.dec.com> <1992Nov22.043852.764@megadata.mega.oz.au> <By4pEI.8r5.2@cs.cmu.edu>
- Date: Mon, 23 Nov 92 16:11:11 GMT
- Lines: 32
-
- In article <By4pEI.8r5.2@cs.cmu.edu> lindsay+@cs.cmu.edu (Donald Lindsay) writes:
- >andrew@megadata.mega.oz.au (Andrew McRae) writes:
- >>If it looks like microcode, smells like microcode ... Why call it PALcode?
- >
- >Because it doesn't even vaguely resemble microcode.
- >
- >- PALcode is fetched from the I-cache, not from ROM.
- >- PALcode is decoded by the normal decoder, as opposed to to microcode,
- > which is often a raw mask over a processor's internal control lines.
- >- Microcode is usually in charge of detailed sequencing/timing of e.g.
- > register writebacks. PALcode has no concept of this, except for
- > some implementation-specific rules like "if you set this TLB control
- > register, then the TLB mode will change one clock later".
-
- I know of at least one other Intel processor using micro-code with
- these properties. But then, Intel is a CISC dinosaur doing reactionary
- evil things so it is micro-code; on the other hand, DEC (at least the
- NEW DEC) is a forward looking RISC convert so it's the sexy PAL-code.
-
- Actually, I believe there is a distinction:
-
- The PAL-code is not part of the architecuture.
-
- This means one can have a VMS-Aplha and a Unix-Alpha, etc. and most
- of the system is still portable. Think of PAL-code as a "O/S dependent
- Hardware Abstraction Layer"
-
- --
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