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- From: richard@meiko.com (Richard Cownie)
- Subject: Re: DEC Alpha architecture issues
- Message-ID: <1992Nov18.191730.1044@meiko.com>
- Organization: Meiko Scientific Corp.
- References: <1992Nov18.112407.2518@doug.cae.wisc.edu>
- Date: Wed, 18 Nov 1992 19:17:30 GMT
- Lines: 33
-
- 1. Conditional move instruction is certainly useful. I was involved
- in writing a compiler for the Acorn RISC Machine (ARM), which has
- the unusual feature that all instructions are conditionally
- executed, with a 4-bit field to specify the condition (the most
- common condition being "always"). Any conditional branch over
- a short sequence of instructions was optimised into a short
- sequence of conditionally-executed instructions, which reduced
- the code size and saved flushing the pipeline (there was no smart
- branch prediction or delayed branches).
-
- You can't play quite the same game with just conditional move,
- but things like "if (a < b) a = b;" will work nicely.
- Note that the SPARC Version 9 architecture also includes
- conditional move (together with 64-bit extensions & much else).
-
- 3. I believe 1000 tera-FLOPS = 1 peta-FLOPS ? However, anyone using
- this word before 1997 should be regarded as a hype-merchant.
- Hennessy & Patterson refer to performance on the Perfect benchmarks
- which averages about 1% of peak MFLOPS rates - the real challenge
- for the millenium is to regularly attain > 1GFLOPS performance
- on these dusty decks.
-
- I'm not sure what Cray are up to, but with current technology it's
- more likely to be 300GFLOPS than 300TFLOPS - this would be roughly
- in line with Fujitsu VPP500, TMC CM-5, Meiko CS-2, and could be
- achieved with around 1000 or 2000 Alpha processors, which is a
- manageable number.
-
- --
- Richard Cownie (a.k.a. Tich), Meiko Scientific Corp
- email: richard@meiko.com
- phone: 617-890-7676
- fax: 617-890-5042
-