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- Path: sparky!uunet!vnet.ibm.com
- From: pgainer@vnet.ibm.com (Patrick Gainer)
- Message-ID: <19921118.081808.396@almaden.ibm.com>
- Date: Wed, 18 Nov 92 11:13:42 EST
- Newsgroups: comp.arch
- Subject: Re: IBM Clock-tripled 486
- Organization: IBM - Toronto Lab
- Disclaimer: This posting represents the poster's views, not those of IBM
- News-Software: UReply 3.0
- References: <1e937lINNq50@gap.caltech.edu>
- <Bxw6tK.KMM@pix.com>
- Lines: 22
-
- In <Bxw6tK.KMM@pix.com> Josh Osborne writes:
- >In article <1e937lINNq50@gap.caltech.edu> rrm@ssdp.caltech.edu writes:
- >>So, I understand that IBM announced a clock-tripled (33MHz/99MHz) version
- >>of the 486 (a DX3?) at Comdex. Can anyone in the know at IBM (or Intel)
- >>comment further on this? IBM supposedly designed this chip under their
- >>existing licensing agreement with Intel.
- >
- >The only 486 CPU that I know of that IBM announced is a 486SXL, which is
- >a clock dubled 486 in a 386SX pinout (for the portable market). Even
- >with it's extra large cache it seems a tad bit silly to me (the clock).
-
- I don't speak for IBM but I have seen the announcement letter. IBM did
- announce a 486 running internally at 100 MHz, externally at 33 MHz.
- The chip has a 16 Kbyte internal cache and cache controller. I don't have
- more details. Demos were running at COMDEX.
-
- > stripes@pix.com "Security for Unix is like
- > Josh_Osborne@Real_World,The Multitasking for MS-DOS"
-
- Patrick Gainer
- pgainer@vnet.ibm.com
-
-