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- Xref: sparky comp.arch:10765 comp.lang.misc:3705
- Path: sparky!uunet!mcsun!sun4nl!cwi.nl!dik
- From: dik@cwi.nl (Dik T. Winter)
- Newsgroups: comp.arch,comp.lang.misc
- Subject: Re: how to advocate new software/hardware features (Re: Hardware Support for Numeric Algorithms)
- Message-ID: <7903@charon.cwi.nl>
- Date: 15 Nov 92 23:06:32 GMT
- References: <TMB.92Nov14145619@pollux.idiap.ch> <Bxq7y0.IJ@mentor.cc.purdue.edu> <mwm.2n6z@contessa.palo-alto.ca.us>
- Sender: news@cwi.nl
- Followup-To: comp.arch
- Organization: CWI, Amsterdam
- Lines: 15
-
- In article <mwm.2n6z@contessa.palo-alto.ca.us> mwm@contessa.palo-alto.ca.us (Mike Meyer) writes:
- > In <Bxq7y0.IJ@mentor.cc.purdue.edu>, hrubin@mentor.cc.purdue.edu (Herman Rubin) wrote:
- > > With instruction scheduling, one place for an optimizer would be in the
- > > ASSEMBLER, and even interaction between the programmer and the compiler/
- > > assembler. I do not know of any such.
- >
- > Herman, I've *never* seen you suggest something that hasn't been tried
- > already, in some form or another. This is no exception. It's been
- > tried. It didn't work very well.
- >
- Wrong. The MIPS assembler performs some optimizations (like delay slot
- filling and instruction scheduling). It works quite well.
- --
- dik t. winter, cwi, kruislaan 413, 1098 sj amsterdam, nederland
- home: bovenover 215, 1025 jn amsterdam, nederland; e-mail: dik@cwi.nl
-