home *** CD-ROM | disk | FTP | other *** search
- /*
- Copyright 2007, Philip S. Considine
- All rights reserved.
-
- Redistribution and use in source and binary forms, with or without modification, are permitted
- provided that the following conditions are met:
-
- Redistributions of source code must retain the above copyright notice, this list of conditions
- and the following disclaimer.
-
- Redistributions in binary form must reproduce the above copyright notice, this list of conditions
- and the following disclaimer in the documentation and/or other materials provided with the distribution.
-
- The name of Philip S. Considine may not be used to endorse or promote products derived from this
- software without specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
- IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
- FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
- BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
- /////////////////////////////////////////////////////////////////////////////
- desc:Stereo Phase Inverter with selectable I/O
-
- /////////////////////////////////////////////////////////////////////////////
- slider1:0<0,3,1{1+2,3+4,5+6,7+8}>Input
- slider2:0<0,3,1{Normal Phase,Invert Left,Invert Right,Invert Both}>Phase Mode
- slider3:0<0,3,1{1+2,3+4,5+6,7+8}>Output
-
- /////////////////////////////////////////////////////////////////////////////
- @slider
- modL = slider2 & 1 ? -1 : 1;
- modR = slider2 & 2 ? -1 : 1;
-
- /////////////////////////////////////////////////////////////////////////////
- @sample
- //Do input
- slider1 == 0 ?
- (
- inL = spl0;
- inR = spl1;
- )
- :
- slider1 == 1 ?
- (
- inL = spl2;
- inR = spl3;
- )
- :
- slider1 == 2 ?
- (
- inL = spl4;
- inR = spl5;
- )
- :
- slider1 == 3 ?
- (
- inL = spl6;
- inR = spl7;
- );
-
- //Do phase
- inL *= modL ;
- inR *= modR ;
-
- //Do output
- slider3 == 0 ?
- (
- spl0 = inL;
- spl1 = inR;
- )
- :
- slider3 == 1 ?
- (
- spl2 = inL;
- spl3 = inR;
- )
- :
- slider3 == 2 ?
- (
- spl4 = inL;
- spl5 = inR;
- )
- :
- slider3 == 3 ?
- (
- spl6 = inL;
- spl7 = inR;
- );
-
-
-
-
-
-