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PC/CD Gamer UK 40
/
PCGAMER40.bin
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drivers
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diamond
/
stealthv
/
stl00021.da_
/
stl00021.da
Wrap
Text File
|
1996-05-28
|
69KB
|
1,983 lines
#
# $Id: stl00021.da@ 2.10 1996/03/19 14:16:38 shirleyh Stable $
#
# Copyright (C) 1995, Diamond Multimedia Systems.
#
# File: stl00021.dat
#
# Purpose: This file contains the board and mode information for a
# Stealth 64 Video DRAM : S3 868 WITH SDAC, 2MB.
#
[Objects]
Draweng32=s3x6832.drw
Dac=s3sdac.dac
PixClk=s3sdac.clk
Draweng=s3x68.drw
[BoardInfo]
bViewports=1
bNewMMIO=1
SwapVLA30A25=NO
ValidateBAR=YES
[Desktops]
1280,1024,8
1152,864,16
1152,864,8
1024,768,16
1024,768,8
800,600,32
800,600,16
800,600,8
640,480,32
640,480,16
640,480,8
[Viewports]
1280,1024,8,80,75
1280,1024,8,78,72
1280,1024,8,65,60
1152,864,16,72,75
1152,864,16,65,70
1152,864,16,56,60
1152,864,8,72,75
1152,864,8,65,70
1152,864,8,56,60
1024,768,16,64,80
1024,768,16,60,75
1024,768,16,58,72
1024,768,16,57,70
1024,768,16,48,60
1024,768,8,82,100
1024,768,8,64,80
1024,768,8,60,75
1024,768,8,58,72
1024,768,8,57,70
1024,768,8,48,60
800,600,32,56,90
800,600,32,47,75
800,600,32,49,72
800,600,32,38,60
800,600,32,35,56
800,600,16,64,100
800,600,16,56,90
800,600,16,47,75
800,600,16,49,72
800,600,16,38,60
800,600,16,35,56
800,600,8,76,120
800,600,8,64,100
800,600,8,56,90
800,600,8,47,75
800,600,8,49,72
800,600,8,38,60
800,600,8,35,56
640,480,32,52,100
640,480,32,48,90
640,480,32,38,75
640,480,32,38,72
640,480,32,32,60
640,480,16,64,120
640,480,16,56,100
640,480,16,48,90
640,480,16,38,75
640,480,16,38,72
640,480,16,32,60
640,480,8,64,120
640,480,8,56,100
640,480,8,48,90
640,480,8,38,75
640,480,8,38,72
640,480,8,32,60
[TextMode]
CRT, RUN, EXTENDED_BIOS_FLAGS_2, 1
SHELL, I10, 0x0003, 0x0000
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
[GraphicsEnable]
CRT, RMW, LAW_CONTROL, 0xEC, 0x13
CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x18
[GraphicsDisable]
CRT, RMW, LAW_CONTROL, 0xEC, 0x00
CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x00
[1280,1024,8]
CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
CRT,RUN,EXT_MODE,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_1,0xc0
CRT,RUN,MEM_CONFIG,0x89
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
[1152,864,16]
CRT,RUN,LOGICAL_LINE_LENGTH,0x20
CRT,RUN,EXT_MODE,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
CRT,RUN,EXT_SYSTEM_CONTROL_1,0x11
CRT,RUN,MEM_CONFIG,0x89
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
[1152,864,8]
CRT,RUN,LOGICAL_LINE_LENGTH,0x90
CRT,RUN,EXT_MODE,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_1,0x01
CRT,RUN,MEM_CONFIG,0x89
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
[1024,768,16]
CRT,RUN,LOGICAL_LINE_LENGTH,0x00
CRT,RUN,EXT_MODE,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
CRT,RUN,MEM_CONFIG,0x89
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
[1024,768,8]
CRT,RUN,LOGICAL_LINE_LENGTH,0x80
CRT,RUN,EXT_MODE,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
CRT,RUN,MEM_CONFIG,0x89
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
[800,600,32]
CRT,RUN,LOGICAL_LINE_LENGTH,0x90
CRT,RUN,EXT_MODE,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
CRT,RUN,EXT_SYSTEM_CONTROL_1,0xb0
CRT,RUN,MEM_CONFIG,0x89
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
[800,600,16]
CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
CRT,RUN,EXT_MODE,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_1,0x90
CRT,RUN,MEM_CONFIG,0x89
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
[800,600,8]
CRT,RUN,LOGICAL_LINE_LENGTH,0x64
CRT,RUN,EXT_MODE,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_1,0x80
CRT,RUN,MEM_CONFIG,0x89
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
[640,480,32]
CRT,RUN,LOGICAL_LINE_LENGTH,0x40
CRT,RUN,EXT_MODE,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
CRT,RUN,EXT_SYSTEM_CONTROL_1,0x70
CRT,RUN,MEM_CONFIG,0x89
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
[640,480,16]
CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
CRT,RUN,EXT_MODE,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_1,0x50
CRT,RUN,MEM_CONFIG,0x89
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
[640,480,8]
CRT,RUN,LOGICAL_LINE_LENGTH,0x50
CRT,RUN,EXT_MODE,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
CRT,RUN,EXT_SYSTEM_CONTROL_1,0x40
CRT,RUN,MEM_CONFIG,0x88
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
[1280,1024,8,80,75]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xd0,0x9f,0xa0,0x93,0xa5,0x10,0x26,0x52,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x03,0x03,0xff
CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x20,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xc2,0x60,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xa8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x55
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0xa0,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x10,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x24
DIR,RUN,DACRS01_PORT,0x20
DIR,RUN,DACRS10_PORT,0x10
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[1280,1024,8,78,72]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xcd,0x9f,0xa0,0x90,0xa8,0x19,0x27,0x52,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x08,0x0c,0xff
CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x25,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xc1,0x60,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xe0,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x55
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0xa0,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x10,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x22
DIR,RUN,DACRS01_PORT,0x20
DIR,RUN,DACRS10_PORT,0x10
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[1280,1024,8,65,60]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xcf,0x9f,0xa0,0x92,0xa8,0x19,0x35,0x52,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x31,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xc4,0x60,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x55
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0xa0,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x10,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x79
DIR,RUN,DACRS01_PORT,0x26
DIR,RUN,DACRS10_PORT,0x10
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[1152,864,16,72,75]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x72,0x1f,0x20,0x95,0x25,0x9f,0xb8,0xff,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x79,0x10,0x5f
CRT,RUN,UNDERLINE_LOCATION,0x60,0x6b,0xa3,0xeb,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x6a,0x9f,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x48,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x57
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x21,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x2b
DIR,RUN,DACRS01_PORT,0x21
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[1152,864,16,65,70]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x6a,0x1f,0x20,0x8d,0x25,0x9f,0x8b,0xff,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x6d,0x10,0x5f
CRT,RUN,UNDERLINE_LOCATION,0x60,0x6b,0x78,0xeb,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x60,0x9f,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x70,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x57
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x21,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x4d
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[1152,864,16,56,60]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x6b,0x1f,0x20,0x8e,0x28,0x86,0xae,0xff,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x7b,0x10,0x5f
CRT,RUN,UNDERLINE_LOCATION,0x60,0x6b,0x99,0xeb,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x65,0x9f,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x80,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x57
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x21,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x44
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[1152,864,8,72,75]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xb6,0x8f,0x90,0x99,0x92,0x9e,0xba,0xff,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x74,0x10,0x5f
CRT,RUN,UNDERLINE_LOCATION,0x60,0x6b,0xa5,0xeb,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x9e,0x9f,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x80,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x90,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x2b
DIR,RUN,DACRS01_PORT,0x21
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[1152,864,8,65,70]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xb2,0x8f,0x90,0x95,0x92,0x9e,0x94,0xff,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x6c,0x10,0x5f
CRT,RUN,UNDERLINE_LOCATION,0x60,0x6b,0x81,0xeb,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x9e,0x9f,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xc8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x90,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x4d
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[1152,864,8,56,60]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xb3,0x8f,0x90,0x96,0x97,0x80,0xae,0xff,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x7f,0x10,0x5f
CRT,RUN,UNDERLINE_LOCATION,0x60,0x6b,0x9b,0xeb,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xb1,0x9f,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xd8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x90,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x44
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[1024,768,16,64,80]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x48,0xff,0x00,0x8b,0x09,0x02,0x24,0xf5,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x42,0x7f,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x80,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x55
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x01,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x46
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[1024,768,16,60,75]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x47,0xff,0x00,0x8a,0x08,0x01,0x1e,0xf5,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x01,0x04,0xff
CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x18,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x41,0x7f,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x98,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x55
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x01,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x6e
DIR,RUN,DACRS01_PORT,0x43
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[1024,768,16,58,72]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x3e,0xff,0x00,0x91,0x0f,0x03,0x26,0xf5,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x22,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x36,0x7f,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xe0,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x55
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x01,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x3d
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[1024,768,16,57,70]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x47,0xff,0x00,0x8a,0x10,0x01,0x26,0xf5,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x41,0x7f,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xc0,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x55
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x01,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x3d
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[1024,768,16,48,60]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x42,0xff,0x00,0x85,0x07,0x1f,0x23,0xf5,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x02,0x07,0xff
CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1d,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x41,0x7f,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x70,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x55
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x01,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x33
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[1024,768,8,82,100]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xa0,0x7f,0x80,0x83,0x83,0x91,0x2b,0xf5,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x27,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x9c,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xa0,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x80,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x2b
DIR,RUN,DACRS01_PORT,0x21
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[1024,768,8,64,80]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xa2,0x7f,0x80,0x85,0x85,0x93,0x21,0xf5,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1b,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x9c,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x80,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x46
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[1024,768,8,60,75]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xa1,0x7f,0x80,0x83,0x84,0x8b,0x20,0xf5,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x01,0x04,0xff
CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x16,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x90,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x80,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x6e
DIR,RUN,DACRS01_PORT,0x43
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[1024,768,8,58,72]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x9c,0x7f,0x80,0x9f,0x87,0x19,0x28,0xf5,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x04,0x08,0xff
CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x20,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x94,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x80,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x3d
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[1024,768,8,57,70]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xa1,0x7f,0x80,0x84,0x88,0x95,0x24,0xf5,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x22,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x9d,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x80,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x3d
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[1024,768,8,48,60]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x9f,0x7f,0x80,0x82,0x86,0x94,0x21,0xf5,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x02,0x07,0xff
CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1d,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x9d,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x80,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x33
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[800,600,32,56,90]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xe4,0x8f,0x90,0x84,0x98,0x84,0x82,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x64,0x0b,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x77,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xde,0x32,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x18,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x7f
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x92,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x70,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x2e
DIR,RUN,DACRS01_PORT,0x21
DIR,RUN,DACRS10_PORT,0x70
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xF3, 0x04
PSD,RUN,HORZ_CUR_POS_FACTOR,0x00010002
[800,600,32,47,75]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xf2,0x8f,0x90,0x92,0xa0,0x84,0x6e,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x5a,0x0b,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x61,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xea,0x32,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x68,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x7f
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x92,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x70,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x4d
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x70
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xF3, 0x04
PSD,RUN,HORZ_CUR_POS_FACTOR,0x00010002
[800,600,32,49,72]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xeb,0x8f,0x90,0x8b,0xa1,0x9d,0x9b,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x74,0x03,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x94,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xde,0x32,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x60,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x7f
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x92,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x70,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x4e
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x70
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xF3, 0x04
PSD,RUN,HORZ_CUR_POS_FACTOR,0x00010002
[800,600,32,38,60]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xf6,0x8f,0x90,0x96,0xa4,0x8d,0x74,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x70,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xee,0x32,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xc0,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x7f
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x92,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x70,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x54
DIR,RUN,DACRS01_PORT,0x42
DIR,RUN,DACRS10_PORT,0x70
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xF3, 0x04
PSD,RUN,HORZ_CUR_POS_FACTOR,0x00010002
[800,600,32,35,56]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xf7,0x8f,0x90,0x97,0x9d,0x87,0x74,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xf2,0x32,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xa8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x7f
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x92,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x70,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x77
DIR,RUN,DACRS01_PORT,0x44
DIR,RUN,DACRS10_PORT,0x70
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xF3, 0x04
PSD,RUN,HORZ_CUR_POS_FACTOR,0x00010002
[800,600,16,64,100]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xf1,0xc7,0xc8,0x94,0xcd,0x83,0x80,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x5e,0x08,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x7b,0xa3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xf0,0x00,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x10,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0xc9,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x33
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[800,600,16,56,90]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xfb,0xc7,0xc8,0x9e,0xd0,0x82,0x72,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x5a,0x0b,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x6d,0xa3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xf0,0x00,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x60,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0xc9,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x2f
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[800,600,16,47,75]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x06,0xc7,0xc8,0x99,0xd7,0x83,0x6f,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x68,0xa3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xf0,0x00,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xa0,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x01
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0xc9,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x28
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[800,600,16,49,72]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xff,0xc7,0xc8,0x82,0xd6,0x14,0x98,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x7d,0x03,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x96,0xa3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xf0,0x00,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xa0,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0xc9,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x28
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[800,600,16,38,60]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x03,0xc7,0xc8,0x86,0xd5,0x12,0x75,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x69,0xa3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xf0,0x00,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xe8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x01
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0xc9,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x6e
DIR,RUN,DACRS01_PORT,0x63
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[800,600,16,35,56]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xf9,0xc7,0xc8,0x9c,0xcb,0x8f,0x78,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x68,0xa3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xf0,0x00,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xd8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0xc9,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x77
DIR,RUN,DACRS01_PORT,0x64
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[800,600,8,76,120]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x7a,0x63,0x64,0x9d,0x6c,0x91,0x77,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x5c,0x72,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x74,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x64,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x54
DIR,RUN,DACRS01_PORT,0x42
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[800,600,8,64,100]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x76,0x63,0x64,0x99,0x65,0x8a,0x81,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x5c,0x78,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x75,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x64,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x33
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[800,600,8,56,90]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x7b,0x63,0x64,0x9e,0x6c,0x94,0x72,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x5d,0x02,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x5c,0x6b,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x75,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x64,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x2f
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[800,600,8,47,75]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x81,0x63,0x64,0x84,0x6c,0x11,0x6d,0xe0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x5d,0x0b,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x5c,0x68,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x78,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x64,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x28
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[800,600,8,49,72]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x7d,0x63,0x64,0x80,0x6c,0x1b,0x98,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x5c,0x96,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x78,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x64,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x28
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[800,600,8,38,60]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x7f,0x63,0x64,0x81,0x67,0x12,0x76,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x5c,0x0e,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x5c,0x71,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x78,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x64,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x6e
DIR,RUN,DACRS01_PORT,0x63
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[800,600,8,35,56]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x7a,0x63,0x64,0x9c,0x67,0x92,0x78,0xf0,0x00,0x60
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0x5c,0x0e,0x57
CRT,RUN,UNDERLINE_LOCATION,0x00,0x5c,0x73,0xe3,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x70,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xd8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x64,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x77
DIR,RUN,DACRS01_PORT,0x64
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[640,480,32,52,100]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x8c,0x3f,0x40,0x93,0x4a,0x15,0x06,0x3e,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xea,0x0c,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xfd,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x80,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x88,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x57
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x42,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x70,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x44
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x70
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xF3, 0x04
PSD,RUN,HORZ_CUR_POS_FACTOR,0x00010002
[640,480,32,48,90]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x9b,0x3f,0x40,0x9e,0x48,0x15,0x15,0x3e,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xf7,0x0c,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0c,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x93,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xa0,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x57
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x42,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x70,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x6e
DIR,RUN,DACRS01_PORT,0x43
DIR,RUN,DACRS10_PORT,0x70
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xF3, 0x04
PSD,RUN,HORZ_CUR_POS_FACTOR,0x00010002
[640,480,32,38,75]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x9b,0x3f,0x40,0x9e,0x56,0x1e,0xf6,0x1f,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xee,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x93,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x57
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x42,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x70,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x56
DIR,RUN,DACRS01_PORT,0x43
DIR,RUN,DACRS10_PORT,0x70
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xF3, 0x04
PSD,RUN,HORZ_CUR_POS_FACTOR,0x00010002
[640,480,32,38,72]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x9b,0x3f,0x40,0x9e,0x48,0x1e,0x06,0x3e,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x02,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x93,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x57
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x42,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x70,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x56
DIR,RUN,DACRS01_PORT,0x43
DIR,RUN,DACRS10_PORT,0x70
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xF3, 0x04
PSD,RUN,HORZ_CUR_POS_FACTOR,0x00010002
[640,480,32,32,60]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x89,0x3f,0x40,0x89,0x49,0x16,0x0b,0x3e,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xea,0x0c,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x03,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x83,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xd8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x7f
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x81,0x42,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x70,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x28
DIR,RUN,DACRS01_PORT,0x41
DIR,RUN,DACRS10_PORT,0x70
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xF3, 0x04
PSD,RUN,HORZ_CUR_POS_FACTOR,0x00010002
[640,480,16,64,120]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xc9,0x9f,0xa0,0x8c,0xa4,0x10,0x17,0x3e,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xe8,0x03,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x11,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xbc,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xa0,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0xa1,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x66
DIR,RUN,DACRS01_PORT,0x45
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[640,480,16,56,100]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xc6,0x9f,0xa0,0x89,0xa0,0x0c,0x33,0x3e,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xf9,0x03,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x2f,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xbc,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xd0,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0xa1,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x4b
DIR,RUN,DACRS01_PORT,0x61
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[640,480,16,48,90]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xcb,0x9f,0xa0,0x8e,0xaa,0x12,0x15,0x3e,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xf6,0x03,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0d,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xbc,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xe0,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0xa1,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x6e
DIR,RUN,DACRS01_PORT,0x63
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[640,480,16,38,75]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xcb,0x9f,0xa0,0x8e,0xad,0x12,0xf6,0x1f,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xe8,0x03,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf2,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xbc,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0xa1,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x56
DIR,RUN,DACRS01_PORT,0x63
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[640,480,16,38,72]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xcb,0x9f,0xa0,0x8e,0xa7,0x11,0x06,0x3e,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xe9,0x0c,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x04,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xbc,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0xa1,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x56
DIR,RUN,DACRS01_PORT,0x63
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
[640,480,16,32,60]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0xc3,0x9f,0xa0,0x85,0xa5,0x1c,0x0c,0x3e,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xea,0x0c,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x03,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0xbc,0x40,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xd8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0xa1,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x50,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x7d
DIR,RUN,DACRS01_PORT,0x67
DIR,RUN,DACRS10_PORT,0x50
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0001
[640,480,8,64,120]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x62,0x4f,0x50,0x83,0x52,0x9d,0x17,0x3e,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xf4,0x01,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x11,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x5a,0x91,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x50,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x66
DIR,RUN,DACRS01_PORT,0x45
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[640,480,8,56,100]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x61,0x4f,0x50,0x83,0x50,0x97,0x30,0x3e,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xfa,0x01,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x2c,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x58,0x91,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x50,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x4b
DIR,RUN,DACRS01_PORT,0x61
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[640,480,8,48,90]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x63,0x4f,0x50,0x85,0x54,0x9d,0x15,0x3e,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x11,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x5a,0x91,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x50,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x6e
DIR,RUN,DACRS01_PORT,0x63
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[640,480,8,38,75]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x63,0x4f,0x50,0x85,0x57,0x9a,0xf4,0x1f,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xe8,0x03,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf0,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x5a,0x91,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x50,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x56
DIR,RUN,DACRS01_PORT,0x63
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[640,480,8,38,72]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x63,0x4f,0x50,0x86,0x54,0x99,0x06,0x3e,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xe9,0x0c,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x04,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x5a,0x91,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xf8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x50,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x56
DIR,RUN,DACRS01_PORT,0x63
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
[640,480,8,32,60]
CRT, RUN, REG_LOCK_1, 0x48
CRT, RUN, REG_LOCK_2, 0xA0
CRT,RMW,VERT_RETRACE_END,0x7f,0x00
CRT,RMW,CRT_REG_LOCK,0xcf,0x00
CRT,RUN,REG_LOCK_1,0x48,0xa0
CRT,RUN,HORZ_TOTAL,0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,0x00,0x40
CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
CRT,RUN,VERT_RETRACE_START,0xea,0x0c,0xdf
CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x04,0xab,0xff
CRT,RUN,BACKWARD_COMP_1,0x00,0x80,0x10,0x00
CRT,RUN,MISC_1,0x15,0x5a,0x91,0xd1
CRT,RUN,MODE_CONTROL,0x02
CRT,RUN,EXT_MEM_CONTROL_1,0x18,0xd8,0x00,0x00,0x00
CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
CRT,RUN,EXT_HORZ_OVERFLOW,0x00
CRT,RUN,EXT_VERT_OVERFLOW,0x40
CRT,RUN,EXT_MEM_CONTROL_3,0xff,0x80,0x50,0x00
CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x00,0xfc,0x00,0x00
CRT,RUN,EXT_MISC_CONTROL_3,0x00
CRT,RMW,VERT_RETRACE_END,0x7f,0x80
ENG,RUN,ADV_FUNCTION_CONTROL,0x01
DIR,RUN,MISC_WRITE,0x2f
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x01
DIR,RUN,DACRS00_PORT,0x02
DIR,RUN,DACRS01_PORT,0x7d
DIR,RUN,DACRS01_PORT,0x67
DIR,RUN,DACRS10_PORT,0x00
CRT,RMW,EXT_RAMDAC_CONTROL,0xfe,0x00
CRT,RMW,CURSOR_MODE,0xFB, 0x00
PSD,RUN,CURSOR_PSEUDO_MODE,0x0000
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