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Text File  |  1996-05-28  |  115KB  |  3,347 lines
  1. #
  2. #    $Id: stl00016.da@ 2.11 1996/05/14 01:54:18 JIMK Stable $
  3. #
  4. #    Copyright (C) 1995, Diamond Multimedia Systems.
  5. #
  6. #    File:        stl00016.dat
  7. #
  8. #    Purpose:    This file contains the board and mode information for a
  9. #                Stealth 64 Video VRAM: S3 968, 2MB, IBM 526 175Mhz DAC.
  10. #
  11.  
  12. [Objects]
  13. Draweng32=s3x6832.drw
  14. Dac=ibm525.dac
  15. Cursor=ibm525.cur
  16. PixClk=ibm525.clk
  17. Draweng=s3x68.drw
  18.  
  19. [BoardInfo]
  20. wMinimumFormatBltWidth16bpp=8
  21. wMinimumFormatBltWidth32bpp=8
  22. bPixelFormatter=1
  23. bViewports=1
  24. bNewMMIO=1
  25. bTwoPtLine=1
  26. ValidateBAR=YES
  27. SwapVLA30A25=YES
  28.  
  29. [Desktops]
  30. 2048,768,8
  31. 1600,1200,8
  32. 1280,1024,8
  33. 1152,864,16
  34. 1152,864,8
  35. 1024,1536,8
  36. 1024,768,16
  37. 1024,768,8
  38. 800,600,32
  39. 800,600,24
  40. 800,600,16
  41. 800,600,8
  42. 640,480,32
  43. 640,480,24
  44. 640,480,16
  45. 640,480,8
  46.  
  47. [Viewports]
  48. 1600,1200,8,82,66
  49. 1600,1200,8,75,60
  50. 1280,1024,8,95,90
  51. 1280,1024,8,79,75
  52. 1280,1024,8,76,72
  53. 1280,1024,8,74,70
  54. 1280,1024,8,64,60
  55. 1152,864,16,82,90
  56. 1152,864,16,71,75
  57. 1152,864,16,64,70
  58. 1152,864,16,56,60
  59. 1152,864,8,82,90
  60. 1152,864,8,71,75
  61. 1152,864,8,64,70
  62. 1152,864,8,56,60
  63. 1024,768,16,96,120
  64. 1024,768,16,81,100
  65. 1024,768,16,64,80
  66. 1024,768,16,60,75
  67. 1024,768,16,58,72
  68. 1024,768,16,56,70
  69. 1024,768,16,48,60
  70. 1024,768,8,96,120
  71. 1024,768,8,81,100
  72. 1024,768,8,64,80
  73. 1024,768,8,60,75
  74. 1024,768,8,58,72
  75. 1024,768,8,56,70
  76. 1024,768,8,48,60
  77. 800,600,32,75,120
  78. 800,600,32,64,100
  79. 800,600,32,56,90
  80. 800,600,32,46,75
  81. 800,600,32,48,72
  82. 800,600,32,37,60
  83. 800,600,32,35,56
  84. 800,600,24,75,120
  85. 800,600,24,64,100
  86. 800,600,24,56,90
  87. 800,600,24,46,75
  88. 800,600,24,48,72
  89. 800,600,24,37,60
  90. 800,600,24,35,56
  91. 800,600,16,75,120
  92. 800,600,16,64,100
  93. 800,600,16,56,90
  94. 800,600,16,46,75
  95. 800,600,16,48,72
  96. 800,600,16,37,60
  97. 800,600,16,35,56
  98. 800,600,8,75,120
  99. 800,600,8,64,100
  100. 800,600,8,56,90
  101. 800,600,8,46,75
  102. 800,600,8,48,72
  103. 800,600,8,37,60
  104. 800,600,8,35,56
  105. 640,480,32,64,120
  106. 640,480,32,52,100
  107. 640,480,32,48,90
  108. 640,480,32,37,75
  109. 640,480,32,37,72
  110. 640,480,32,31,60
  111. 640,480,24,64,120
  112. 640,480,24,52,100
  113. 640,480,24,48,90
  114. 640,480,24,37,75
  115. 640,480,24,37,72
  116. 640,480,24,31,60
  117. 640,480,16,64,120
  118. 640,480,16,52,100
  119. 640,480,16,48,90
  120. 640,480,16,37,75
  121. 640,480,16,37,72
  122. 640,480,16,31,60
  123. 640,480,8,64,120
  124. 640,480,8,52,100
  125. 640,480,8,48,90
  126. 640,480,8,37,75
  127. 640,480,8,37,72
  128. 640,480,8,31,60
  129.  
  130. [TextMode]
  131. CRT, RUN, EXTENDED_BIOS_FLAGS_2, 1
  132. SHELL, I10, 0x0003,  0x0000
  133. CRT, RUN, REG_LOCK_1, 0x48
  134. CRT, RUN, REG_LOCK_2, 0xA0
  135.  
  136. [GraphicsEnable]
  137. CRT, RMW, LAW_CONTROL, 0xEC, 0x13
  138. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x18
  139.  
  140. [GraphicsDisable]
  141. CRT, RMW, LAW_CONTROL, 0xEC, 0x00
  142. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x00
  143.  
  144. [2048,768,8]
  145. # Setting Line Pitch
  146. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  147. CRT,RUN,EXT_MODE,0x00
  148. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  149. # Setting Engine Pitch
  150. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  151. CRT,RUN,MEM_CONFIG,0x8f
  152. # Setting Basic Mode Registers.The registers
  153. # below are neither Desktop or Viewport Regs
  154. # Unlock Sequencer
  155. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  156. # Dump Sequencer Registers
  157. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  158. # Dump Graphics Controller Registers
  159. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  160. # Dump Attribute Controller Registers
  161. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  162. # Lock Sequencer
  163. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  164. DAC_IDR, RUN, DAC_OPERATION, 0x02
  165. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  166. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  167. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  168. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  169. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  170. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  171. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  172. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  173. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  174.  
  175. [1024,1536,8]
  176. # Setting Line Pitch
  177. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  178. CRT,RUN,EXT_MODE,0x00
  179. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  180. # Setting Engine Pitch
  181. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  182. CRT,RUN,MEM_CONFIG,0x09
  183. # Setting Basic Mode Registers.The registers
  184. # below are neither Desktop or Viewport Regs
  185. # Unlock Sequencer
  186. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  187. # Dump Sequencer Registers
  188. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  189. # Dump Graphics Controller Registers
  190. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  191. # Dump Attribute Controller Registers
  192. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  193. # Lock Sequencer
  194. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  195. DAC_IDR, RUN, DAC_OPERATION, 0x02
  196. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  197. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  198. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  199. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  200. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  201. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  202. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  203. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  204. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  205.  
  206. [1600,1200,8]
  207. # Setting Line Pitch
  208. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  209. CRT,RUN,EXT_MODE,0x00
  210. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  211. # Setting Engine Pitch
  212. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x81
  213. CRT,RUN,MEM_CONFIG,0x8b
  214. # Setting Basic Mode Registers.The registers
  215. # below are neither Desktop or Viewport Regs
  216. # Unlock Sequencer
  217. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  218. # Dump Sequencer Registers
  219. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  220. # Dump Graphics Controller Registers
  221. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  222. # Dump Attribute Controller Registers
  223. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  224. # Lock Sequencer
  225. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  226. DAC_IDR, RUN, DAC_OPERATION, 0x02
  227. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  228. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  229. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  230. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  231. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  232. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  233. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  234. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  235. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  236.  
  237. [1280,1024,8]
  238. # Setting Line Pitch
  239. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  240. CRT,RUN,EXT_MODE,0x00
  241. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  242. # Setting Engine Pitch
  243. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xc0
  244. CRT,RUN,MEM_CONFIG,0x0b
  245. # Setting Basic Mode Registers.The registers
  246. # below are neither Desktop or Viewport Regs
  247. # Unlock Sequencer
  248. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  249. # Dump Sequencer Registers
  250. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  251. # Dump Graphics Controller Registers
  252. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  253. # Dump Attribute Controller Registers
  254. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  255. # Lock Sequencer
  256. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  257. DAC_IDR, RUN, DAC_OPERATION, 0x02
  258. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  259. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  260. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  261. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  262. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  263. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  264. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  265. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  266. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  267.  
  268. [1152,864,16]
  269. # Setting Line Pitch
  270. CRT,RUN,LOGICAL_LINE_LENGTH,0x20
  271. CRT,RUN,EXT_MODE,0x00
  272. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  273. # Setting Engine Pitch
  274. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x11
  275. CRT,RUN,MEM_CONFIG,0x89
  276. # Setting Basic Mode Registers.The registers
  277. # below are neither Desktop or Viewport Regs
  278. # Unlock Sequencer
  279. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  280. # Dump Sequencer Registers
  281. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  282. # Dump Graphics Controller Registers
  283. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  284. # Dump Attribute Controller Registers
  285. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  286. # Lock Sequencer
  287. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  288. DAC_IDR, RUN, DAC_OPERATION, 0x02
  289. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  290. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  291. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  292. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  293. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  294. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  295. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  296. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  297. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  298.  
  299. [1152,864,8]
  300. # Setting Line Pitch
  301. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  302. CRT,RUN,EXT_MODE,0x00
  303. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  304. # Setting Engine Pitch
  305. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x01
  306. CRT,RUN,MEM_CONFIG,0x89
  307. # Setting Basic Mode Registers.The registers
  308. # below are neither Desktop or Viewport Regs
  309. # Unlock Sequencer
  310. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  311. # Dump Sequencer Registers
  312. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  313. # Dump Graphics Controller Registers
  314. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  315. # Dump Attribute Controller Registers
  316. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  317. # Lock Sequencer
  318. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  319. DAC_IDR, RUN, DAC_OPERATION, 0x02
  320. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  321. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  322. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  323. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  324. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  325. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  326. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  327. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  328. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  329.  
  330. [1024,768,16]
  331. # Setting Line Pitch
  332. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  333. CRT,RUN,EXT_MODE,0x00
  334. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  335. # Setting Engine Pitch
  336. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  337. CRT,RUN,MEM_CONFIG,0x89
  338. # Setting Basic Mode Registers.The registers
  339. # below are neither Desktop or Viewport Regs
  340. # Unlock Sequencer
  341. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  342. # Dump Sequencer Registers
  343. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  344. # Dump Graphics Controller Registers
  345. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  346. # Dump Attribute Controller Registers
  347. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  348. # Lock Sequencer
  349. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  350. DAC_IDR, RUN, DAC_OPERATION, 0x02
  351. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  352. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  353. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  354. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  355. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  356. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  357. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  358. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  359. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  360.  
  361. [1024,768,8]
  362. # Setting Line Pitch
  363. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  364. CRT,RUN,EXT_MODE,0x00
  365. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  366. # Setting Engine Pitch
  367. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  368. CRT,RUN,MEM_CONFIG,0x09
  369. # Setting Basic Mode Registers.The registers
  370. # below are neither Desktop or Viewport Regs
  371. # Unlock Sequencer
  372. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  373. # Dump Sequencer Registers
  374. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  375. # Dump Graphics Controller Registers
  376. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  377. # Dump Attribute Controller Registers
  378. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  379. # Lock Sequencer
  380. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  381. DAC_IDR, RUN, DAC_OPERATION, 0x02
  382. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  383. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  384. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  385. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  386. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  387. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  388. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  389. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  390. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  391.  
  392. [800,600,32]
  393. # Setting Line Pitch
  394. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  395. CRT,RUN,EXT_MODE,0x00
  396. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  397. # Setting Engine Pitch
  398. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xb0
  399. CRT,RUN,MEM_CONFIG,0x89
  400. # Setting Basic Mode Registers.The registers
  401. # below are neither Desktop or Viewport Regs
  402. # Unlock Sequencer
  403. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  404. # Dump Sequencer Registers
  405. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  406. # Dump Graphics Controller Registers
  407. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  408. # Dump Attribute Controller Registers
  409. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  410. # Lock Sequencer
  411. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  412. DAC_IDR, RUN, DAC_OPERATION, 0x02
  413. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  414. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  415. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  416. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  417. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  418. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  419. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  420. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  421. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  422.  
  423. [800,600,24]
  424. # Setting Line Pitch
  425. CRT,RUN,LOGICAL_LINE_LENGTH,0x2c
  426. CRT,RUN,EXT_MODE,0x00
  427. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  428. # Setting Engine Pitch
  429. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xa0
  430. CRT,RUN,MEM_CONFIG,0x8b
  431. # Setting Basic Mode Registers.The registers
  432. # below are neither Desktop or Viewport Regs
  433. # Unlock Sequencer
  434. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  435. # Dump Sequencer Registers
  436. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  437. # Dump Graphics Controller Registers
  438. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  439. # Dump Attribute Controller Registers
  440. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  441. # Lock Sequencer
  442. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  443. DAC_IDR, RUN, DAC_OPERATION, 0x02
  444. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  445. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  446. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  447. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  448. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  449. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  450. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  451. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  452. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  453.  
  454.  
  455. [800,600,16]
  456. # Setting Line Pitch
  457. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  458. CRT,RUN,EXT_MODE,0x00
  459. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  460. # Setting Engine Pitch
  461. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x90
  462. CRT,RUN,MEM_CONFIG,0x89
  463. # Setting Basic Mode Registers.The registers
  464. # below are neither Desktop or Viewport Regs
  465. # Unlock Sequencer
  466. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  467. # Dump Sequencer Registers
  468. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  469. # Dump Graphics Controller Registers
  470. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  471. # Dump Attribute Controller Registers
  472. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  473. # Lock Sequencer
  474. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  475. DAC_IDR, RUN, DAC_OPERATION, 0x02
  476. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  477. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  478. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  479. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  480. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  481. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  482. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  483. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  484. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  485.  
  486. [800,600,8]
  487. # Setting Line Pitch
  488. CRT,RUN,LOGICAL_LINE_LENGTH,0x64
  489. CRT,RUN,EXT_MODE,0x00
  490. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  491. # Setting Engine Pitch
  492. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x80
  493. CRT,RUN,MEM_CONFIG,0x89
  494. # Setting Basic Mode Registers.The registers
  495. # below are neither Desktop or Viewport Regs
  496. # Unlock Sequencer
  497. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  498. # Dump Sequencer Registers
  499. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  500. # Dump Graphics Controller Registers
  501. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  502. # Dump Attribute Controller Registers
  503. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  504. # Lock Sequencer
  505. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  506. DAC_IDR, RUN, DAC_OPERATION, 0x02
  507. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  508. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  509. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  510. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  511. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  512. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  513. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  514. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  515. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  516.  
  517. [640,480,32]
  518. # Setting Line Pitch
  519. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  520. CRT,RUN,EXT_MODE,0x00
  521. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  522. # Setting Engine Pitch
  523. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x70
  524. CRT,RUN,MEM_CONFIG,0x89
  525. # Setting Basic Mode Registers.The registers
  526. # below are neither Desktop or Viewport Regs
  527. # Unlock Sequencer
  528. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  529. # Dump Sequencer Registers
  530. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  531. # Dump Graphics Controller Registers
  532. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  533. # Dump Attribute Controller Registers
  534. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  535. # Lock Sequencer
  536. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  537. DAC_IDR, RUN, DAC_OPERATION, 0x02
  538. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  539. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  540. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  541. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  542. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  543. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  544. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  545. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  546. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  547.  
  548. [640,480,24]
  549. # Setting Line Pitch
  550. CRT,RUN,LOGICAL_LINE_LENGTH,0xf0
  551. CRT,RUN,EXT_MODE,0x00
  552. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  553. # Setting Engine Pitch
  554. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x60
  555. CRT,RUN,MEM_CONFIG,0x8b
  556. # Setting Basic Mode Registers.The registers
  557. # below are neither Desktop or Viewport Regs
  558. # Unlock Sequencer
  559. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  560. # Dump Sequencer Registers
  561. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  562. # Dump Graphics Controller Registers
  563. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  564. # Dump Attribute Controller Registers
  565. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  566. # Lock Sequencer
  567. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  568. DAC_IDR, RUN, DAC_OPERATION, 0x02
  569. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  570. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  571. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  572. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  573. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  574. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  575. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  576. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  577. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  578.  
  579.  
  580. [640,480,16]
  581. # Setting Line Pitch
  582. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  583. CRT,RUN,EXT_MODE,0x00
  584. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  585. # Setting Engine Pitch
  586. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x50
  587. CRT,RUN,MEM_CONFIG,0x89
  588. # Setting Basic Mode Registers.The registers
  589. # below are neither Desktop or Viewport Regs
  590. # Unlock Sequencer
  591. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  592. # Dump Sequencer Registers
  593. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  594. # Dump Graphics Controller Registers
  595. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  596. # Dump Attribute Controller Registers
  597. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  598. # Lock Sequencer
  599. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  600. DAC_IDR, RUN, DAC_OPERATION, 0x02
  601. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  602. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  603. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  604. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  605. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  606. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  607. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  608. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  609. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  610.  
  611. [640,480,8]
  612. # Setting Line Pitch
  613. CRT,RUN,LOGICAL_LINE_LENGTH,0x50
  614. CRT,RUN,EXT_MODE,0x00
  615. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  616. # Setting Engine Pitch
  617. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x40
  618. CRT,RUN,MEM_CONFIG,0x89
  619. # Setting Basic Mode Registers.The registers
  620. # below are neither Desktop or Viewport Regs
  621. # Unlock Sequencer
  622. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  623. # Dump Sequencer Registers
  624. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  625. # Dump Graphics Controller Registers
  626. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  627. # Dump Attribute Controller Registers
  628. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  629. # Lock Sequencer
  630. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  631. DAC_IDR, RUN, DAC_OPERATION, 0x02
  632. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  633. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  634. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  635. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  636. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  637. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  638. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  639. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  640. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  641.  
  642. [1600,1200,8,82,66]
  643. # Unlock CRTC
  644. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  645. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  646. CRT,RUN,REG_LOCK_1,0x48,0xa5
  647. # Dump CRT Controller Registers
  648. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  649. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  650. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  651. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  652. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  653. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  654. CRT,RUN,MODE_CONTROL,0x02
  655. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  656. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  657. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  658. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  659. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  660. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  661. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  662. # Lock CRTC Reg 11 for compatibility
  663. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  664. # Dump ENG Register
  665. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  666. # Dump MISCOUT Register
  667. DIR,RUN,MISC_WRITE,0xef
  668. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  669. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  670. CLK_IND, RUN, FREQ_2, 0xd3
  671. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  672. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  673. CRT,RUN,LATCH_DATA, 0x08
  674.  
  675. [1600,1200,8,75,60]
  676. # Unlock CRTC
  677. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  678. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  679. CRT,RUN,REG_LOCK_1,0x48,0xa5
  680. # Dump CRT Controller Registers
  681. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  682. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  683. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  684. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  685. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  686. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  687. CRT,RUN,MODE_CONTROL,0x02
  688. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  689. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  690. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  691. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  692. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  693. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  694. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  695. # Lock CRTC Reg 11 for compatibility
  696. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  697. # Dump ENG Register
  698. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  699. # Dump MISCOUT Register
  700. DIR,RUN,MISC_WRITE,0xef
  701. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  702. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  703. CLK_IND, RUN, FREQ_2, 0xcd
  704. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  705. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  706. CRT,RUN,LATCH_DATA, 0x08
  707.  
  708. [1280,1024,8,95,90]
  709. # Unlock CRTC
  710. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  711. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  712. CRT,RUN,REG_LOCK_1,0x48,0xa5
  713. # Dump CRT Controller Registers
  714. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x56,0x9f,0x2a,0x42,0x00,0x40
  715. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  716. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  717. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  718. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  719. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  720. CRT,RUN,MODE_CONTROL,0x02
  721. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  722. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  723. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  724. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  725. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  726. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  727. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  728. # Lock CRTC Reg 11 for compatibility
  729. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  730. # Dump ENG Register
  731. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  732. # Dump MISCOUT Register
  733. DIR,RUN,MISC_WRITE,0xef
  734. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  735. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  736. CLK_IND, RUN, FREQ_2, 0xd0
  737. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  738. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  739. CRT,RUN,LATCH_DATA, 0x08
  740.  
  741.  
  742. [1280,1024,8,79,75]
  743. # Unlock CRTC
  744. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  745. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  746. CRT,RUN,REG_LOCK_1,0x48,0xa5
  747. # Dump CRT Controller Registers
  748. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x54,0x9f,0x2c,0x42,0x00,0x40
  749. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  750. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  751. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  752. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  753. CRT,RUN,MISC_1,0x15,0x5e,0x14,0x11
  754. CRT,RUN,MODE_CONTROL,0x02
  755. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  756. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  757. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  758. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  759. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  760. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  761. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  762. # Lock CRTC Reg 11 for compatibility
  763. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  764. # Dump ENG Register
  765. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  766. # Dump MISCOUT Register
  767. DIR,RUN,MISC_WRITE,0xef
  768. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  769. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  770. CLK_IND, RUN, FREQ_2, 0xc1
  771. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  772. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  773. CRT,RUN,LATCH_DATA, 0x08
  774.  
  775. [1280,1024,8,76,72]
  776. # Unlock CRTC
  777. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  778. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  779. CRT,RUN,REG_LOCK_1,0x48,0xa5
  780. # Dump CRT Controller Registers
  781. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x57,0x9c,0x27,0x42,0x00,0x40
  782. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  783. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  784. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  785. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  786. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  787. CRT,RUN,MODE_CONTROL,0x02
  788. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  789. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  790. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  791. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  792. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  793. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  794. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  795. # Lock CRTC Reg 11 for compatibility
  796. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  797. # Dump ENG Register
  798. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  799. # Dump MISCOUT Register
  800. DIR,RUN,MISC_WRITE,0xef
  801. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  802. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  803. CLK_IND, RUN, FREQ_2, 0xc1
  804. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  805. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  806. CRT,RUN,LATCH_DATA, 0x08
  807.  
  808. [1280,1024,8,74,70]
  809. # Unlock CRTC
  810. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  811. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  812. CRT,RUN,REG_LOCK_1,0x48,0xa5
  813. # Dump CRT Controller Registers
  814. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x5a,0x82,0x28,0x52,0x00,0x40
  815. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  816. CRT,RUN,VERT_RETRACE_START,0x00,0x05,0xff
  817. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  818. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  819. CRT,RUN,MISC_1,0x15,0x60,0x14,0x11
  820. CRT,RUN,MODE_CONTROL,0x02
  821. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  822. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  823. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  824. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  825. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  826. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  827. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  828. # Lock CRTC Reg 11 for compatibility
  829. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  830. # Dump ENG Register
  831. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  832. # Dump MISCOUT Register
  833. DIR,RUN,MISC_WRITE,0xef
  834. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  835. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  836. CLK_IND, RUN, FREQ_2, 0xba
  837. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  838. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  839. CRT,RUN,LATCH_DATA, 0x08
  840.  
  841. [1280,1024,8,64,60]
  842. # Unlock CRTC
  843. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  844. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  845. CRT,RUN,REG_LOCK_1,0x48,0xa5
  846. # Dump CRT Controller Registers
  847. ##CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x53,0x98,0x33,0x42,0x00,0x40
  848. CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x57,0x9c,0x33,0x42,0x00,0x40
  849. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  850. ##CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  851. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  852. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  853. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  854. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  855. ##CRT,RUN,MISC_1,0x15,0x5f,0x14,0x11
  856. CRT,RUN,MISC_1,0x15,0x60,0x14,0x11
  857. CRT,RUN,MODE_CONTROL,0x02
  858. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  859. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  860. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  861. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  862. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  863. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  864. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  865. # Lock CRTC Reg 11 for compatibility
  866. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  867. # Dump ENG Register
  868. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  869. # Dump MISCOUT Register
  870. DIR,RUN,MISC_WRITE,0xef
  871. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  872. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  873. ##CLK_IND, RUN, FREQ_2, 0xab
  874. CLK_IND, RUN, FREQ_2, 0xa9
  875. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  876. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  877. CRT,RUN,LATCH_DATA, 0x08
  878.  
  879. [1152,864,8,82,90]
  880. # Unlock CRTC
  881. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  882. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  883. CRT,RUN,REG_LOCK_1,0x48,0xa5
  884. # Dump CRT Controller Registers
  885. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4e,0x12,0x95,0xff,0x00,0x60
  886. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  887. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  888. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  889. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  890. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  891. CRT,RUN,MODE_CONTROL,0x02
  892. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  893. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  894. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  895. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  896. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  897. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  898. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  899. # Lock CRTC Reg 11 for compatibility
  900. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  901. # Dump ENG Register
  902. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  903. # Dump MISCOUT Register
  904. DIR,RUN,MISC_WRITE,0xef
  905. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  906. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  907. CLK_IND, RUN, FREQ_2, 0xb9
  908. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  909. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  910. CRT,RUN,LATCH_DATA, 0x08
  911.  
  912. [1152,864,8,71,75]
  913. # Unlock CRTC
  914. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  915. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  916. CRT,RUN,REG_LOCK_1,0x48,0xa5
  917. # Dump CRT Controller Registers
  918. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x50,0x14,0xb7,0xff,0x00,0x60
  919. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  920. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  921. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  922. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  923. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  924. CRT,RUN,MODE_CONTROL,0x02
  925. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  926. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  927. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  928. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  929. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  930. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  931. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  932. # Lock CRTC Reg 11 for compatibility
  933. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  934. # Dump ENG Register
  935. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  936. # Dump MISCOUT Register
  937. DIR,RUN,MISC_WRITE,0xef
  938. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  939. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  940. CLK_IND, RUN, FREQ_2, 0xa9
  941. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  942. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  943. CRT,RUN,LATCH_DATA, 0x08
  944.  
  945. [1152,864,8,64,70]
  946. # Unlock CRTC
  947. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  948. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  949. CRT,RUN,REG_LOCK_1,0x48,0xa5
  950. # Dump CRT Controller Registers
  951. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4f,0x14,0x92,0xff,0x00,0x60
  952. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  953. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  954. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  955. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  956. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  957. CRT,RUN,MODE_CONTROL,0x02
  958. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  959. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  960. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  961. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  962. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  963. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  964. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  965. # Lock CRTC Reg 11 for compatibility
  966. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  967. # Dump ENG Register
  968. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  969. # Dump MISCOUT Register
  970. DIR,RUN,MISC_WRITE,0xef
  971. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  972. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  973. CLK_IND, RUN, FREQ_2, 0x9b
  974. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  975. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  976. CRT,RUN,LATCH_DATA, 0x08
  977.  
  978. [1152,864,8,56,60]
  979. # Unlock CRTC
  980. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  981. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  982. CRT,RUN,REG_LOCK_1,0x48,0xa5
  983. # Dump CRT Controller Registers
  984. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x4e,0x12,0xac,0xff,0x00,0x60
  985. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  986. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  987. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  988. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  989. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  990. CRT,RUN,MODE_CONTROL,0x02
  991. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  992. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  993. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  994. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  995. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  996. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  997. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  998. # Lock CRTC Reg 11 for compatibility
  999. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1000. # Dump ENG Register
  1001. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1002. # Dump MISCOUT Register
  1003. DIR,RUN,MISC_WRITE,0xef
  1004. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1005. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1006. CLK_IND, RUN, FREQ_2, 0x90
  1007. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1008. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1009. CRT,RUN,LATCH_DATA, 0x08
  1010.  
  1011.  
  1012. [1152,864,16,82,90]
  1013. # Unlock CRTC
  1014. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1015. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1016. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1017. # Dump CRT Controller Registers
  1018. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  1019. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1020. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1021. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1022. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1023. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1024. CRT,RUN,MODE_CONTROL,0x02
  1025. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1026. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1027. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1028. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1029. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1030. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1031. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1032. # Lock CRTC Reg 11 for compatibility
  1033. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1034. # Dump ENG Register
  1035. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1036. # Dump MISCOUT Register
  1037. DIR,RUN,MISC_WRITE,0xef
  1038. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1039. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1040. CLK_IND, RUN, FREQ_2, 0xb9
  1041. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1042. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1043. CRT,RUN,LATCH_DATA, 0x00
  1044.  
  1045.  
  1046. [1152,864,16,71,75]
  1047. # Unlock CRTC
  1048. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1049. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1050. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1051. # Dump CRT Controller Registers
  1052. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1053. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1054. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1055. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1056. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1057. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1058. CRT,RUN,MODE_CONTROL,0x02
  1059. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1060. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1061. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1062. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1063. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1064. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1065. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1066. # Lock CRTC Reg 11 for compatibility
  1067. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1068. # Dump ENG Register
  1069. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1070. # Dump MISCOUT Register
  1071. DIR,RUN,MISC_WRITE,0xef
  1072. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1073. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1074. CLK_IND, RUN, FREQ_2, 0xa9
  1075. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1076. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1077. CRT,RUN,LATCH_DATA, 0x00
  1078.  
  1079.  
  1080. [1152,864,16,64,70]
  1081. # Unlock CRTC
  1082. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1083. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1084. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1085. # Dump CRT Controller Registers
  1086. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1087. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1088. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1089. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1090. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1091. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1092. CRT,RUN,MODE_CONTROL,0x02
  1093. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1094. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1095. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1096. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1097. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1098. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1099. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1100. # Lock CRTC Reg 11 for compatibility
  1101. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1102. # Dump ENG Register
  1103. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1104. # Dump MISCOUT Register
  1105. DIR,RUN,MISC_WRITE,0xef
  1106. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1107. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1108. CLK_IND, RUN, FREQ_2, 0x9b
  1109. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1110. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1111. CRT,RUN,LATCH_DATA, 0x00
  1112.  
  1113. [1152,864,16,56,60]
  1114. # Unlock CRTC
  1115. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1116. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1117. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1118. # Dump CRT Controller Registers
  1119. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1120. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1121. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1122. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1123. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1124. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1125. CRT,RUN,MODE_CONTROL,0x02
  1126. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1127. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1128. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1129. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1130. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1131. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1132. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1133. # Lock CRTC Reg 11 for compatibility
  1134. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1135. # Dump ENG Register
  1136. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1137. # Dump MISCOUT Register
  1138. DIR,RUN,MISC_WRITE,0xef
  1139. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1140. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1141. CLK_IND, RUN, FREQ_2, 0x90
  1142. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1143. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1144. CRT,RUN,LATCH_DATA, 0x00
  1145.  
  1146. [1024,768,16,96,120]
  1147. # Unlock CRTC
  1148. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1149. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1150. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1151. # Dump CRT Controller Registers
  1152. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1153. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1154. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1155. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1156. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1157. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1158. CRT,RUN,MODE_CONTROL,0x02
  1159. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1160. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1161. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1162. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1163. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1164. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1165. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1166. # Lock CRTC Reg 11 for compatibility
  1167. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1168. # Dump ENG Register
  1169. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1170. # Dump MISCOUT Register
  1171. DIR,RUN,MISC_WRITE,0xef
  1172. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1173. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1174. CLK_IND, RUN, FREQ_2, 0xbd
  1175. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1176. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1177. CRT,RUN,LATCH_DATA, 0x00
  1178.  
  1179. [1024,768,16,81,100]
  1180. # Unlock CRTC
  1181. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1182. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1183. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1184. # Dump CRT Controller Registers
  1185. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1186. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1187. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1188. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1189. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1190. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1191. CRT,RUN,MODE_CONTROL,0x02
  1192. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1193. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1194. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1195. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1196. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1197. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1198. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1199. # Lock CRTC Reg 11 for compatibility
  1200. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1201. # Dump ENG Register
  1202. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1203. # Dump MISCOUT Register
  1204. DIR,RUN,MISC_WRITE,0xef
  1205. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1206. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1207. CLK_IND, RUN, FREQ_2, 0xa9
  1208. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1209. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1210. CRT,RUN,LATCH_DATA, 0x00
  1211.  
  1212. [1024,768,16,64,80]
  1213. # Unlock CRTC
  1214. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1215. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1216. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1217. # Dump CRT Controller Registers
  1218. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1219. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1220. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1221. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1222. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1223. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1224. CRT,RUN,MODE_CONTROL,0x02
  1225. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1226. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1227. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1228. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1229. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1230. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1231. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1232. # Lock CRTC Reg 11 for compatibility
  1233. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1234. # Dump ENG Register
  1235. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1236. # Dump MISCOUT Register
  1237. DIR,RUN,MISC_WRITE,0xef
  1238. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1239. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1240. CLK_IND, RUN, FREQ_2, 0x93
  1241. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1242. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1243. CRT,RUN,LATCH_DATA, 0x00
  1244.  
  1245. [1024,768,16,60,75]
  1246. # Unlock CRTC
  1247. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1248. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1249. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1250. # Dump CRT Controller Registers
  1251. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1252. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1253. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1254. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1255. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1256. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1257. CRT,RUN,MODE_CONTROL,0x02
  1258. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1259. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1260. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1261. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1262. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1263. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1264. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1265. # Lock CRTC Reg 11 for compatibility
  1266. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1267. # Dump ENG Register
  1268. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1269. # Dump MISCOUT Register
  1270. DIR,RUN,MISC_WRITE,0xef
  1271. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1272. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1273. CLK_IND, RUN, FREQ_2, 0x8c
  1274. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1275. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1276. CRT,RUN,LATCH_DATA, 0x00
  1277.  
  1278. [1024,768,16,58,72]
  1279. # Unlock CRTC
  1280. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1281. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1282. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1283. # Dump CRT Controller Registers
  1284. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1285. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1286. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1287. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1288. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1289. CRT,RUN,MISC_1,0x15,0x45,0x20,0x11
  1290. CRT,RUN,MODE_CONTROL,0x02
  1291. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1292. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1293. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1294. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1295. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1296. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1297. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1298. # Lock CRTC Reg 11 for compatibility
  1299. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1300. # Dump ENG Register
  1301. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1302. # Dump MISCOUT Register
  1303. DIR,RUN,MISC_WRITE,0xef
  1304. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1305. CLK_IND, RUN, FREQ_2,0x88
  1306. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1307. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1308. CLK_IND, RUN, FREQ_2, 0x88
  1309. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1310. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1311. CRT,RUN,LATCH_DATA, 0x00
  1312.  
  1313. [1024,768,16,56,70]
  1314. # Unlock CRTC
  1315. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1316. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1317. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1318. # Dump CRT Controller Registers
  1319. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1320. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1321. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1322. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1323. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1324. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1325. CRT,RUN,MODE_CONTROL,0x02
  1326. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1327. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1328. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1329. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1330. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1331. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1332. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1333. # Lock CRTC Reg 11 for compatibility
  1334. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1335. # Dump ENG Register
  1336. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1337. # Dump MISCOUT Register
  1338. DIR,RUN,MISC_WRITE,0xef
  1339. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1340. CLK_IND, RUN, FREQ_2,0x88
  1341. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1342. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1343. CLK_IND, RUN, FREQ_2, 0x88
  1344. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1345. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1346. CRT,RUN,LATCH_DATA, 0x00
  1347.  
  1348. [1024,768,16,48,60]
  1349. # Unlock CRTC
  1350. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1351. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1352. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1353. # Dump CRT Controller Registers
  1354. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1355. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1356. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1357. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1358. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1359. CRT,RUN,MISC_1,0x15,0x48,0x20,0x11
  1360. CRT,RUN,MODE_CONTROL,0x02
  1361. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1362. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1363. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1364. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1365. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1366. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1367. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1368. # Lock CRTC Reg 11 for compatibility
  1369. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1370. # Dump ENG Register
  1371. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1372. # Dump MISCOUT Register
  1373. DIR,RUN,MISC_WRITE,0xef
  1374. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1375. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1376. CLK_IND, RUN, FREQ_2, 0x7E
  1377. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1378. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1379. CRT,RUN,LATCH_DATA, 0x00
  1380.  
  1381. [1024,768,8,96,120]
  1382. # Unlock CRTC
  1383. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1384. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1385. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1386. # Dump CRT Controller Registers
  1387. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1388. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1389. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1390. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1391. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1392. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1393. CRT,RUN,MODE_CONTROL,0x02
  1394. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1395. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1396. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1397. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1398. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1399. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1400. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1401. # Lock CRTC Reg 11 for compatibility
  1402. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1403. # Dump ENG Register
  1404. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1405. # Dump MISCOUT Register
  1406. DIR,RUN,MISC_WRITE,0xef
  1407. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1408. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1409. CLK_IND, RUN, FREQ_2, 0xbd
  1410. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1411. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1412. CRT,RUN,LATCH_DATA, 0x08
  1413.  
  1414. [1024,768,8,81,100]
  1415. # Unlock CRTC
  1416. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1417. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1418. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1419. # Dump CRT Controller Registers
  1420. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1421. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1422. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1423. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1424. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1425. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1426. CRT,RUN,MODE_CONTROL,0x02
  1427. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1428. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1429. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1430. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1431. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1432. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1433. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1434. # Lock CRTC Reg 11 for compatibility
  1435. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1436. # Dump ENG Register
  1437. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1438. # Dump MISCOUT Register
  1439. DIR,RUN,MISC_WRITE,0xef
  1440. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1441. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1442. CLK_IND, RUN, FREQ_2, 0xa9
  1443. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1444. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1445. CRT,RUN,LATCH_DATA, 0x08
  1446.  
  1447.  
  1448. [1024,768,8,64,80]
  1449. # Unlock CRTC
  1450. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1451. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1452. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1453. # Dump CRT Controller Registers
  1454. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1455. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1456. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1457. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1458. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1459. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1460. CRT,RUN,MODE_CONTROL,0x02
  1461. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1462. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1463. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1464. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1465. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1466. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1467. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1468. # Lock CRTC Reg 11 for compatibility
  1469. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1470. # Dump ENG Register
  1471. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1472. # Dump MISCOUT Register
  1473. DIR,RUN,MISC_WRITE,0xef
  1474. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1475. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1476. CLK_IND, RUN, FREQ_2, 0x93
  1477. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1478. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1479. CRT,RUN,LATCH_DATA, 0x08
  1480.  
  1481. [1024,768,8,60,75]
  1482. # Unlock CRTC
  1483. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1484. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1485. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1486. # Dump CRT Controller Registers
  1487. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1488. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1489. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1490. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1491. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1492. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1493. CRT,RUN,MODE_CONTROL,0x02
  1494. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1495. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1496. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1497. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1498. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1499. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1500. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1501. # Lock CRTC Reg 11 for compatibility
  1502. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1503. # Dump ENG Register
  1504. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1505. # Dump MISCOUT Register
  1506. DIR,RUN,MISC_WRITE,0xef
  1507. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1508. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1509. CLK_IND, RUN, FREQ_2, 0x8c
  1510. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1511. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1512. CRT,RUN,LATCH_DATA, 0x08
  1513.  
  1514. [1024,768,8,58,72]
  1515. # Unlock CRTC
  1516. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1517. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1518. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1519. # Dump CRT Controller Registers
  1520. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1521. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1522. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1523. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1524. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1525. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  1526. CRT,RUN,MODE_CONTROL,0x02
  1527. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1528. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1529. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1530. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1531. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1532. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1533. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1534. # Lock CRTC Reg 11 for compatibility
  1535. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1536. # Dump ENG Register
  1537. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1538. # Dump MISCOUT Register
  1539. DIR,RUN,MISC_WRITE,0xef
  1540. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1541. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1542. CLK_IND, RUN, FREQ_2, 0x88
  1543. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1544. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1545. CRT,RUN,LATCH_DATA, 0x08
  1546.  
  1547. [1024,768,8,56,70]
  1548. # Unlock CRTC
  1549. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1550. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1551. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1552. # Dump CRT Controller Registers
  1553. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1554. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1555. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1556. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1557. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1558. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1559. CRT,RUN,MODE_CONTROL,0x02
  1560. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1561. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1562. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1563. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1564. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1565. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1566. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1567. # Lock CRTC Reg 11 for compatibility
  1568. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1569. # Dump ENG Register
  1570. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1571. # Dump MISCOUT Register
  1572. DIR,RUN,MISC_WRITE,0xef
  1573. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1574. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1575. CLK_IND, RUN, FREQ_2, 0x88
  1576. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1577. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1578. CRT,RUN,LATCH_DATA, 0x08
  1579.  
  1580. [1024,768,8,48,60]
  1581. # Unlock CRTC
  1582. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1583. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1584. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1585. # Dump CRT Controller Registers
  1586. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1587. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1588. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1589. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1590. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1591. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  1592. CRT,RUN,MODE_CONTROL,0x02
  1593. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1594. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1595. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1596. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1597. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1598. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1599. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1600. # Lock CRTC Reg 11 for compatibility
  1601. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1602. # Dump ENG Register
  1603. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1604. # Dump MISCOUT Register
  1605. DIR,RUN,MISC_WRITE,0xef
  1606. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1607. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1608. CLK_IND, RUN, FREQ_2, 0x7e
  1609. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1610. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1611. CRT,RUN,LATCH_DATA, 0x08
  1612.  
  1613. [800,600,32,75,120]
  1614. # Unlock CRTC
  1615. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1616. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1617. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1618. # Dump CRT Controller Registers
  1619. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  1620. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1621. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  1622. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1623. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1624. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1625. CRT,RUN,MODE_CONTROL,0x02
  1626. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1627. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1628. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1629. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1630. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1631. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1632. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1633. # Lock CRTC Reg 11 for compatibility
  1634. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1635. # Dump ENG Register
  1636. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1637. # Dump MISCOUT Register
  1638. DIR,RUN,MISC_WRITE,0xef
  1639. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1640. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1641. CLK_IND, RUN, FREQ_2, 0x8a
  1642. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1643. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1644. CRT,RUN,LATCH_DATA, 0x00
  1645.  
  1646. [800,600,32,64,100]
  1647. # Unlock CRTC
  1648. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1649. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1650. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1651. # Dump CRT Controller Registers
  1652. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  1653. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1654. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  1655. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1656. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1657. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  1658. CRT,RUN,MODE_CONTROL,0x02
  1659. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1660. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1661. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1662. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1663. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1664. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1665. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1666. # Lock CRTC Reg 11 for compatibility
  1667. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1668. # Dump ENG Register
  1669. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1670. # Dump MISCOUT Register
  1671. DIR,RUN,MISC_WRITE,0xef
  1672. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1673. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1674. CLK_IND, RUN, FREQ_2, 0x7e
  1675. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1676. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1677. CRT,RUN,LATCH_DATA, 0x00
  1678.  
  1679. [800,600,32,56,90]
  1680. # Unlock CRTC
  1681. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1682. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1683. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1684. # Dump CRT Controller Registers
  1685. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  1686. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1687. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  1688. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1689. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1690. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1691. CRT,RUN,MODE_CONTROL,0x02
  1692. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1693. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1694. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1695. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1696. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1697. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1698. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1699. # Lock CRTC Reg 11 for compatibility
  1700. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1701. # Dump ENG Register
  1702. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1703. # Dump MISCOUT Register
  1704. DIR,RUN,MISC_WRITE,0xef
  1705. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1706. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1707. CLK_IND, RUN, FREQ_2, 0x70
  1708. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1709. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1710. CRT,RUN,LATCH_DATA, 0x00
  1711.  
  1712. [800,600,32,46,75]
  1713. # Unlock CRTC
  1714. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1715. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1716. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1717. # Dump CRT Controller Registers
  1718. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  1719. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1720. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  1721. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1722. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1723. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1724. CRT,RUN,MODE_CONTROL,0x02
  1725. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1726. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1727. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1728. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1729. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1730. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1731. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1732. # Lock CRTC Reg 11 for compatibility
  1733. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1734. # Dump ENG Register
  1735. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1736. # Dump MISCOUT Register
  1737. DIR,RUN,MISC_WRITE,0xef
  1738. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1739. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1740. CLK_IND, RUN, FREQ_2, 0x60
  1741. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1742. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1743. CRT,RUN,LATCH_DATA, 0x00
  1744.  
  1745. [800,600,32,48,72]
  1746. # Unlock CRTC
  1747. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1748. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1749. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1750. # Dump CRT Controller Registers
  1751. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  1752. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1753. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  1754. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1755. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1756. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1757. CRT,RUN,MODE_CONTROL,0x02
  1758. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1759. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1760. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1761. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1762. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1763. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1764. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1765. # Lock CRTC Reg 11 for compatibility
  1766. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1767. # Dump ENG Register
  1768. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1769. # Dump MISCOUT Register
  1770. DIR,RUN,MISC_WRITE,0xef
  1771. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1772. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1773. CLK_IND, RUN, FREQ_2, 0x61
  1774. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1775. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1776. CRT,RUN,LATCH_DATA, 0x00
  1777.  
  1778. [800,600,32,37,60]
  1779. # Unlock CRTC
  1780. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1781. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1782. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1783. # Dump CRT Controller Registers
  1784. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  1785. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1786. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  1787. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1788. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1789. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1790. CRT,RUN,MODE_CONTROL,0x02
  1791. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1792. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1793. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1794. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1795. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1796. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1797. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1798. # Lock CRTC Reg 11 for compatibility
  1799. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1800. # Dump ENG Register
  1801. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1802. # Dump MISCOUT Register
  1803. DIR,RUN,MISC_WRITE,0xef
  1804. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1805. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1806. CLK_IND, RUN, FREQ_2, 0x4D
  1807. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1808. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1809. CRT,RUN,LATCH_DATA, 0x00
  1810.  
  1811.  
  1812. [800,600,32,35,56]
  1813. # Unlock CRTC
  1814. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1815. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1816. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1817. # Dump CRT Controller Registers
  1818. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  1819. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1820. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  1821. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1822. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1823. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1824. CRT,RUN,MODE_CONTROL,0x02
  1825. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1826. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1827. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1828. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1829. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1830. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1831. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1832. # Lock CRTC Reg 11 for compatibility
  1833. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1834. # Dump ENG Register
  1835. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1836. # Dump MISCOUT Register
  1837. DIR,RUN,MISC_WRITE,0xef
  1838. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1839. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1840. CLK_IND, RUN, FREQ_2, 0x45
  1841. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1842. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1843. CRT,RUN,LATCH_DATA, 0x00
  1844.  
  1845. [800,600,24,75,120]
  1846. # Unlock CRTC
  1847. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1848. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1849. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1850. # Dump CRT Controller Registers
  1851. CRT,RUN,HORZ_TOTAL,0x58,0x4c,0x4a,0x00,0x4b,0x14,0x82,0xf0,0x00,0x60
  1852. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1853. CRT,RUN,VERT_RETRACE_START,0x59,0x0b,0x57
  1854. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1855. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1856. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  1857. CRT,RUN,MODE_CONTROL,0x02
  1858. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1859. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1860. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1861. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1862. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1863. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1864. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1865. # Lock CRTC Reg 11 for compatibility
  1866. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1867. # Dump ENG Register
  1868. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1869. # Dump MISCOUT Register
  1870. DIR,RUN,MISC_WRITE,0xef
  1871. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1872. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1873. CLK_IND, RUN, FREQ_2, 0x8a
  1874. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1875. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1876. CRT,RUN,LATCH_DATA, 0x00
  1877.  
  1878.  
  1879. [800,600,24,64,100]
  1880. # Unlock CRTC
  1881. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1882. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1883. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1884. # Dump CRT Controller Registers
  1885. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x50,0x19,0x7a,0xf0,0x00,0x60
  1886. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1887. CRT,RUN,VERT_RETRACE_START,0x59,0x08,0x57
  1888. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1889. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1890. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1891. CRT,RUN,MODE_CONTROL,0x02
  1892. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1893. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1894. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1895. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1896. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1897. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1898. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1899. # Lock CRTC Reg 11 for compatibility
  1900. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1901. # Dump ENG Register
  1902. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1903. # Dump MISCOUT Register
  1904. DIR,RUN,MISC_WRITE,0xef
  1905. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1906. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1907. CLK_IND, RUN, FREQ_2, 0x7e
  1908. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1909. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1910. CRT,RUN,LATCH_DATA, 0x00
  1911.  
  1912.  
  1913. [800,600,24,56,90]
  1914. # Unlock CRTC
  1915. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1916. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1917. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1918. # Dump CRT Controller Registers
  1919. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4e,0x1a,0x6f,0xf0,0x00,0x60
  1920. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1921. CRT,RUN,VERT_RETRACE_START,0x57,0x09,0x57
  1922. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1923. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1924. CRT,RUN,MISC_1,0x15,0x55,0x2f,0x11
  1925. CRT,RUN,MODE_CONTROL,0x02
  1926. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1927. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1928. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1929. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1930. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1931. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1932. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1933. # Lock CRTC Reg 11 for compatibility
  1934. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1935. # Dump ENG Register
  1936. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1937. # Dump MISCOUT Register
  1938. DIR,RUN,MISC_WRITE,0xef
  1939. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1940. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1941. CLK_IND, RUN, FREQ_2, 0x70
  1942. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1943. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1944. CRT,RUN,LATCH_DATA, 0x00
  1945.  
  1946.  
  1947. [800,600,24,46,75]
  1948. # Unlock CRTC
  1949. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1950. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1951. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1952. # Dump CRT Controller Registers
  1953. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4d,0x15,0x6f,0xe0,0x00,0x60
  1954. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1955. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  1956. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1957. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1958. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1959. CRT,RUN,MODE_CONTROL,0x02
  1960. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1961. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1962. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1963. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1964. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1965. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1966. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1967. # Lock CRTC Reg 11 for compatibility
  1968. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1969. # Dump ENG Register
  1970. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1971. # Dump MISCOUT Register
  1972. DIR,RUN,MISC_WRITE,0xef
  1973. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1974. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1975. CLK_IND, RUN, FREQ_2, 0x60
  1976. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1977. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1978. CRT,RUN,LATCH_DATA, 0x00
  1979.  
  1980.  
  1981. [800,600,24,48,72]
  1982. # Unlock CRTC
  1983. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1984. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1985. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1986. # Dump CRT Controller Registers
  1987. ##CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4e,0x1a,0x8e,0xf0,0x00,0x60
  1988. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x80,0x52,0x1d,0x98,0xf0,0x00,0x60
  1989. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1990. ##CRT,RUN,VERT_RETRACE_START,0x71,0x27,0x57
  1991. CRT,RUN,VERT_RETRACE_START,0x7c,0x02,0x57
  1992. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1993. CRT,RUN,UNDERLINE_LOCATION,0x00,0x58,0x00,0xe3,0xff
  1994. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1995. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1996. CRT,RUN,MODE_CONTROL,0x02
  1997. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1998. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1999. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2000. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2001. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2002. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2003. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2004. # Lock CRTC Reg 11 for compatibility
  2005. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2006. # Dump ENG Register
  2007. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2008. # Dump MISCOUT Register
  2009. DIR,RUN,MISC_WRITE,0xef
  2010. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2011. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2012. ##CLK_IND, RUN, FREQ_2, 0x61
  2013. CLK_IND, RUN, FREQ_2, 0x62
  2014. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2015. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2016. CRT,RUN,LATCH_DATA, 0x00
  2017.  
  2018. [800,600,24,37,60]
  2019. # Unlock CRTC
  2020. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2021. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2022. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2023. # Dump CRT Controller Registers
  2024. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4e,0x1a,0x72,0xf0,0x00,0x60
  2025. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2026. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2027. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2028. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2029. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2030. CRT,RUN,MODE_CONTROL,0x02
  2031. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2032. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2033. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2034. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2035. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2036. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2037. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2038. # Lock CRTC Reg 11 for compatibility
  2039. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2040. # Dump ENG Register
  2041. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2042. # Dump MISCOUT Register
  2043. DIR,RUN,MISC_WRITE,0xef
  2044. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2045. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2046. CLK_IND, RUN, FREQ_2, 0x4d
  2047. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2048. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2049. CRT,RUN,LATCH_DATA, 0x00
  2050.  
  2051.  
  2052. [800,600,24,35,56]
  2053. # Unlock CRTC
  2054. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2055. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2056. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2057. # Dump CRT Controller Registers
  2058. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4d,0x16,0x72,0xf0,0x00,0x60
  2059. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2060. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2061. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2062. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2063. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2064. CRT,RUN,MODE_CONTROL,0x02
  2065. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2066. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2067. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2068. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2069. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2070. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2071. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2072. # Lock CRTC Reg 11 for compatibility
  2073. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2074. # Dump ENG Register
  2075. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2076. # Dump MISCOUT Register
  2077. DIR,RUN,MISC_WRITE,0xef
  2078. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2079. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2080. CLK_IND, RUN, FREQ_2, 0x45
  2081. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2082. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2083. CRT,RUN,LATCH_DATA, 0x00
  2084.  
  2085. [800,600,16,75,120]
  2086. # Unlock CRTC
  2087. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2088. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2089. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2090. # Dump CRT Controller Registers
  2091. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2092. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2093. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2094. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2095. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2096. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2097. CRT,RUN,MODE_CONTROL,0x02
  2098. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2099. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2100. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2101. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2102. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2103. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2104. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2105. # Lock CRTC Reg 11 for compatibility
  2106. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2107. # Dump ENG Register
  2108. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2109. # Dump MISCOUT Register
  2110. DIR,RUN,MISC_WRITE,0xef
  2111. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2112. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2113. CLK_IND, RUN, FREQ_2, 0x8a
  2114. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2115. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2116. CRT,RUN,LATCH_DATA, 0x00
  2117.  
  2118. [800,600,16,64,100]
  2119. # Unlock CRTC
  2120. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2121. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2122. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2123. # Dump CRT Controller Registers
  2124. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2125. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2126. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2127. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2128. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2129. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2130. CRT,RUN,MODE_CONTROL,0x02
  2131. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2132. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2133. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2134. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2135. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2136. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2137. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2138. # Lock CRTC Reg 11 for compatibility
  2139. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2140. # Dump ENG Register
  2141. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2142. # Dump MISCOUT Register
  2143. DIR,RUN,MISC_WRITE,0xef
  2144. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2145. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2146. CLK_IND, RUN, FREQ_2, 0x7e
  2147. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2148. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2149. CRT,RUN,LATCH_DATA, 0x00
  2150.  
  2151. [800,600,16,56,90]
  2152. # Unlock CRTC
  2153. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2154. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2155. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2156. # Dump CRT Controller Registers
  2157. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2158. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2159. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2160. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2161. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2162. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2163. CRT,RUN,MODE_CONTROL,0x02
  2164. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2165. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2166. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2167. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2168. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2169. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2170. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2171. # Lock CRTC Reg 11 for compatibility
  2172. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2173. # Dump ENG Register
  2174. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2175. # Dump MISCOUT Register
  2176. DIR,RUN,MISC_WRITE,0xef
  2177. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2178. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2179. CLK_IND, RUN, FREQ_2, 0x70
  2180. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2181. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2182. CRT,RUN,LATCH_DATA, 0x00
  2183.  
  2184. [800,600,16,46,75]
  2185. # Unlock CRTC
  2186. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2187. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2188. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2189. # Dump CRT Controller Registers
  2190. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2191. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2192. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2193. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2194. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2195. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2196. CRT,RUN,MODE_CONTROL,0x02
  2197. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2198. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2199. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2200. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2201. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2202. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2203. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2204. # Lock CRTC Reg 11 for compatibility
  2205. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2206. # Dump ENG Register
  2207. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2208. # Dump MISCOUT Register
  2209. DIR,RUN,MISC_WRITE,0xef
  2210. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2211. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2212. CLK_IND, RUN, FREQ_2, 0x60
  2213. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2214. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2215. CRT,RUN,LATCH_DATA, 0x00
  2216.  
  2217. [800,600,16,48,72]
  2218. # Unlock CRTC
  2219. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2220. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2221. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2222. # Dump CRT Controller Registers
  2223. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2224. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2225. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2226. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2227. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2228. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2229. CRT,RUN,MODE_CONTROL,0x02
  2230. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2231. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2232. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2233. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2234. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2235. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2236. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2237. # Lock CRTC Reg 11 for compatibility
  2238. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2239. # Dump ENG Register
  2240. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2241. # Dump MISCOUT Register
  2242. DIR,RUN,MISC_WRITE,0xef
  2243. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2244. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2245. CLK_IND, RUN, FREQ_2, 0x61
  2246. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2247. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2248. CRT,RUN,LATCH_DATA, 0x00
  2249.  
  2250. [800,600,16,37,60]
  2251. # Unlock CRTC
  2252. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2253. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2254. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2255. # Dump CRT Controller Registers
  2256. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2257. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2258. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2259. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2260. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2261. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2262. CRT,RUN,MODE_CONTROL,0x02
  2263. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2264. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2265. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2266. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2267. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2268. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2269. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2270. # Lock CRTC Reg 11 for compatibility
  2271. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2272. # Dump ENG Register
  2273. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2274. # Dump MISCOUT Register
  2275. DIR,RUN,MISC_WRITE,0xef
  2276. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2277. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2278. CLK_IND, RUN, FREQ_2, 0x4D
  2279. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2280. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2281. CRT,RUN,LATCH_DATA, 0x00
  2282.  
  2283.  
  2284. [800,600,16,35,56]
  2285. # Unlock CRTC
  2286. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2287. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2288. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2289. # Dump CRT Controller Registers
  2290. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2291. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2292. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2293. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2294. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2295. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2296. CRT,RUN,MODE_CONTROL,0x02
  2297. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2298. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2299. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2300. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2301. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2302. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2303. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2304. # Lock CRTC Reg 11 for compatibility
  2305. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2306. # Dump ENG Register
  2307. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2308. # Dump MISCOUT Register
  2309. DIR,RUN,MISC_WRITE,0xef
  2310. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2311. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2312. CLK_IND, RUN, FREQ_2, 0x45
  2313. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2314. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2315. CRT,RUN,LATCH_DATA, 0x00
  2316.  
  2317. [800,600,8,75,120]
  2318. # Unlock CRTC
  2319. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2320. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2321. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2322. # Dump CRT Controller Registers
  2323. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2324. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2325. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2326. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2327. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2328. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2329. CRT,RUN,MODE_CONTROL,0x02
  2330. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2331. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2332. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2333. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2334. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2335. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2336. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2337. # Lock CRTC Reg 11 for compatibility
  2338. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2339. # Dump ENG Register
  2340. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2341. # Dump MISCOUT Register
  2342. DIR,RUN,MISC_WRITE,0xef
  2343. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2344. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2345. CLK_IND, RUN, FREQ_2, 0x8a
  2346. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2347. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2348. CRT,RUN,LATCH_DATA, 0x08
  2349.  
  2350. [800,600,8,64,100]
  2351. # Unlock CRTC
  2352. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2353. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2354. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2355. # Dump CRT Controller Registers
  2356. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2357. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2358. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2359. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2360. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2361. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2362. CRT,RUN,MODE_CONTROL,0x02
  2363. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2364. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2365. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2366. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2367. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2368. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2369. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2370. # Lock CRTC Reg 11 for compatibility
  2371. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2372. # Dump ENG Register
  2373. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2374. # Dump MISCOUT Register
  2375. DIR,RUN,MISC_WRITE,0xef
  2376. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2377. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2378. CLK_IND, RUN, FREQ_2, 0x7e
  2379. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2380. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2381. CRT,RUN,LATCH_DATA, 0x08
  2382.  
  2383. [800,600,8,56,90]
  2384. # Unlock CRTC
  2385. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2386. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2387. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2388. # Dump CRT Controller Registers
  2389. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2390. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2391. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2392. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2393. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2394. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2395. CRT,RUN,MODE_CONTROL,0x02
  2396. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2397. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2398. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2399. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2400. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2401. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2402. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2403. # Lock CRTC Reg 11 for compatibility
  2404. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2405. # Dump ENG Register
  2406. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2407. # Dump MISCOUT Register
  2408. DIR,RUN,MISC_WRITE,0xef
  2409. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2410. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2411. CLK_IND, RUN, FREQ_2, 0x70
  2412. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2413. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2414. CRT,RUN,LATCH_DATA, 0x08
  2415.  
  2416. [800,600,8,46,75]
  2417. # Unlock CRTC
  2418. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2419. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2420. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2421. # Dump CRT Controller Registers
  2422. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2423. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2424. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2425. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2426. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2427. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2428. CRT,RUN,MODE_CONTROL,0x02
  2429. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2430. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2431. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2432. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2433. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2434. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2435. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2436. # Lock CRTC Reg 11 for compatibility
  2437. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2438. # Dump ENG Register
  2439. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2440. # Dump MISCOUT Register
  2441. DIR,RUN,MISC_WRITE,0xef
  2442. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2443. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2444. CLK_IND, RUN, FREQ_2, 0x60
  2445. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2446. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2447. CRT,RUN,LATCH_DATA, 0x08
  2448.  
  2449. [800,600,8,48,72]
  2450. # Unlock CRTC
  2451. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2452. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2453. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2454. # Dump CRT Controller Registers
  2455. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2456. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2457. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2458. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2459. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2460. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2461. CRT,RUN,MODE_CONTROL,0x02
  2462. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2463. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2464. CbRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2465. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2466. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2467. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2468. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2469. # Lock CRTC Reg 11 for compatibility
  2470. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2471. # Dump ENG Register
  2472. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2473. # Dump MISCOUT Register
  2474. DIR,RUN,MISC_WRITE,0xef
  2475. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2476. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2477. CLK_IND, RUN, FREQ_2, 0x61
  2478. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2479. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2480. CRT,RUN,LATCH_DATA, 0x08
  2481.  
  2482. [800,600,8,37,60]
  2483. # Unlock CRTC
  2484. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2485. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2486. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2487. # Dump CRT Controller Registers
  2488. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2489. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2490. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2491. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2492. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2493. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2494. CRT,RUN,MODE_CONTROL,0x02
  2495. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2496. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2497. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2498. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2499. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2500. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2501. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2502. # Lock CRTC Reg 11 for compatibility
  2503. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2504. # Dump ENG Register
  2505. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2506. # Dump MISCOUT Register
  2507. DIR,RUN,MISC_WRITE,0xef
  2508. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2509. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2510. CLK_IND, RUN, FREQ_2, 0x4D
  2511. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2512. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2513. CRT,RUN,LATCH_DATA, 0x08
  2514.  
  2515. [800,600,8,35,56]
  2516. # Unlock CRTC
  2517. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2518. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2519. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2520. # Dump CRT Controller Registers
  2521. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2522. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2523. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2524. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2525. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2526. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2527. CRT,RUN,MODE_CONTROL,0x02
  2528. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2529. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2530. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2531. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2532. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2533. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2534. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2535. # Lock CRTC Reg 11 for compatibility
  2536. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2537. # Dump ENG Register
  2538. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2539. # Dump MISCOUT Register
  2540. DIR,RUN,MISC_WRITE,0xef
  2541. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2542. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2543. CLK_IND, RUN, FREQ_2, 0x45
  2544. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2545. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2546. CRT,RUN,LATCH_DATA, 0x08
  2547.  
  2548. [640,480,24,64,120]
  2549. # Unlock CRTC
  2550. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2551. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2552. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2553. # Dump CRT Controller Registers
  2554. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x12,0x3e,0x00,0x40
  2555. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2556. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2557. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0c,0xab,0xff
  2558. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2559. CRT,RUN,MISC_1,0x15,0x58,0x24,0x11
  2560. CRT,RUN,MODE_CONTROL,0x02
  2561. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2562. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2563. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2564. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2565. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2566. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2567. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2568. # Lock CRTC Reg 11 for compatibility
  2569. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2570. # Dump ENG Register
  2571. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2572. # Dump MISCOUT Register
  2573. DIR,RUN,MISC_WRITE,0xef
  2574. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2575. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2576. CLK_IND, RUN, FREQ_2, 0x67
  2577. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2578. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2579. CRT,RUN,LATCH_DATA, 0x00
  2580.  
  2581.  
  2582. [640,480,24,52,100]
  2583. # Unlock CRTC
  2584. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2585. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2586. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2587. # Dump CRT Controller Registers
  2588. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3d,0x03,0x06,0x3e,0x00,0x40
  2589. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2590. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2591. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x00,0xab,0xff
  2592. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2593. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2594. CRT,RUN,MODE_CONTROL,0x02
  2595. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2596. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2597. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2598. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2599. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2600. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2601. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2602. # Lock CRTC Reg 11 for compatibility
  2603. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2604. # Dump ENG Register
  2605. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2606. # Dump MISCOUT Register
  2607. DIR,RUN,MISC_WRITE,0xef
  2608. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2609. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2610. CLK_IND, RUN, FREQ_2, 0x50
  2611. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2612. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2613. CRT,RUN,LATCH_DATA, 0x00
  2614.  
  2615. [640,480,24,48,90]
  2616. # Unlock CRTC
  2617. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2618. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2619. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2620. # Dump CRT Controller Registers
  2621. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x14,0x3e,0x00,0x40
  2622. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2623. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2624. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2625. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2626. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2627. CRT,RUN,MODE_CONTROL,0x02
  2628. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2629. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2630. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2631. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2632. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2633. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2634. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2635. # Lock CRTC Reg 11 for compatibility
  2636. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2637. # Dump ENG Register
  2638. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2639. # Dump MISCOUT Register
  2640. DIR,RUN,MISC_WRITE,0xef
  2641. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2642. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2643. CLK_IND, RUN, FREQ_2, 0x4d
  2644. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2645. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2646. CRT,RUN,LATCH_DATA, 0x00
  2647.  
  2648.  
  2649. [640,480,24,37,75]
  2650. # Unlock CRTC
  2651. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2652. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2653. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2654. # Dump CRT Controller Registers
  2655. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8f,0x3d,0x03,0xf2,0x1f,0x00,0x40
  2656. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2657. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  2658. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe0,0xf3,0xab,0xff
  2659. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2660. CRT,RUN,MISC_1,0x15,0x45,0x24,0x11
  2661. CRT,RUN,MODE_CONTROL,0x02
  2662. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2663. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2664. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2665. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2666. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2667. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2668. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2669. # Lock CRTC Reg 11 for compatibility
  2670. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2671. # Dump ENG Register
  2672. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2673. # Dump MISCOUT Register
  2674. DIR,RUN,MISC_WRITE,0xef
  2675. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2676. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2677. CLK_IND, RUN, FREQ_2, 0x39
  2678. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2679. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2680. CRT,RUN,LATCH_DATA, 0x00
  2681.  
  2682. [640,480,24,37,72]
  2683. # Unlock CRTC
  2684. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2685. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2686. CRT,RUN,REG_LOCK_1,0x48,0xa0
  2687. # Dump CRT Controller Registers
  2688. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x3d,0x01,0x06,0x3e,0x00,0x40
  2689. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2690. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2691. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2692. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2693. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2694. CRT,RUN,MODE_CONTROL,0x02
  2695. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2696. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2697. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2698. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2699. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2700. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2701. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2702. # Lock CRTC Reg 11 for compatibility
  2703. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2704. # Dump ENG Register
  2705. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2706. # Dump MISCOUT Register
  2707. DIR,RUN,MISC_WRITE,0xef
  2708. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2709. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2710. CLK_IND, RUN, FREQ_2, 0x3a
  2711. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2712. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2713. CRT,RUN,LATCH_DATA, 0x00
  2714.  
  2715. [640,480,24,31,60]
  2716. # Unlock CRTC
  2717. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2718. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2719. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2720. # Dump CRT Controller Registers
  2721. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3e,0x07,0x0b,0x3e,0x00,0x40
  2722. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2723. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2724. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe0,0x0c,0xab,0xff
  2725. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2726. CRT,RUN,MISC_1,0x15,0x41,0x24,0x11
  2727. CRT,RUN,MODE_CONTROL,0x02
  2728. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2729. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2730. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2731. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2732. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2733. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2734. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2735. # Lock CRTC Reg 11 for compatibility
  2736. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2737. # Dump ENG Register
  2738. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2739. # Dump MISCOUT Register
  2740. DIR,RUN,MISC_WRITE,0xef
  2741. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2742. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2743. CLK_IND, RUN, FREQ_2, 0x21
  2744. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2745. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2746. CRT,RUN,LATCH_DATA, 0x00
  2747.  
  2748. [640,480,32,64,120]
  2749. # Unlock CRTC
  2750. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2751. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2752. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2753. # Dump CRT Controller Registers
  2754. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2755. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2756. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2757. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  2758. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2759. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2760. CRT,RUN,MODE_CONTROL,0x02
  2761. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2762. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2763. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2764. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2765. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2766. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2767. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2768. # Lock CRTC Reg 11 for compatibility
  2769. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2770. # Dump ENG Register
  2771. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2772. # Dump MISCOUT Register
  2773. DIR,RUN,MISC_WRITE,0xef
  2774. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2775. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2776. CLK_IND, RUN, FREQ_2, 0x67
  2777. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2778. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2779. CRT,RUN,LATCH_DATA, 0x00
  2780.  
  2781. [640,480,32,52,100]
  2782. # Unlock CRTC
  2783. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2784. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2785. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2786. # Dump CRT Controller Registers
  2787. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  2788. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2789. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2790. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  2791. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2792. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  2793. CRT,RUN,MODE_CONTROL,0x02
  2794. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2795. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2796. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2797. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2798. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2799. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2800. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2801. # Lock CRTC Reg 11 for compatibility
  2802. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2803. # Dump ENG Register
  2804. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2805. # Dump MISCOUT Register
  2806. DIR,RUN,MISC_WRITE,0xef
  2807. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2808. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2809. CLK_IND, RUN, FREQ_2, 0x50
  2810. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2811. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2812. CRT,RUN,LATCH_DATA, 0x00
  2813.  
  2814. [640,480,32,48,90]
  2815. # Unlock CRTC
  2816. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2817. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2818. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2819. # Dump CRT Controller Registers
  2820. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2821. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2822. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2823. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2824. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2825. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2826. CRT,RUN,MODE_CONTROL,0x02
  2827. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2828. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2829. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2830. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2831. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2832. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2833. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2834. # Lock CRTC Reg 11 for compatibility
  2835. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2836. # Dump ENG Register
  2837. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2838. # Dump MISCOUT Register
  2839. DIR,RUN,MISC_WRITE,0xef
  2840. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2841. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2842. CLK_IND, RUN, FREQ_2, 0x4d
  2843. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2844. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2845. CRT,RUN,LATCH_DATA, 0x00
  2846.  
  2847. [640,480,32,37,75]
  2848. # Unlock CRTC
  2849. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2850. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2851. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2852. # Dump CRT Controller Registers
  2853. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  2854. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2855. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  2856. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  2857. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2858. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2859. CRT,RUN,MODE_CONTROL,0x02
  2860. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2861. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2862. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2863. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2864. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2865. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2866. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2867. # Lock CRTC Reg 11 for compatibility
  2868. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2869. # Dump ENG Register
  2870. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2871. # Dump MISCOUT Register
  2872. DIR,RUN,MISC_WRITE,0xef
  2873. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2874. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2875. CLK_IND, RUN, FREQ_2, 0x3a
  2876. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2877. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2878. CRT,RUN,LATCH_DATA, 0x00
  2879.  
  2880. [640,480,32,37,72]
  2881. # Unlock CRTC
  2882. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2883. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2884. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2885. # Dump CRT Controller Registers
  2886. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  2887. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2888. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2889. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2890. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2891. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2892. CRT,RUN,MODE_CONTROL,0x02
  2893. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2894. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2895. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2896. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2897. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2898. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2899. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2900. # Lock CRTC Reg 11 for compatibility
  2901. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2902. # Dump ENG Register
  2903. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2904. # Dump MISCOUT Register
  2905. DIR,RUN,MISC_WRITE,0xef
  2906. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2907. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2908. CLK_IND, RUN, FREQ_2, 0x3a
  2909. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2910. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2911. CRT,RUN,LATCH_DATA, 0x00
  2912.  
  2913. [640,480,32,31,60]
  2914. # Unlock CRTC
  2915. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2916. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2917. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2918. # Dump CRT Controller Registers
  2919. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  2920. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2921. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2922. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  2923. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2924. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2925. CRT,RUN,MODE_CONTROL,0x02
  2926. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2927. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2928. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2929. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2930. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2931. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2932. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2933. # Lock CRTC Reg 11 for compatibility
  2934. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2935. # Dump ENG Register
  2936. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2937. # Dump MISCOUT Register
  2938. DIR,RUN,MISC_WRITE,0xef
  2939. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2940. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2941. CLK_IND, RUN, FREQ_2, 0x21
  2942. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2943. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2944. CRT,RUN,LATCH_DATA, 0x00
  2945.  
  2946. [640,480,16,64,120]
  2947. # Unlock CRTC
  2948. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2949. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2950. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2951. # Dump CRT Controller Registers
  2952. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2953. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2954. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2955. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  2956. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2957. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2958. CRT,RUN,MODE_CONTROL,0x02
  2959. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2960. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2961. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2962. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2963. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2964. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2965. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2966. # Lock CRTC Reg 11 for compatibility
  2967. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2968. # Dump ENG Register
  2969. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2970. # Dump MISCOUT Register
  2971. DIR,RUN,MISC_WRITE,0xef
  2972. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2973. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2974. CLK_IND, RUN, FREQ_2, 0x67
  2975. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2976. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2977. CRT,RUN,LATCH_DATA, 0x00
  2978.  
  2979. [640,480,16,52,100]
  2980. # Unlock CRTC
  2981. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2982. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2983. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2984. # Dump CRT Controller Registers
  2985. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  2986. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2987. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2988. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  2989. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2990. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  2991. CRT,RUN,MODE_CONTROL,0x02
  2992. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2993. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2994. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2995. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2996. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2997. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2998. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2999. # Lock CRTC Reg 11 for compatibility
  3000. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3001. # Dump ENG Register
  3002. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3003. # Dump MISCOUT Register
  3004. DIR,RUN,MISC_WRITE,0xef
  3005. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3006. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3007. CLK_IND, RUN, FREQ_2, 0x50
  3008. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3009. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3010. CRT,RUN,LATCH_DATA, 0x00
  3011.  
  3012. [640,480,16,48,90]
  3013. # Unlock CRTC
  3014. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3015. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3016. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3017. # Dump CRT Controller Registers
  3018. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3019. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3020. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3021. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3022. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3023. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3024. CRT,RUN,MODE_CONTROL,0x02
  3025. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3026. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3027. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3028. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3029. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3030. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3031. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3032. # Lock CRTC Reg 11 for compatibility
  3033. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3034. # Dump ENG Register
  3035. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3036. # Dump MISCOUT Register
  3037. DIR,RUN,MISC_WRITE,0xef
  3038. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3039. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3040. CLK_IND, RUN, FREQ_2, 0x4d
  3041. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3042. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3043. CRT,RUN,LATCH_DATA, 0x00
  3044.  
  3045. [640,480,16,37,75]
  3046. # Unlock CRTC
  3047. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3048. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3049. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3050. # Dump CRT Controller Registers
  3051. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3052. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3053. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3054. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3055. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3056. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3057. CRT,RUN,MODE_CONTROL,0x02
  3058. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3059. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3060. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3061. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3062. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3063. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3064. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3065. # Lock CRTC Reg 11 for compatibility
  3066. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3067. # Dump ENG Register
  3068. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3069. # Dump MISCOUT Register
  3070. DIR,RUN,MISC_WRITE,0xef
  3071. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3072. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3073. CLK_IND, RUN, FREQ_2, 0x3a
  3074. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3075. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3076. CRT,RUN,LATCH_DATA, 0x00
  3077.  
  3078. [640,480,16,37,72]
  3079. # Unlock CRTC
  3080. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3081. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3082. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3083. # Dump CRT Controller Registers
  3084. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3085. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3086. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3087. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3088. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3089. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3090. CRT,RUN,MODE_CONTROL,0x02
  3091. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3092. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3093. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3094. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3095. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3096. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3097. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3098. # Lock CRTC Reg 11 for compatibility
  3099. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3100. # Dump ENG Register
  3101. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3102. # Dump MISCOUT Register
  3103. DIR,RUN,MISC_WRITE,0xef
  3104. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3105. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3106. CLK_IND, RUN, FREQ_2, 0x3a
  3107. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3108. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3109. CRT,RUN,LATCH_DATA, 0x00
  3110.  
  3111. [640,480,16,31,60]
  3112. # Unlock CRTC
  3113. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3114. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3115. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3116. # Dump CRT Controller Registers
  3117. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3118. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3119. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3120. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3121. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3122. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3123. CRT,RUN,MODE_CONTROL,0x02
  3124. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3125. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3126. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3127. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3128. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3129. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3130. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3131. # Lock CRTC Reg 11 for compatibility
  3132. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3133. # Dump ENG Register
  3134. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3135. # Dump MISCOUT Register
  3136. DIR,RUN,MISC_WRITE,0xef
  3137. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3138. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3139. CLK_IND, RUN, FREQ_2, 0x21
  3140. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3141. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3142. CRT,RUN,LATCH_DATA, 0x00
  3143.  
  3144. [640,480,8,64,120]
  3145. # Unlock CRTC
  3146. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3147. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3148. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3149. # Dump CRT Controller Registers
  3150. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3151. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3152. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3153. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3154. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3155. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3156. CRT,RUN,MODE_CONTROL,0x02
  3157. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3158. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3159. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3160. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3161. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3162. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3163. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3164. # Lock CRTC Reg 11 for compatibility
  3165. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3166. # Dump ENG Register
  3167. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3168. # Dump MISCOUT Register
  3169. DIR,RUN,MISC_WRITE,0xef
  3170. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3171. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3172. CLK_IND, RUN, FREQ_2, 0x67
  3173. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3174. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3175. CRT,RUN,LATCH_DATA, 0x08
  3176.  
  3177. [640,480,8,52,100]
  3178. # Unlock CRTC
  3179. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3180. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3181. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3182. # Dump CRT Controller Registers
  3183. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3184. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3185. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3186. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3187. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3188. CRT,RUN,MISC_1,0x15,0x28,0x40,0x11
  3189. CRT,RUN,MODE_CONTROL,0x02
  3190. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3191. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3192. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3193. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3194. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3195. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3196. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3197. # Lock CRTC Reg 11 for compatibility
  3198. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3199. # Dump ENG Register
  3200. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3201. # Dump MISCOUT Register
  3202. DIR,RUN,MISC_WRITE,0xef
  3203. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3204. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3205. CLK_IND, RUN, FREQ_2, 0x50
  3206. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3207. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3208. CRT,RUN,LATCH_DATA, 0x08
  3209.  
  3210. [640,480,8,48,90]
  3211. # Unlock CRTC
  3212. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3213. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3214. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3215. # Dump CRT Controller Registers
  3216. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3217. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3218. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3219. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3220. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3221. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3222. CRT,RUN,MODE_CONTROL,0x02
  3223. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3224. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3225. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3226. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3227. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3228. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3229. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3230. # Lock CRTC Reg 11 for compatibility
  3231. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3232. # Dump ENG Register
  3233. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3234. # Dump MISCOUT Register
  3235. DIR,RUN,MISC_WRITE,0xef
  3236. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3237. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3238. CLK_IND, RUN, FREQ_2, 0x4d
  3239. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3240. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3241. CRT,RUN,LATCH_DATA, 0x08
  3242.  
  3243. [640,480,8,37,75]
  3244. # Unlock CRTC
  3245. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3246. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3247. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3248. # Dump CRT Controller Registers
  3249. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3250. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3251. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3252. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3253. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3254. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3255. CRT,RUN,MODE_CONTROL,0x02
  3256. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3257. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3258. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3259. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3260. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3261. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3262. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3263. # Lock CRTC Reg 11 for compatibility
  3264. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3265. # Dump ENG Register
  3266. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3267. # Dump MISCOUT Register
  3268. DIR,RUN,MISC_WRITE,0xef
  3269. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3270. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3271. CLK_IND, RUN, FREQ_2, 0x3a
  3272. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3273. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3274. CRT,RUN,LATCH_DATA, 0x08
  3275.  
  3276. [640,480,8,37,72]
  3277. # Unlock CRTC
  3278. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3279. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3280. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3281. # Dump CRT Controller Registers
  3282. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3283. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3284. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3285. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3286. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3287. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3288. CRT,RUN,MODE_CONTROL,0x02
  3289. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3290. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3291. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3292. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3293. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3294. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3295. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3296. # Lock CRTC Reg 11 for compatibility
  3297. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3298. # Dump ENG Register
  3299. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3300. # Dump MISCOUT Register
  3301. DIR,RUN,MISC_WRITE,0xef
  3302. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3303. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3304. CLK_IND, RUN, FREQ_2, 0x3a
  3305. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3306. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3307. CRT,RUN,LATCH_DATA, 0x08
  3308.  
  3309. [640,480,8,31,60]
  3310. # Unlock CRTC
  3311. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3312. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3313. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3314. # Dump CRT Controller Registers
  3315. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3316. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3317. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3318. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3319. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3320. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3321. CRT,RUN,MODE_CONTROL,0x02
  3322. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3323. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3324. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3325. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3326. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3327. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3328. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3329. # Lock CRTC Reg 11 for compatibility
  3330. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3331. # Dump ENG Register
  3332. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3333. # Dump MISCOUT Register
  3334. DIR,RUN,MISC_WRITE,0xef
  3335. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3336. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3337. CLK_IND, RUN, FREQ_2, 0x21
  3338. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3339. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3340. CRT,RUN,LATCH_DATA, 0x08
  3341.  
  3342.  
  3343.  
  3344.  
  3345.  
  3346.  
  3347.