PC World Komputer 1996 September/pcwk_09_96.iso/demo/elmark/cupl/manual/ug4.txt

Text File | 1992-01-17 | 27KB | 601 lines

.C1. CUPL OPERATION             U4

    This chapter explains how to use the various components of the CUPL
    package. It includes CUPL, CSIM, CBLD and PTOC.

    This section describes CUPL input and output and explains how to run
    CUPL using the command line options or the Menu system.  This is a
    condensed version of the information given in the User Guide section
    "Using The CUPL System".


o    .c2.INPUT

    A logic description source file (filename.PLD) is the input to CUPL.
    This file describes the logical functionality to assign to a
    specified target device.

    The source file is created using a standard text editor.  There are
    a wide variety of text editors available and the choice depends
    entirely upon personal preference.  The only requirement is that it
    be able to produce a standard text file.

    The CUPL compiler must be able to access the device library file
    (CUPL.DL), which contains a description of each of the target
    devices supported in the current version of CUPL.  The library
    describes the physical characteristics of each device, including
    internal architecture, number of pins, and valid input and output
    pins, and also describes the logical characteristics, including

    registered and non-registered pins,

    number of product terms, fuse  map information, and download format
    information.

    The target device is referenced using device mnemonics.  The
    mnemonic is composed of a device family prefix and industry standard
    part number suffix. Table U4-1 lists the device mnemonic prefixes.

        Table U4-1. CUPL Device Mnemonic Prefixes
        Symbol          Meaning
        EP              Erasable Programmable Logic Device (EPLD)
        G               Generic Array Logic (GAL)
        F               Field Programmable Logic Array (FPLA)
        F               Field Programmable Gate Array (FPGA)
        F               Field Programmable Logic Sequencer (FPLS)
        F               Field Programmable Sequence Generator (FPSG)
        P               Programmable Logic Array (PAL)
        P               Programmable Logic Device     (PLD)
        P               Programmable Electrically Erasable Logic (PEEL)
        PLD             Pseudo Logical Device
        RA              Bipolar Programmable Read Only Memory (PROM)

        ========================================================
        Note
        A CUPL device mnemonic can reference multiple manufacturers.
        Please refer to mnemonic vs.  manufacturer cross reference found
        in the file, Devices.TXT.
        ========================================================

    For example, the device mnemonic for a PAL10L8 is P10L8; for an
    82S100 the device mnemonic is F100.  For bipolar PROMs, the suffix
    is the array size; for example, the device mnemonic for a 1024 x 8
    bipolar PROM is RA10P8, since there are 10 address input pins and 8
    data output pins.

o   .c2.OUTPUT
    CUPL can output the files described below.

    _
           A JEDEC-compatible ASCII download file (filename.JED) for
           input to a device programmer.

    _      An ASCII Hex download file (filename.HEX) available for
           PROMs.

    _
           An HL download file (filename.HL) available for Signetics IFL
           devices.

    _
           An absolute file (filename.ABS) for use by CSIM, the CUPL
           logic simulation program.

    _
           An error listing file (filename.LST) that lists errors in the
           original source file.

    _
           A documentation file (filename.DOC) that contains expanded
           logic equations, a variable symbol table, product term
           utilization, and fusemap information.

    _
           P-CAD PDIF file (filename.PDF) that can be translated by
           PDIFIN into a PC-CAPS symbol representing the pinouts of the
           programmable logic device.

    _
           A Berkeley PLA file (filename.PLA) for use by the Berkeley
           PLA tools.

    _
           A Open PLA file
           (filename.PLA)
           for use by
           various back end
           fitters.

o .c2.RUNNING CUPL FROM THE COMMAND LINE
    Run CUPL using the following command line format:

              cupl [-flags] [library] [device] source

    where

    -flags is the following set of compiler options:

    -j  JEDEC download format

    -h  ASCII-HEX download format

    -i  HL download format

    -n  use input filename for output file

    -a  create absolute file

    -l  create listing file

    -e  create expanded macro definition file

    -x  create expanded product-terms in documentation file

    -f  create fuse plot/chip diagram in documentation file

    -p  create PDIF database interchange format file

    -b  create Berkeley PLA format file

    -c  create PALASM format file

    -d  deactivate unused OR terms

    -r  disable product term merging

    -g  program security fuse

    -u  use specified library for compilation

    -s  perform logic simulation after compilation

    -w  perform simulation with waveform output (MS-DOS only)

    -m0 no minimization

    -m1 quick minimization (default)

    -m2 Quine McCluskey

    -m3 Presto

    -m4 Expresso

    -q  Microsoft format for error messages

    library is the path name and library name used with the -u flag to
    specify a library other than the default library.  device is the
    device mnemonic for the type of part to be used in the compilation.
    Use the CBLD program to list available devices (see Chapter 3,
    "Using CBLD").

    source is the user-created ASCII logic description file
    (filename.PLD). The .PLD extension is assumed for the source file
    and may be omitted when giving the CUPL command.

   ========================================================
   Note
     The square  brackets indicate optional items.
   ========================================================


    Multiple option flags can be specified when running CUPL.  A hyphen
    must be typed before the first flag entered, but is optional for
    additional flags.  Spaces also can be put between the option flags.
    For example, the following two CUPL command lines are equivalent:

              cupl -a -l -j p16r4 waitgen [Enter]

              cupl -alj p16r4 waitgen [Enter]

    Type CUPL without any flags to see the command line format and a
    list of the option flags. Table U4-2 lists descriptions of the CUPL
    option flags and output files. An introductory example will be
    presented in the next chapter.

        Table U4-2. Compiler Option Flags

    Option Flag    Description

    j              Generates a JEDEC-compatib le ASCII download file
                   (filename.JED).  The filename is not necessarily the
                   same as the logic description filename input to CUPL.
                   The NAME statement in the header information section
                   of the logic description file determines the download
                   filename (see the subtopic, Header Information in
                   this chapter).

    c              This can be used to create an input file for other
                   logic design tools and gate array fitters such as
                   PDS2XNF from XILINX.

    h              Generates an ASCII-hex download file (filename.HEX) .
                   This format is available only for PROMs.  The
                   filename is not necessarily the same as the logic
                   description filename input to CUPL.  The NAME
                   statement in the header information section of the
                   logic description file determines the download
                   filename (see the subtopic, Header Information in
                   this chapter).

    i              Generates an HL download file (filename.HL).  This
                   format is available only for the Signetics IFL
                   devices. The filename is not necessarily the same as
                   the logic description filename input to CUPL.  The
                   NAME statement in the header information section of
                   the logic description file determines the download
                   filename (see the subtopic, Header Information in
                   this chapter).

    a              Generates an absolute file (filename.ABS) for use by
                   the CSIM logic simulation program.

    n              Allows the source filename to be used as the JEDEC
                   filename instead of using the name in the NAME field
                   of the source file.

    l              Generates an error listing file (filename.LST) . Each
                   line in the original source file is numbered.  Error
                   messages are listed at the end of the file and use
                   the line numbers for reference.

    x              Generates a documentation file (filename.DOC) which
                   contains an expanded listing of the logic terms in
                   sum-of-product s format and a symbol table of all
                   variables used in the source file.  It includes the
                   total number of product terms and the number
                   available for each output.

    f              Generates a fuse plot in the documentation file. For
                   PAL devices, each output pin is listed and the
                   associated product term rows are shown with the
                   starting JEDEC fuse number. Fuses present are denoted
                   with "x".  Fuses blown are denoted with "-". For IFL
                   devices, the HL download format is used, showing
                   JEDEC fuse numbers with input terms denoted as "H,"
                   "L," "0," or "-".

    p              Generates a PDIF (P-CAD Database Interchange Format)
                   file (filename.PDF) which can be translated by the
                   PDIFIN program into a symbol for the PC-CAPS (P-CAD
                   Schematic Capture) program. The generated symbol will
                   contain packaging information for the PLD.  b
                   Generates a Berkeley PLA file (filename.PLA) for use
                   by the Berkeley PLA tools, such as PLEASURE, or other
                   PLA layout tools which use the Berkeley PLA format.
                   The compiler

    d              In IFL devices, the OR-gate output array is driven by
                   each of the AND-gate product terms.  Normally, unused
                   OR-gate inputs are left connected to the product term
                   array so that new terms may be added.  However, with
                   this option, the unused OR-gate inputs are removed
                   (deactivated) from the product term array.  The
                   result is reduced propagation delay from input to
                   output.

    r              In IFL devices, each product term from the AND- gate
                   array may be shared among any number of OR- gate
                   outputs.  This option defeats this capability,
                   forcing identical product terms to be generated for
                   each output OR-array when required. The result is
                   reduced propagation delay from input to output. This
                   option will also force minimization to be performed
                   on each output individually (as opposed to
                   minimization on all outputs at once) when level m2 or
                   m4 minimization is chosen.

    g              Adds the necessary code in the JEDEC download file to
                   automatically allow the device programmer to blow the
                   security fuse when programming.  Not all programmers
                   support this option.

    u              Overrides the default device library specified in the
                   environment.  Specify the complete path and filename
                   for the library. Use this option on systems that may
                   have special libraries created for unique or custom
                   devices.

    s              Creates the absolute file and automatically runs the
                   CSIM logic simulator.  CSIM is run with the -l option
                   that creates a list file. If the -j flag was
                   specified for CUPL, it will be passed to CSIM,
                   creating a JEDEC download file with test vectors.

    e              Generates an expanded macro definition file
                   (filename.MX) which contains an expanded listing of
                   all macros used in the source file.  It also contains
                   the expanded expressions that use the REPEAT command.

    w              MS-DOS only) Creates the absolute file and
                   automatically runs the CSIM logic simulator with
                   waveform output. CSIM is executed with the -w option
                   that displays the output in wave form.

    m0             Defeats all logic minimization during a CUPL
                   compilation.  It is useful when working with PROMs,
                   to keep contained product terms from being
                   eliminated.

    m1  -  m4      CUPL provides four minimization levels: -m1, -m2,
                   -m3, and -m4.  The default minimization level is m1.
                   Figure U4-1 shows the relative memory usage, speed,
                   and efficiency of the four minimization levels.
                   Minimization levels m2 and m4 will perform multiple
                   output minimization in IFL devices. This maximizes
                   product term sharing in these types of devices.

    q              Selects the Microsoft format for error messages.
                   This applies only to the error messages displayed on
                   the screen.  (It does not affect the error format in
                   the error listing file..) The reason for the
                   alternate format is to allow CUPL to be executed
                   within a text editor which has this feature (e.g.
                   MULTI-EDIT) and once an error has been encountered,
                   the file designated by the error message is brought
                   to the screen with the cursor prompting at the line
                   containing the error.

        ---------------------------------------------------------------
        Efficiency          Memory Usage        Execution Time

        |     ##            |     ##            |     ##
        |     ##      ##    |     ##      ##    |     ##
        |     ##  ##  ##    |     ##      ##    |     ##  ##
        |     ##  ##  ##    |     ##  ##  ##    |     ##  ##  ##
        |     ##  ##  ##    |     ##  ##  ##    |     ##  ##  ##
        |     ##  ##  ##    |     ##  ##  ##    |     ##  ##  ##
        | ##  ##  ##  ##    | ##  ##  ##  ##    | ##  ##  ##  ##
        | ##  ##  ##  ##    | ##  ##  ##  ##    | ##  ##  ##  ##
        | ##  ##  ##  ##    | ##  ##  ##  ##    | ##  ##  ##  ##
        |________________   |________________   |________________
          M1  M2  M3  M4      M1  M2  M3  M4      M1  M2  M3  M4
        ---------------------------------------------------------------
        Figure U4-1. Logic Minimization Levels

    Flag        Minimization Description
    ----        ------------------------
    M1               Quick Minimization
    M2               Quine-McCluskey Minimization
    M3               Presto Minimization
    M4               Expresso Minimization

o   .c2.RUNNING CUPL USING THE MENUS

    The MS-DOS version of CUPL contains a front-end menu system.  This
    can be used instead of the command line for working more quickly
    with CUPL. An explanation of the menu system follows.

    The CUPL menu program is called MCUPL.  It is a front-end program,
    meaning that it executes the other CUPL programs just as a user
    would, but the user never sees this step. All that is necessary is
    to select a choice from a menu and press return.

    The Installation Chapter contains a description of how to install
    MCUPL. The MCUPL files MCUPL.EXE and MCUPL.CFG must be copied to the
    hard disk.  MCUPL.CFG must be modified, so that it knows how the
    system has been set up. This is not difficult.  MCUPL.CFG contains
    information such as the location of a working directory where work
    files are stored, what colors to use on the screen, the name of the
    editor being used and the class of computer that is being used.  The
    installation chapter gives more information on this.

    MCUPL is used by pressing keys on the keyboard to make selections
    from the menus. The arrow keys can be used to move up and down the
    menu.  When the desired choice is selected, simply press the return
    key. This will either cause another menu to appear with more
    specific choices or it will cause an action to occur.  It is also
    possible to press the first letter of the menu item to select it.
    For example, from the main menu, [Q] can be pressed to select the
    quit item.  Type a 'Y' to confirm the choice. This will quit the
    program back to DOS.

    Often, an action will require input from the user. The message
    center will display a prompt detailing what information is required,
    such as a file name to be compiled. After entering the information,
    the user then presses the return key on the keyboard, and the action
    proceeds.

    If a sub-menu is displayed, the escape key [Esc] can be used to
    display the previous menu.

  The following is a description of the main menu of MCUPL.

  <E>dit Design Entry                   Edit or convert a design file .

  <C>ompile CUPL File                   Prompts for a .PLD file then
                                        compiles it.

  <L>ook at DOC File                    View the Documentation file.

  <R>eview error  LST  File             View the error listing file.

  <J>EDEC File Editor                   View or edit a JEDEC file.

  Ed<I>t Simulation Input               File Create or edit the
                                        simulation input file (.SI).

  <S>imulate CUPL File                  Simulate the PLD design using
                                        the .SI file.

  <V>iew Simulation Results             View simulation output file
                                        (.SO).

  <D>evice Selection                    Choose a device from a list
                                        giving device type,
                                        manufacturer, and other
                                        information.


  <B>uild/view Device Library           Build or view a user device
                                        library.

  <P>ALASM to CUPL                      This allows user to convert
                                        PALASM source file to CUPL
                                        source file .

  <H>elp(CUPL Quick Reference)          The online quick reference guide
                                        for CUPL.

  <T>utorial for PLDs                   This executes the Programmable
                                        Logic User's guide dem
                                        nstration.

  Design E<X>amples                     Display PLD design examples
                                        description.


  <U>ser's Editor                       Create or edit any text file
                                        e.g.  DEVHELP.TXT, CQRG.TXT,
                                        EXAMPLES.TXT, INFO.TXT.

  <A>dditional Product                  Information Provide further
                                        information about CUPL and other
                                        Logical Devices products .

  S<Y>stem Information                  Show system Information.

  <Q>uit                                Return to DOS.

        Defining Function keys

    MCUPL allows for the custom definition of Function Keys F6 to F10.
    This involves modifying MCUPL.CFG. The function key definitions
    simply simulate the typing of a sequence of keys.

    To define F6 to quit, add the following to MCUPL.CFG:

        def F6 QY

    This will type the letter 'Q' then 'Y' for the response to the
    confirm prompt.

        Boolean Logic

    Table U4-3 shows the Boolean Logic rules for eliminating excess
    product terms from the expanded equations, used by the logic
    reduction algorithms built into the CUPL compiler.

        Table U4-3. Boolean Logic Rules
    Expression         Result
    !0                  =      1
    !1                  =      0
    A & 0               =      0
    A & 1               =      A
    A & A               =      A
    A & !A              =      0
    A # 0               =      A
    A # 1               =      1
    A # A               =      A
    A # !A              =      1
    A & (A # B)         =      A
    A # (A & B)         =      A

    Device Selection

    This section will describe how to tell the CUPL compiler what target
    device to use.

    The development cycle, when designing with PLDs, is one of the first
    creating a source file and then compiling it to produce a JEDEC file
    which is then used to program an actual device.  The CUPL compiler
    is like any compiler in that it processes a source file and produces
    output based on a target architecture.  This compiler, however, has
    hundreds of different target architectures.  This affords great
    flexibility because it allows a design to be implemented in many
    different architectures without making significant changes to the
    source file.

    When we instruct the compiler to begin processing it must be suppled
    with several pieces of information. We must tell it what file
    contains the design equations, what type of output we want, and what
    device architecture is desired. It is the last part that we will
    discuss here.

        Device Mnemonics
    CUPL uses a naming system for device architectures called device
    mnemonics.  It is important to note that this naming system is for
    architectures, not for the devices themselves. For example, Altera
    EP312 and Intel 5AC312 both have the same architecture. Therefore,
    if you were doing a design with either of these devices from these
    manufacturers, you would tell CUPL that your target architecture is
    EP312.  There is an addendum containing a cross reference of
    manufacturers' names for devices with their corresponding CUPL
    mnemonic.

    LCC and PLCC Devices

    The default package type used by CUPL is the DIP package.  Some
    devices have LCC or PLCC versions.  These are sometimes referred to
    as Surface Mount Technology or SMT for short.  Although the
    architecture of the SMT devices are the same as the DIP versions,
    the pinouts are different.  For this reason, CUPL uses a different
    mnemonic for the SMT versions of device architectures.This involves
    adding the suffix "lcc" to the DIP mnemonic. The SMT version of the
    P16L8 is P16L8LCC.

    Specifying A Device
    There are three ways to specify a device to the compiler on the DOS
    platform.

    In the source PLD file

    On the command line (not
    available on Macintosh
    version)

    From the menu (currently available on DOS only).  On UNIX or VMS
    there are currently two ways to specify a device, via the command
    line or in the PLD file.  On the Macintosh the device is selected in
    the PLD file or from the device selection menu.

    Specifying a Device in the Source PLD File If desired, the target
    architecture may be specified in the PLD source file. This is done
    by using the "DEVICE" field in the header section of the PLD file.
    The PLD file contains a header section which is comprised of several
    fields.  Each field is composed of a keyword followed by some
    information.  The syntax of the "DEVICE" field is:

       DEVICE mnemonic;
    Example:
       DEVICE P16L8;

    When the device architecture is specified in the PLD file, it is not
    necessary to specify it again on the command line or from the menu.
    If a device mnemonic is specified on the command line or from the
    menu, the device mnemonic specified in the PLD file is ignored.
    Thus, the command line or menu device selection has a higher
    priority when it comes to specifying a device.

    Specifying A Device On the Command Line CUPL may be run from the
    command line or from a batch file or UNIX script. This command line
    contains option flags for directing the compiler in several ways.
    It also contains the name of the source file, an optional device
    library, and optionally, the device mnemonic.  The command line
    looks as follows:

    CUPL <flags> <source>

    CUPL <flags> <library>     <source>

    CUPL <flags> <mnemonic>    <source>

    CUPL <flags> <library>     <mnemonic> <source>.

    When a device is specified on the command line, this becomes the
    target architecture, regardless of what has been specified in the
    PLD file.

    Specifying A Device With the Menu From the main menu there is a menu
    item called "Device Selection".  Use the cursor keys to select this
    menu item and press the [ENTER] key. Find the category of the device
    you desire. This menu is sorted according to device mnemonics so you
    must know what mnemonic is desired before attempting the device
    selection process.  Keep descending the menu hierarchy until you
    find the device mnemonic you want. Use the cursor keys to highlight
    your selection and press [ENTER]. The device is now selected.

    Refer to Device Usage Notes for details on particular devices.