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Graphics Interchange Format  |  2003-09-23  |  30.7 KB  |  420x295  |  8-bit (253 colors)
   ocr: 2-way, S4KD Instruction Cache Predecode Branch Prediction 24-entry LI TLB/256-entry 2 TLB Cache Table Fetch/Decode Control x86 Instruction Decoders 3-Way A - 4 l Instruction Control Unit (72-entry) RERE Integer Scheduler (18-entry) FPU: Stack Map/Rename FPU Scheduler (36-entry) ErPU Register File (58-entry) IEU AGU IEU AGU IEU AGU Cache Bus Interface PADD FMUL 16-way Unit FStore MMX MMX 512KB JDNow DNOwI TTIT Load/Store Queue Unit Rn 2-way, 64KB Data Cache 40-entry L1 TLB/256-entry L2T TLB System Interface