Power-Programmierung/CD1.mdf/forth/compiler/fpc/tcom96/debugger/break96.seq

Text File | 1991-04-09 | 7.4 KB | 207 lines

\\ Break96.SEQ       Part of a debugger for Intel 80c196        by Mike Mayo
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$Header:   F:/tcom96/debugger/logs/break96.sev   1.0   23 Apr 1991 11:03:04   MikeM  $
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This is 80c196 target-specific stuff for the debugger.
It configures the breakpoint system to use the TRAP instruction.

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$Log:   F:/tcom96/debugger/logs/break96.sev  $
 \
 \    Rev 1.0   23 Apr 1991 11:03:04   MikeM
 \ Initial revision.
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{

$F7 value TRAP-INST     \ the target's breakpoint instruction
$C0 value targ-sp0      \ the target's parameter stack initial address

: untrap ( -- ) \ serial port command to return from a trap
        26 command
        ;

: tunbreak ( ta a -- )  \ remove trap from location ta
                        \ Data to restore into target is at a
        c@ swap tc!
        ;

: tsetbreak ( a ta -- ) \ Set a trap at location ta
                        \ Save data at that location into host at a
        dup tc@ rot c!          \ save byte at breakpoint
        trap-inst swap tc!      \ insert TRAP instruction
        ;

}       Here is the breakpoint register configuration
        There are 3 bytes per breakpoint for TMS320c14
Bytes 0,1       Address  ( 0 means not set )
Bytes 2         Saved byte, overwritten in the target by a TRAP instruction

{
2 value #breakregs      \ Maximum number of breakpoints allowed
1 value #trapbytes      \ Number of bytes occupied in the target by
                        \ the patched-in code at a breakpoint

}
─────────────────────────────────────────────────────────────────────────────
    Places to hold images of the registers that are sent back by
    the trap interrupt handler in the target.
─────────────────────────────────────────────────────────────────────────────
{
variable debugRS                \ stack pointer
debugRS         reg! =SP
debugRS         reg@ SP-@

variable debugflags
debugflags      reg! =flags
debugflags      reg@ flags-@

variable debugw2
debugw2         reg! =w2
debugw2         reg@ w2-@

variable debugw0
debugw0         reg! =w0
debugw0         reg@ w0-@

variable debugttos2
debugttos2      reg! =ttos2
debugttos2      reg@ ttos2-@

variable debugttos
debugttos       reg! =ttos
debugttos       reg@ ttos-@

variable debugpsp
debugpsp        reg! =psp
debugpsp        reg@ psp-@

variable debugtrapadr
debugtrapadr    reg! =trapadr
debugtrapadr    reg@ trapadr-@


}
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  words to copy the target stack after a TRAP, and before returning
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{
: read-break-stack ( a -- ) \ read in the machine state that is placed on
                            \ the stack after a TRAP
           dup t@    =W2
        2+ dup t@    =W0
        2+ dup t@    =TTOS2
        2+ dup t@    =TTOS
        2+ dup t@    =PSP
        2+ dup t@    =FLAGS
        2+ dup t@ 1- =TRAPADR   \ 1- so we get the address where the trap was
        2+           =SP
        ;

: restore-break-stack ( -- ) \ place values, possibly modified, back on the
                             \ machine stack before returning from a TRAP
        SP-@  2-
        TRAPADR-@       over t!  2-
        FLAGS-@         over t!  2-
        PSP-@           over t!  2-
        TTOS-@          over t!  2-
        TTOS2-@         over t!  2-
        W0-@            over t!  2-
        W2-@            swap t!
        ;
}
─────────────────────────────────────────────────────────────────────────────
    Branching analysis, used when setting breakpoints
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{
0 value nextonbranch

: branch-type ( -- type )
        \ return a number saying what type of branch is next, if any.
        \ Also compute branch destination

        TRAPADR-@
        dup tc@
        [ forth ]
                \ VARIOUS CONDITIONS AND EXITS
                \ type 0        non-branching instructions
                \ type 1        unconditional branch
                \ type 2        conditional branches
                \ type 3        calls

        dup $F8 and $28 = if    7 and 256 *             \ SCALL
                                over 1+ tc@ sext
                                + + 2+ =: nextonbranch
                                3 exit
                        then

        dup         $EF = if    drop                    \ LCALL
                                1+ dup  dup tc@ swap 1+ tc@ 256 * +
                                + 2+ =: nextonbranch
                                3 exit
                        then

        dup $F0 and $30 = if    drop                    \ bit conditionals
                                2+ dup tc@ sext
                                + 1+  =: nextonbranch
                                2 exit
                        then

        dup $F0 and $D0 = if    drop                    \ flag conditionals
                                1+ dup tc@ sext
                                + 1+  =: nextonbranch
                                2 exit
                        then

        dup $F8 and $20 = if    7 and 256 *             \ SJMP
                                over 1+ tc@ sext
                                + + 2+ =: nextonbranch
                                1 exit
                        then

        dup         $E3 = if    drop                    \ BR [ reg ]
                                1+ tc@
                                t@  =: nextonbranch
                                1 exit
                        then

        dup         $E7 = if    drop                    \ LJMP
                                1+ dup  dup tc@ swap 1+ tc@ 256 * +
                                + 2+ =: nextonbranch
                                1 exit
                        then

        dup         $F0 = if    2drop                   \ RET
                                SP-@  t@  =: nextonbranch
                                1 exit
                        then

        dup         $FF = if    2drop                   \ RESET
                                $2080  =: nextonbranch
                                1 exit
                        then

        2drop 0         \ everything else
        off> nextonbranch
        ;
}
─────────────────────────────────────────────────────────────────────────────
  Display the processor registers
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{
: .regs         ( -- )
        rplace 2@ at
        ."  \1W0" w0-@                  space h.4       rcr
        ."  \1W2" w2-@                  space h.4       rcr
        ."  \1TTOS" ttos-@              space h.4       rcr
        ."  \1TTOS2" ttos2-@            space h.4       rcr
        ."  \1StatusReg" flags-@        space h.4       rcr
        ."  ----------------"                           rcr
        ."  --------znvtc-is"                           rcr
        2 save!> base
        space
        flags-@ 0 <# 16 0 do # loop #> type
        restore> base
        ;