Source Code 1992 March

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Internet Message Format | 1990-12-28 | 44.1 KB

From: markz@ssc.UUCP (Mark Zenier) Newsgroups: alt.sources Subject: Frankenstein Cross Assemblers, Zilog Z80, Part 1 of 2 Message-ID: <618@ssc.UUCP> Date: 6 Dec 90 07:31:15 GMT ---- Cut Here and feed the following to sh ---- #!/bin/sh # This is Frankasm/Asz80, a shell archive (shar 3.43) # made 12/04/1990 08:46 UTC by markz@ssc.uucp # Source directory /usr/mark/frank.shar # # existing files will NOT be overwritten unless -c is specified # This format requires very little intelligence at unshar time. # "if test", "echo", "true", and "sed" may be needed. # # This shar contains: # length mode name # ------ ---------- ------------------------------------------ # 1731 -r--r----- asz80.1 # 12989 -r--r----- asz80.doc # 8176 -r--r----- asz80.tst # 18049 -r--r--r-- asz80.tut # 54934 -r--r--r-- asz80.y # # ============= asz80.1 ============== if test -f 'asz80.1' -a X"$1" != X"-c"; then echo 'x - skipping asz80.1 (File already exists)' else echo 'x - extracting asz80.1 (Text)' sed 's/^X//' << 'SHAR_EOF' > 'asz80.1' && X.TH Z80ASM 1L X.SH NAME Xas64180, asz80, as8085, as8080 \- cross assemblers for microcomputers X.SH SYNOPSIS X.nf Xas64180 [-p cpu] [-l listfile] [-o hexfile] [-d] [-s symbolfile] input Xasz80 [-p cpu] [-l listfile] [-o hexfile] [-d] [-s symbolfile] input Xas8085 [-p cpu] [-l listfile] [-o hexfile] [-d] [-s symbolfile] input Xas8080 [-p cpu] [-l listfile] [-o hexfile] [-d] [-s symbolfile] input X.fi X.SH DESCRIPTION XThe as64180, asz80, as8085, as8080 command(s) assembles the input file into a Xtext output file representing the program memory for a microcomputer. X XOptions X.IP "-p cpu" XOverride the instruction set selection. X.RS 10 XValid Values for Cpu X.RS 5 X64180, z80, Z80, 8085, 8085 X.RE X.RE X.IP "-l listfile" XOutput a file formated with the memory address, data, and source input lines. X.IP "-o hexfile" XOutput the memory data image in a form accepted by most prom programmers. X.IP "-h hexfile" XSame as \-o. X.IP \-d XSave the intermediate data file (see FILE) and abort the execution at the Xend of processing. X.IP "-s symbolfile" XPrint the symbol table values and names, one per line in the specified file. X.SH FILES X/usr/tmp/frtXXXXXX X.SH SEE ALSO XFrankenstein Cross Assemblers Users Manual (file base.doc) XAppendix for asz80 Frankenstein Assembler (file asz80.doc) X.SH NOTES XThere is only one input file. X XThe program can select which subset of instructions is accepted. XThe program first uses the name with which it is invoked. XThis is scanned for a substring which indicates which set to use. XThe -p options overrides this selction by performing the same substring Xsearch. XFinally the input file can select which subset to use with the CPU statement. X XThere should only be one executable file with all of its names linked to it. SHAR_EOF true || echo 'restore of asz80.1 failed' fi # ============= asz80.doc ============== if test -f 'asz80.doc' -a X"$1" != X"-c"; then echo 'x - skipping asz80.doc (File already exists)' else echo 'x - extracting asz80.doc (Text)' sed 's/^X//' << 'SHAR_EOF' > 'asz80.doc' && X.HM A 1 1 1 1 1 1 X.H 1 "Appendix for asz80 Frankenstein Assembler" X.H 2 "Pseudo Operations" X.H 3 "Standard Pseudo Operation Mnemonics" X.VL 40 5 1 X.LI "End" XEND X.LI "File Inclusion" XINCL XINCLUDE X.LI "If" XIF X.LI "Else" XELSE X.LI "End If" XENDI X.LI "Equate" XEQU X.LI "Set" XSETEQU X.LI "Org" XORG X.LI "Reserve Memory" XRESERVE XRMB X.LI "Define Byte Data" XBYTE XDB XFCB X.LI "Define Word Data" XDW XFDB XWORD X.LI "Define String Data" XFCC XSTRING X.LI "Define Character Set Translation" XCHARSET X.LI "Define Character Value" XCHARDEF XCHD X.LI "Use Character Translation" XCHARUSE X.LE X.H 3 "Machine Dependent Pseudo Operations" X.H 4 "Instruction Set Selection" X.DS I N XCPU string X.DE XThe instruction set can be specified in the source file with the CPU Xpseudooperation. XThe string, delimited by quotes or apostrophes, is scanned for a Xsubstring which selects which instruction set is used. XWhen the program is invoked, this operation is performed on the name of Xthe program, then the -p optional arguement, if any, and then any CPU Xstatements. XThe last one selects the which subset of the instructions the assembler will Xaccept. XThe instruction set can be changed at any place in the source file. X.VL 30 5 1 X.LI "Instruction Set" XSubstrings X.LI 64180 X180 X.LI z80 Xz80 XZ80 X.LI 8085 X85 X.LI 8080 X80 X.LE X.H 2 "Instructions" X.H 3 "Instruction List" X.TS H X; Xl l l. XOpcode Syntax Selection Criteria X.sp X.TH X.sp XADC dreg ',' dreg TSZ80PLUS|DRDESTHL|DRBC XADC dreg ',' dreg TSZ80PLUS|DRDESTHL|DRDE XADC dreg ',' dreg TSZ80PLUS|DRDESTHL|DRHL XADC dreg ',' dreg TSZ80PLUS|DRDESTHL|DRSP XADC reg8 ',' '(' DREGHL ')' REGISA XADC reg8 ',' index TSZ80PLUS|DRIX|REGISA XADC reg8 ',' index TSZ80PLUS|DRIY|REGISA XADC reg8 ',' reg8 0|REGISA XADC reg8 ',' topexpr REGISA X.sp XADD dreg ',' dreg DRDESTHL|DRBC XADD dreg ',' dreg DRDESTHL|DRDE XADD dreg ',' dreg DRDESTHL|DRHL XADD dreg ',' dreg DRDESTHL|DRSP XADD dreg ',' dreg TSZ80PLUS|DRDESTIX|DRBC XADD dreg ',' dreg TSZ80PLUS|DRDESTIX|DRDE XADD dreg ',' dreg TSZ80PLUS|DRDESTIX|DRIX XADD dreg ',' dreg TSZ80PLUS|DRDESTIX|DRSP XADD dreg ',' dreg TSZ80PLUS|DRDESTIY|DRBC XADD dreg ',' dreg TSZ80PLUS|DRDESTIY|DRDE XADD dreg ',' dreg TSZ80PLUS|DRDESTIY|DRIY XADD dreg ',' dreg TSZ80PLUS|DRDESTIY|DRSP XADD reg8 ',' '(' DREGHL ')' REGISA XADD reg8 ',' index TSZ80PLUS|DRIX|REGISA XADD reg8 ',' index TSZ80PLUS|DRIY|REGISA XADD reg8 ',' reg8 0|REGISA XADD reg8 ',' topexpr REGISA X.sp XAND '(' DREGHL ')' XAND index TSZ80PLUS|DRIX XAND index TSZ80PLUS|DRIY XAND reg8 XAND topexpr X.sp XBIT expr ',' '(' DREGHL ')' TSZ80PLUS XBIT expr ',' index TSZ80PLUS|DRIX XBIT expr ',' index TSZ80PLUS|DRIY XBIT expr ',' reg8 TSZ80PLUS X.sp XCALL condition ',' expr CCSELC XCALL condition ',' expr CCSELM XCALL condition ',' expr CCSELNC XCALL condition ',' expr CCSELNZ XCALL condition ',' expr CCSELP XCALL condition ',' expr CCSELPE XCALL condition ',' expr CCSELPO XCALL condition ',' expr CCSELZ XCALL expr X.sp XCCF X.sp XCP '(' DREGHL ')' XCP index TSZ80PLUS|DRIX XCP index TSZ80PLUS|DRIY XCP reg8 XCP topexpr X.sp XCPD TSZ80PLUS X.sp XCPDR TSZ80PLUS X.sp XCPI TSZ80PLUS X.sp XCPIR TSZ80PLUS X.sp XCPL X.sp XDAA X.sp XDEC '(' DREGHL ')' XDEC dreg DRBC XDEC dreg DRDE XDEC dreg DRHL XDEC dreg DRSP XDEC dreg TSZ80PLUS|DRIX XDEC dreg TSZ80PLUS|DRIY XDEC index TSZ80PLUS|DRIX XDEC index TSZ80PLUS|DRIY XDEC reg8 X.sp XDI X.sp XDJNZ topexpr X.sp XEI X.sp XEX '(' DREGSP ')' ',' dreg DRHL XEX '(' DREGSP ')' ',' dreg TSZ80PLUS|DRIX XEX '(' DREGSP ')' ',' dreg TSZ80PLUS|DRIY XEX dreg ',' dreg EX1DE|EX2HL XEX dreg ',' dreg TSZ80PLUS|EX1AF|EX2AF X.sp XEXX TSZ80PLUS X.sp XHALT X.sp XIM expr TSZ80PLUS|INTSETMODE0 XIM expr TSZ80PLUS|INTSETMODE1 XIM expr TSZ80PLUS|INTSETMODE2 X.sp XIN0 reg8 ',' '(' topexpr ')' TS64180 X.sp XIN reg8 ',' '(' REGC ')' TSZ80PLUS XIN reg8 ',' '(' topexpr ')' REGISA X.sp XINC '(' DREGHL ')' XINC dreg DRBC XINC dreg DRDE XINC dreg DRHL XINC dreg DRSP XINC dreg TSZ80PLUS|DRIX XINC dreg TSZ80PLUS|DRIY XINC index TSZ80PLUS|DRIX XINC index TSZ80PLUS|DRIY XINC reg8 X.sp XIND TSZ80PLUS X.sp XINDR TSZ80PLUS X.sp XINI TSZ80PLUS X.sp XINIR TSZ80PLUS X.sp XJP '(' dreg ')' DRHL XJP '(' dreg ')' TSZ80PLUS|DRIX XJP '(' dreg ')' TSZ80PLUS|DRIY XJP condition ',' expr CCSELC XJP condition ',' expr CCSELM XJP condition ',' expr CCSELNC XJP condition ',' expr CCSELNZ XJP condition ',' expr CCSELP XJP condition ',' expr CCSELPE XJP condition ',' expr CCSELPO XJP condition ',' expr CCSELZ XJP expr X.sp XJR condition ',' expr CCSELC|TSZ80PLUS XJR condition ',' expr CCSELNC|TSZ80PLUS XJR condition ',' expr CCSELNZ|TSZ80PLUS XJR condition ',' expr CCSELZ|TSZ80PLUS XJR expr TSZ80PLUS X.sp XLD '(' dreg ')' ',' reg8 DRBC|REGISA XLD '(' dreg ')' ',' reg8 DRDE|REGISA XLD '(' dreg ')' ',' reg8 DRHL XLD '(' dreg ')' ',' topexpr DRHL XLD '(' topexpr ')' ',' REGA XLD '(' topexpr ')' ',' dreg DRHL XLD '(' topexpr ')' ',' dreg TSZ80PLUS|DRBC XLD '(' topexpr ')' ',' dreg TSZ80PLUS|DRDE XLD '(' topexpr ')' ',' dreg TSZ80PLUS|DRIX XLD '(' topexpr ')' ',' dreg TSZ80PLUS|DRIY XLD '(' topexpr ')' ',' dreg TSZ80PLUS|DRSP XLD dreg ',' '(' topexpr ')' DRHL XLD dreg ',' '(' topexpr ')' TSZ80PLUS|DRBC XLD dreg ',' '(' topexpr ')' TSZ80PLUS|DRDE XLD dreg ',' '(' topexpr ')' TSZ80PLUS|DRIX XLD dreg ',' '(' topexpr ')' TSZ80PLUS|DRIY XLD dreg ',' '(' topexpr ')' TSZ80PLUS|DRSP XLD dreg ',' dreg TSZ80PLUS|DRHL|DRDESTSP XLD dreg ',' dreg TSZ80PLUS|DRIX|DRDESTSP XLD dreg ',' dreg TSZ80PLUS|DRIY|DRDESTSP XLD dreg ',' topexpr DRBC XLD dreg ',' topexpr DRDE XLD dreg ',' topexpr DRHL XLD dreg ',' topexpr DRSP XLD dreg ',' topexpr TSZ80PLUS|DRIX XLD dreg ',' topexpr TSZ80PLUS|DRIY XLD index ',' expr TSZ80PLUS|DRIX XLD index ',' expr TSZ80PLUS|DRIY XLD index ',' reg8 TSZ80PLUS|DRIX XLD index ',' reg8 TSZ80PLUS|DRIY XLD reg8 ',' '(' dreg ')' DRBC|REGISA XLD reg8 ',' '(' dreg ')' DRDE|REGISA XLD reg8 ',' '(' dreg ')' DRHL XLD reg8 ',' '(' topexpr ')' REGISA XLD reg8 ',' index TSZ80PLUS|DRIX XLD reg8 ',' index TSZ80PLUS|DRIY XLD reg8 ',' reg8 XLD reg8 ',' specialr TSZ80PLUS|SPECIALIR|REGISA XLD reg8 ',' specialr TSZ80PLUS|SPECIALRR|REGISA XLD reg8 ',' topexpr XLD specialr ',' REGA TSZ80PLUS|SPECIALIR XLD specialr ',' REGA TSZ80PLUS|SPECIALRR X.sp XLDD TSZ80PLUS X.sp XLDDR TSZ80PLUS X.sp XLDI TSZ80PLUS X.sp XLDIR TSZ80PLUS X.sp XMULT dreg TS64180|DRBC XMULT dreg TS64180|DRDE XMULT dreg TS64180|DRHL XMULT dreg TS64180|DRSP X.sp XNEG TSZ80PLUS X.sp XNOP X.sp XOR '(' DREGHL ')' XOR index TSZ80PLUS|DRIX XOR index TSZ80PLUS|DRIY XOR reg8 XOR topexpr X.sp XOTDM TS64180 X.sp XOTDMR TS64180 X.sp XOTDR TSZ80PLUS X.sp XOTIM TS64180 X.sp XOTIMR TS64180 X.sp XOTIR TSZ80PLUS X.sp XOUT0 '(' topexpr ')' ',' reg8 TS64180 X.sp XOUT '(' REGC ')' ',' reg8 TSZ80PLUS XOUT '(' topexpr ')' ',' reg8 REGISA X.sp XOUTD TSZ80PLUS X.sp XOUTI TSZ80PLUS X.sp XPOP dreg DRAF XPOP dreg DRBC XPOP dreg DRDE XPOP dreg DRHL XPOP dreg TSZ80PLUS|DRIX XPOP dreg TSZ80PLUS|DRIY X.sp XPUSH dreg DRAF XPUSH dreg DRBC XPUSH dreg DRDE XPUSH dreg DRHL XPUSH dreg TSZ80PLUS|DRIX XPUSH dreg TSZ80PLUS|DRIY X.sp XRES expr ',' '(' DREGHL ')' TSZ80PLUS XRES expr ',' index TSZ80PLUS|DRIX XRES expr ',' index TSZ80PLUS|DRIY XRES expr ',' reg8 TSZ80PLUS X.sp XRET XRET condition CCSELC XRET condition CCSELM XRET condition CCSELNC XRET condition CCSELNZ XRET condition CCSELP XRET condition CCSELPE XRET condition CCSELPO XRET condition CCSELZ X.sp XRETI TSZ80PLUS X.sp XRETN TSZ80PLUS X.sp XRIM CPU8085 X.sp XRL '(' DREGHL ')' TSZ80PLUS XRL index TSZ80PLUS|DRIX XRL index TSZ80PLUS|DRIY XRL reg8 TSZ80PLUS X.sp XRLA X.sp XRLC '(' DREGHL ')' TSZ80PLUS XRLC index TSZ80PLUS|DRIX XRLC index TSZ80PLUS|DRIY XRLC reg8 TSZ80PLUS X.sp XRLCA X.sp XRLD TSZ80PLUS X.sp XRR '(' DREGHL ')' TSZ80PLUS XRR index TSZ80PLUS|DRIX XRR index TSZ80PLUS|DRIY XRR reg8 TSZ80PLUS X.sp XRRA X.sp XRRC '(' DREGHL ')' TSZ80PLUS XRRC index TSZ80PLUS|DRIX XRRC index TSZ80PLUS|DRIY XRRC reg8 TSZ80PLUS X.sp XRRCA X.sp XRRD TSZ80PLUS X.sp XRST expr X.sp XSBC dreg ',' dreg TSZ80PLUS|DRDESTHL|DRBC XSBC dreg ',' dreg TSZ80PLUS|DRDESTHL|DRDE XSBC dreg ',' dreg TSZ80PLUS|DRDESTHL|DRHL XSBC dreg ',' dreg TSZ80PLUS|DRDESTHL|DRSP XSBC reg8 ',' '(' DREGHL ')' REGISA XSBC reg8 ',' index TSZ80PLUS|DRIX|REGISA XSBC reg8 ',' index TSZ80PLUS|DRIY|REGISA XSBC reg8 ',' reg8 0|REGISA XSBC reg8 ',' topexpr REGISA X.sp XSCF X.sp XSET expr ',' '(' DREGHL ')' TSZ80PLUS XSET expr ',' index TSZ80PLUS|DRIX XSET expr ',' index TSZ80PLUS|DRIY XSET expr ',' reg8 TSZ80PLUS X.sp XSIM CPU8085 X.sp XSLA '(' DREGHL ')' TSZ80PLUS XSLA index TSZ80PLUS|DRIX XSLA index TSZ80PLUS|DRIY XSLA reg8 TSZ80PLUS X.sp XSLP TS64180 X.sp XSRA '(' DREGHL ')' TSZ80PLUS XSRA index TSZ80PLUS|DRIX XSRA index TSZ80PLUS|DRIY XSRA reg8 TSZ80PLUS X.sp XSRL '(' DREGHL ')' TSZ80PLUS XSRL index TSZ80PLUS|DRIX XSRL index TSZ80PLUS|DRIY XSRL reg8 TSZ80PLUS X.sp XSUB '(' DREGHL ')' XSUB index TSZ80PLUS|DRIX XSUB index TSZ80PLUS|DRIY XSUB reg8 XSUB topexpr X.sp XTST '(' DREGHL ')' TS64180 XTST reg8 TS64180 XTST topexpr TS64180 X.sp XTSTIO topexpr TS64180 X.sp XXOR '(' DREGHL ')' XXOR index TSZ80PLUS|DRIX XXOR index TSZ80PLUS|DRIY XXOR reg8 XXOR topexpr X.TE X.H 3 "Selection Criteria Keywords" X.VL 25 5 X.LI CPU8085 XInstruction is only implemented for the 8085. X.LI TSZ80PLUS XInstruction is implemented in the z80 and 64180 instruction sets. X.LI TS64180 XInstruction is only implemented in the 64180 X.LI DRIX XInstruction refers to the IX index register X.LI DRIY XInstruction refers to the IY index register X.LI DRSP XInstruction refers to the Stack Pointer X.LI DRHL XInstruction refers to the HL register X.LI DRDE XInstruction refers to the DE register X.LI DRBC XInstruction refers to the BC register X.LI DRAF XInstruction refers to the AF concatenated register X.LI DRDESTSP XInstruction which refers to two double register operands, uses the Stack XPointer as the destination. X.LI DRDESTHL XInstruction which refers to two double register operands, uses the HL double Xregister as the destination. X.LI DRDESTIX XInstruction which refers to two double register operands, uses the IX index Xregister as the destination. X.LI DRDESTIY XInstruction which refers to two double register operands, uses the IY index Xregister as the destination. X.LI REGISA XInstruction is restricted to using the A register for an 8 bit register Xoperand. X.LI CCSELNZ XInstruction uses NonZero condition. X.LI CCSELZ XInstruction uses Zero condition. X.LI CCSELNC XInstruction uses No Carry condition. X.LI CCSELC XInstruction uses Carry condition. X.LI CCSELPO XInstruction uses Parity Odd condition. X.LI CCSELPE XInstruction uses Parity Even condition. X.LI CCSELP XInstruction uses Plus condition. X.LI CCSELM XInstruction uses Minus condition. X.LI EX1AF XFirst operand of an Ex instruction is the AF register. X.LI EX1DE XFirst operand of an Ex instruction is the DE register. X.LI EX2AF XSecond operand of an Ex instruction is the AF register. X.LI EX2HL XSecond operand of an Ex instruction is the HL register. X.LI SPECIALIR XInstruction uses the I special register. X.LI SPECIALRR XInstruction uses the R special register. X.LE X.H 3 "Apostrophes" XThe apostrophes in the syntax field are a notation used for the Xparser generator and are not put in the assembler source statement. X.H 2 "Notes" X.H 3 "Conditions" XConditions are represented by the reserved symbols z, nz, nc, pe, po, p, m, Xand c, and their uppercase versions. X.H 3 "Indexed Addressing" XIndex addressing uses the format "( index register + expression )" where Xindex register is IX or IY. X.H 3 "Top Expressions" XThe syntax of some of the instructions combined with the standard expression Xsyntax resulted in confusion whether an operand was an expression surrounded Xby parenthesis, or a memory reference. XTo get around this, the expressions in these ambiguous cases were restricted Xto those forms of expression that don't have surrounding parenthesis at the Xtop level. XSubexpressions may be parenthesized, but only if an operator seperates or Xprecedes the subexpression. X.DS I N XExample X.SP Xld a, (47h) ; load from memory address 0x47 Xld a, +(47h) ; load immediate value 0x47 Xld a, ((47h)) ; error X.DE X.H 3 "dreg, reg8, specialr" XDouble registers (dreg) are the set of symbols af, bc, de, hl, ix, iy, and sp Xand their uppercase versions. X.P XEight bit registers (reg8) are the set of symbols a, b, c, d, e, h, l, and Xtheir uppercase versions. X.P XSpecial registers are i, r, I, R. X.H 3 "Bit Numbers" XThe bit number expression in the BIT, RES, and SET operations has Xto have value defined when the instruction is read in the first pass. XThe value must be between 0 and 7. X.H 3 "Reserved Symbols" X.H 4 "Machine Dependent Reserved Symbols" XA XAF XB XBC XC XD XDE XE XH XHL XI XIX XIY XL XM XNC XNZ XP XPE XPO XR XSP XZ Xa Xaf Xb Xbc Xc Xd Xde Xe Xh Xhl Xi Xix Xiy Xl Xm Xnc Xnz Xp Xpe Xpo Xr Xsp Xz X.H 4 "Standard Reserved Symbols" XAND XDEFINED XEQ XGE XGT XHIGH XLE XLOW XLT XMOD XNE XNOT XOR XSHL XSHR XXOR Xand Xdefined Xeq Xge Xgt Xhigh Xle Xlow Xlt Xmod Xne Xnot Xor Xshl Xshr Xxor X.TC 1 1 7 SHAR_EOF true || echo 'restore of asz80.doc failed' fi # ============= asz80.tst ============== if test -f 'asz80.tst' -a X"$1" != X"-c"; then echo 'x - skipping asz80.tst (File already exists)' else echo 'x - extracting asz80.tst (Text)' sed 's/^X//' << 'SHAR_EOF' > 'asz80.tst' && X cpu "64180" Xdisp equ 43 Ximmed equ 77 Ximmed16 equ 987 X adc a, (hl) X adc a, (ix+disp) X adc a, (iy+disp) X adc a, a X adc a, b X adc a, c X adc a, d X adc a, e X adc a, h X adc a, immed X adc a, l X adc hl, bc X adc hl, de X adc hl, hl X adc hl, sp X add a, (hl) X add a, (ix+disp) X add a, (iy+disp) X add a, a X add a, b X add a, c X add a, d X add a, e X add a, h X add a, immed X add a, l X add hl, bc X add hl, de X add hl, hl X add hl, sp X add ix, bc X add ix, de X add ix, ix X add ix, sp X add iy, bc X add iy, de X add iy, iy X add iy, sp X and (hl) X and (ix+disp) X and (iy+disp) X and a X and b X and c X and d X and e X and h X and immed X and l X bit 0, (hl) X bit 0, (ix+disp) X bit 0, (iy+disp) X bit 0, a X bit 0, b X bit 0, c X bit 0, d X bit 0, e X bit 0, h X bit 0, l X bit 1, (hl) X bit 1, (ix+disp) X bit 1, (iy+disp) X bit 1, a X bit 1, b X bit 1, c X bit 1, d X bit 1, e X bit 1, h X bit 1, l X bit 2, (hl) X bit 2, (ix+disp) X bit 2, (iy+disp) X bit 2, a X bit 2, b X bit 2, c X bit 2, d X bit 2, e X bit 2, h X bit 2, l X bit 3, (hl) X bit 3, (ix+disp) X bit 3, (iy+disp) X bit 3, a X bit 3, b X bit 3, c X bit 3, d X bit 3, e X bit 3, h X bit 3, l X bit 4, (hl) X bit 4, (ix+disp) X bit 4, (iy+disp) X bit 4, a X bit 4, b X bit 4, c X bit 4, d X bit 4, e X bit 4, h X bit 4, l X bit 5, (hl) X bit 5, (ix+disp) X bit 5, (iy+disp) X bit 5, a X bit 5, b X bit 5, c X bit 5, d X bit 5, e X bit 5, h X bit 5, l X bit 6, (hl) X bit 6, (ix+disp) X bit 6, (iy+disp) X bit 6, a X bit 6, b X bit 6, c X bit 6, d X bit 6, e X bit 6, h X bit 6, l X bit 7, (hl) X bit 7, (ix+disp) X bit 7, (iy+disp) X bit 7, a X bit 7, b X bit 7, c X bit 7, d X bit 7, e X bit 7, h X bit 7, l X call addr X call c, addr X call m, addr X call nc, addr Xaddr call nz, addr X call p, addr X call pe, addr X call po, addr X call z, addr X ccf X cp (hl) X cp (ix+disp) X cp (iy+disp) X cp a X cp b X cp c X cp d X cp e X cp h X cp immed X cp l X cpd X cpdr X cpi X cpir X cpl X daa X dec (hl) X dec (ix+disp) X dec (iy+disp) X dec a X dec b X dec bc X dec c X dec d X dec de X dec e X dec h X dec hl X dec ix Xaddrd dec iy X dec l X dec sp X di X djnz addrd X ei X ex ( sp ) , hl X ex ( sp ) , ix X ex ( sp ) , iy X ex af, af X ex de, hl X exx X halt X im 0 X im 1 X im 2 X in a, ( c ) X in a, ( immed ) X in b, ( c ) X in c, ( c ) X in d, ( c ) X in e, ( c ) X in h, ( c ) X in l, ( c ) X in0 a, ( immed ) X in0 b, ( immed ) X in0 c, ( immed ) X in0 d, ( immed ) X in0 e, ( immed ) X in0 h, ( immed ) X in0 l, ( immed ) X inc (hl) X inc (ix+disp) X inc (iy+disp) X inc a X inc b X inc bc X inc c X inc d X inc de X inc e X inc h X inc hl X inc ix X inc iy X inc l X inc sp X ind X indr X ini X inir X jp ( hl ) X jp ( ix ) X jp ( iy ) X jp addrj X jp c, addrj X jp m, addrj X jp nc, addrj X jp nz, addrj X jp p, addrj Xaddrj jp pe, addrj X jp po, addrj X jp z, addrj X jr addrj X jr c, addrj X jr nc, addrj X jr nz, addrj X jr z, addrj X ld ( addr ) , a X ld ( addr ) , bc X ld ( addr ) , de X ld ( addr ) , hl X ld ( addr ) , hl X ld ( addr ) , ix X ld ( addr ) , iy X ld ( addr ) , sp X ld ( bc ) , a X ld ( de ) , a X ld (hl), a X ld (hl), b X ld (hl), c X ld (hl), d X ld (hl), e X ld (hl), h X ld (hl), immed X ld (hl), l X ld (ix+disp), a X ld (ix+disp), b X ld (ix+disp), c X ld (ix+disp), d X ld (ix+disp), e X ld (ix+disp), h X ld (ix+disp), immed X ld (ix+disp), l X ld (iy+disp), a X ld (iy+disp), b X ld (iy+disp), c X ld (iy+disp), d X ld (iy+disp), e X ld (iy+disp), h X ld (iy+disp), immed X ld (iy+disp), l X ld a, ( addr ) X ld a, ( bc ) X ld a, ( de ) X ld a, (hl) X ld a, (ix+disp) X ld a, (iy+disp) X ld a, a X ld a, b X ld a, c X ld a, d X ld a, e X ld a, h X ld a, i X ld a, immed X ld a, l X ld a, r X ld b, (hl) X ld b, (ix+disp) X ld b, (iy+disp) X ld b, a X ld b, b X ld b, c X ld b, d X ld b, e X ld b, h X ld b, immed X ld b, l X ld bc, ( addr ) X ld bc, immed16 X ld c, (hl) X ld c, (ix+disp) X ld c, (iy+disp) X ld c, a X ld c, b X ld c, c X ld c, d X ld c, e X ld c, h X ld c, immed X ld c, l X ld d, (hl) X ld d, (ix+disp) X ld d, (iy+disp) X ld d, a X ld d, b X ld d, c X ld d, d X ld d, e X ld d, h X ld d, immed X ld d, l X ld de, ( addr ) X ld de, immed16 X ld e, (hl) X ld e, (ix+disp) X ld e, (iy+disp) X ld e, a X ld e, b X ld e, c X ld e, d X ld e, e X ld e, h X ld e, immed X ld e, l X ld h, (hl) X ld h, (ix+disp) X ld h, (iy+disp) X ld h, a X ld h, b X ld h, c X ld h, d X ld h, e X ld h, h X ld h, immed X ld h, l X ld hl, ( addr ) X ld hl, ( addr ) X ld hl, immed16 X ld hl, immed16 X ld i, a X ld ix, ( addr ) X ld ix, immed16 X ld iy, ( addr ) X ld iy, immed16 X ld l, (hl) X ld l, (ix+disp) X ld l, (iy+disp) X ld l, a X ld l, b X ld l, c X ld l, d X ld l, e X ld l, h X ld l, immed X ld l, l X ld r, a X ld sp, ( addr ) X ld sp, hl X ld sp, immed16 X ld sp, ix X ld sp, iy X ldd X lddr X ldi X ldir X mult bc X mult de X mult hl X mult sp X neg X nop X or (hl) X or (ix+disp) X or (iy+disp) X or a X or b X or c X or d X or e X or h X or immed X or l X otdm X otdmr X otdr X otim X otimr X otir X out ( c ) , a X out ( c ) , b X out ( c ) , c X out ( c ) , d X out ( c ) , e X out ( c ) , h X out ( c ) , l X out ( immed ) , a X out0 ( immed ) , a X out0 ( immed ) , b X out0 ( immed ) , c X out0 ( immed ) , d X out0 ( immed ) , e X out0 ( immed ) , h X out0 ( immed ) , l X outd X outi X pop af X pop bc X pop de X pop hl X pop ix X pop iy X push af X push bc X push de X push hl X push ix X push iy X res 0, (hl) X res 0, (ix+disp) X res 0, (iy+disp) X res 0, a X res 0, b X res 0, c X res 0, d X res 0, e X res 0, h X res 0, l X res 1, (hl) X res 1, (ix+disp) X res 1, (iy+disp) X res 1, a X res 1, b X res 1, c X res 1, d X res 1, e X res 1, h X res 1, l X res 2, (hl) X res 2, (ix+disp) X res 2, (iy+disp) X res 2, a X res 2, b X res 2, c X res 2, d X res 2, e X res 2, h X res 2, l X res 3, (hl) X res 3, (ix+disp) X res 3, (iy+disp) X res 3, a X res 3, b X res 3, c X res 3, d X res 3, e X res 3, h X res 3, l X res 4, (hl) X res 4, (ix+disp) X res 4, (iy+disp) X res 4, a X res 4, b X res 4, c X res 4, d X res 4, e X res 4, h X res 4, l X res 5, (hl) X res 5, (ix+disp) X res 5, (iy+disp) X res 5, a X res 5, b X res 5, c X res 5, d X res 5, e X res 5, h X res 5, l X res 6, (hl) X res 6, (ix+disp) X res 6, (iy+disp) X res 6, a X res 6, b X res 6, c X res 6, d X res 6, e X res 6, h X res 6, l X res 7, (hl) X res 7, (ix+disp) X res 7, (iy+disp) X res 7, a X res 7, b X res 7, c X res 7, d X res 7, e X res 7, h X res 7, l X ret X ret c X ret m X ret nc X ret nz X ret p X ret pe X ret po X ret z X reti X retn X rl (hl) X rl (ix+disp) X rl (iy+disp) X rl a X rl b X rl c X rl d X rl e X rl h X rl l X rla X rlc (hl) X rlc (ix+disp) X rlc (iy+disp) X rlc a X rlc b X rlc c X rlc d X rlc e X rlc h X rlc l X rlca X rld X rr (hl) X rr (ix+disp) X rr (iy+disp) X rr a X rr b X rr c X rr d X rr e X rr h X rr l X rra X rrc (hl) X rrc (ix+disp) X rrc (iy+disp) X rrc a X rrc b X rrc c X rrc d X rrc e X rrc h X rrc l X rrca X rrd X rst 0 X rst 16 X rst 24 X rst 32 X rst 40 X rst 48 X rst 56 X rst 8 X sbc a, (hl) X sbc a, (ix+disp) X sbc a, (iy+disp) X sbc a, a X sbc a, b X sbc a, c X sbc a, d X sbc a, e X sbc a, h X sbc a, immed X sbc a, l X sbc hl, bc X sbc hl, de X sbc hl, hl X sbc hl, sp X scf X set 0, (hl) X set 0, (ix+disp) X set 0, (iy+disp) X set 0, a X set 0, b X set 0, c X set 0, d X set 0, e X set 0, h X set 0, l X set 1, (hl) X set 1, (ix+disp) X set 1, (iy+disp) X set 1, a X set 1, b X set 1, c X set 1, d X set 1, e X set 1, h X set 1, l X set 2, (hl) X set 2, (ix+disp) X set 2, (iy+disp) X set 2, a X set 2, b X set 2, c X set 2, d X set 2, e X set 2, h X set 2, l X set 3, (hl) X set 3, (ix+disp) X set 3, (iy+disp) X set 3, a X set 3, b X set 3, c X set 3, d X set 3, e X set 3, h X set 3, l X set 4, (hl) X set 4, (ix+disp) X set 4, (iy+disp) X set 4, a X set 4, b X set 4, c X set 4, d X set 4, e X set 4, h X set 4, l X set 5, (hl) X set 5, (ix+disp) X set 5, (iy+disp) X set 5, a X set 5, b X set 5, c X set 5, d X set 5, e X set 5, h X set 5, l X set 6, (hl) X set 6, (ix+disp) X set 6, (iy+disp) X set 6, a X set 6, b X set 6, c X set 6, d X set 6, e X set 6, h X set 6, l X set 7, (hl) X set 7, (ix+disp) X set 7, (iy+disp) X set 7, a X set 7, b X set 7, c X set 7, d X set 7, e X set 7, h X set 7, l X sla (hl) X sla (ix+disp) X sla (iy+disp) X sla a X sla b X sla c X sla d X sla e X sla h X sla l X slp X sra (hl) X sra (ix+disp) X sra (iy+disp) X sra a X sra b X sra c X sra d X sra e X sra h X sra l X srl (hl) X srl (ix+disp) X srl (iy+disp) X srl a X srl b X srl c X srl d X srl e X srl h X srl l X sub (hl) X sub (ix+disp) X sub (iy+disp) X sub a X sub b X sub c X sub d X sub e X sub h X sub immed X sub l X tst ( hl ) X tst a X tst b X tst c X tst d X tst e X tst h X tst immed X tst l X tstio immed X xor (hl) X xor (ix+disp) X xor (iy+disp) X xor a X xor b X xor c X xor d X xor e X xor h X xor immed X xor l SHAR_EOF true || echo 'restore of asz80.tst failed' fi # ============= asz80.tut ============== if test -f 'asz80.tut' -a X"$1" != X"-c"; then echo 'x - skipping asz80.tut (File already exists)' else echo 'x - extracting asz80.tut (Text)' sed 's/^X//' << 'SHAR_EOF' > 'asz80.tut' && X0000002b disp 0000004d immed 000003db immed16 X00000118 addr 00000154 addrd 000001c5 addrj X cpu "64180" X 0x2b disp equ 43 X 0x4d immed equ 77 X 0x3db immed16 equ 987 X0000 8e adc a, (hl) X0001 dd 8e 2b adc a, (ix+disp) X0004 fd 8e 2b adc a, (iy+disp) X0007 8f adc a, a X0008 88 adc a, b X0009 89 adc a, c X000a 8a adc a, d X000b 8b adc a, e X000c 8c adc a, h X000d ce 4d adc a, immed X000f 8d adc a, l X0010 ed 4a adc hl, bc X0012 ed 5a adc hl, de X0014 ed 6a adc hl, hl X0016 ed 7a adc hl, sp X0018 86 add a, (hl) X0019 dd 86 2b add a, (ix+disp) X001c fd 86 2b add a, (iy+disp) X001f 87 add a, a X0020 80 add a, b X0021 81 add a, c X0022 82 add a, d X0023 83 add a, e X0024 84 add a, h X0025 c6 4d add a, immed X0027 85 add a, l X0028 09 add hl, bc X0029 19 add hl, de X002a 29 add hl, hl X002b 39 add hl, sp X002c dd 09 add ix, bc X002e dd 19 add ix, de X0030 dd 29 add ix, ix X0032 dd 39 add ix, sp X0034 fd 09 add iy, bc X0036 fd 19 add iy, de X0038 fd 29 add iy, iy X003a fd 39 add iy, sp X003c a6 and (hl) X003d dd a6 2b and (ix+disp) X0040 fd a6 2b and (iy+disp) X0043 a7 and a X0044 a0 and b X0045 a1 and c X0046 a2 and d X0047 a3 and e X0048 a4 and h X0049 e6 4d and immed X004b a5 and l X004c cb 46 bit 0, (hl) X004e dd cb 2b 46 bit 0, (ix+disp) X0052 fd cb 2b 46 bit 0, (iy+disp) X0056 cb 47 bit 0, a X0058 cb 40 bit 0, b X005a cb 41 bit 0, c X005c cb 42 bit 0, d X005e cb 43 bit 0, e X0060 cb 44 bit 0, h X0062 cb 45 bit 0, l X0064 cb 4e bit 1, (hl) X0066 dd cb 2b 4e bit 1, (ix+disp) X006a fd cb 2b 4e bit 1, (iy+disp) X006e cb 4f bit 1, a X0070 cb 48 bit 1, b X0072 cb 49 bit 1, c X0074 cb 4a bit 1, d X0076 cb 4b bit 1, e X0078 cb 4c bit 1, h X007a cb 4d bit 1, l X007c cb 56 bit 2, (hl) X007e dd cb 2b 56 bit 2, (ix+disp) X0082 fd cb 2b 56 bit 2, (iy+disp) X0086 cb 57 bit 2, a X0088 cb 50 bit 2, b X008a cb 51 bit 2, c X008c cb 52 bit 2, d X008e cb 53 bit 2, e X0090 cb 54 bit 2, h X0092 cb 55 bit 2, l X0094 cb 5e bit 3, (hl) X0096 dd cb 2b 5e bit 3, (ix+disp) X009a fd cb 2b 5e bit 3, (iy+disp) X009e cb 5f bit 3, a X00a0 cb 58 bit 3, b X00a2 cb 59 bit 3, c X00a4 cb 5a bit 3, d X00a6 cb 5b bit 3, e X00a8 cb 5c bit 3, h X00aa cb 5d bit 3, l X00ac cb 66 bit 4, (hl) X00ae dd cb 2b 66 bit 4, (ix+disp) X00b2 fd cb 2b 66 bit 4, (iy+disp) X00b6 cb 67 bit 4, a X00b8 cb 60 bit 4, b X00ba cb 61 bit 4, c X00bc cb 62 bit 4, d X00be cb 63 bit 4, e X00c0 cb 64 bit 4, h X00c2 cb 65 bit 4, l X00c4 cb 6e bit 5, (hl) X00c6 dd cb 2b 6e bit 5, (ix+disp) X00ca fd cb 2b 6e bit 5, (iy+disp) X00ce cb 6f bit 5, a X00d0 cb 68 bit 5, b X00d2 cb 69 bit 5, c X00d4 cb 6a bit 5, d X00d6 cb 6b bit 5, e X00d8 cb 6c bit 5, h X00da cb 6d bit 5, l X00dc cb 76 bit 6, (hl) X00de dd cb 2b 76 bit 6, (ix+disp) X00e2 fd cb 2b 76 bit 6, (iy+disp) X00e6 cb 77 bit 6, a X00e8 cb 70 bit 6, b X00ea cb 71 bit 6, c X00ec cb 72 bit 6, d X00ee cb 73 bit 6, e X00f0 cb 74 bit 6, h X00f2 cb 75 bit 6, l X00f4 cb 7e bit 7, (hl) X00f6 dd cb 2b 7e bit 7, (ix+disp) X00fa fd cb 2b 7e bit 7, (iy+disp) X00fe cb 7f bit 7, a X0100 cb 78 bit 7, b X0102 cb 79 bit 7, c X0104 cb 7a bit 7, d X0106 cb 7b bit 7, e X0108 cb 7c bit 7, h X010a cb 7d bit 7, l X010c cd 18 01 call addr X010f dc 18 01 call c, addr X0112 fc 18 01 call m, addr X0115 d4 18 01 call nc, addr X0118 c4 18 01 addr call nz, addr X011b f4 18 01 call p, addr X011e ec 18 01 call pe, addr X0121 e4 18 01 call po, addr X0124 cc 18 01 call z, addr X0127 3f ccf X0128 be cp (hl) X0129 dd be 2b cp (ix+disp) X012c fd be 2b cp (iy+disp) X012f bf cp a X0130 b8 cp b X0131 b9 cp c X0132 ba cp d X0133 bb cp e X0134 bc cp h X0135 fe 4d cp immed X0137 bd cp l X0138 ed a9 cpd X013a ed b9 cpdr X013c ed a1 cpi X013e ed b1 cpir X0140 2f cpl X0141 27 daa X0142 35 dec (hl) X0143 dd 35 2b dec (ix+disp) X0146 fd 35 2b dec (iy+disp) X0149 3d dec a X014a 05 dec b X014b 0b dec bc X014c 0d dec c X014d 15 dec d X014e 1b dec de X014f 1d dec e X0150 25 dec h X0151 2b dec hl X0152 dd 2b dec ix X0154 fd 2b addrd dec iy X0156 2d dec l X0157 3b dec sp X0158 f3 di X0159 10 f9 djnz addrd X015b fb ei X015c e3 ex ( sp ) , hl X015d dd e3 ex ( sp ) , ix X015f fd e3 ex ( sp ) , iy X0161 08 ex af, af X0162 eb ex de, hl X0163 d9 exx X0164 76 halt X0165 ed 46 im 0 X0167 ed 56 im 1 X0169 ed 5e im 2 X016b ed 78 in a, ( c ) X016d db 4d in a, ( immed ) X016f ed 40 in b, ( c ) X0171 ed 48 in c, ( c ) X0173 ed 50 in d, ( c ) X0175 ed 58 in e, ( c ) X0177 ed 60 in h, ( c ) X0179 ed 68 in l, ( c ) X017b ed 38 4d in0 a, ( immed ) X017e ed 00 4d in0 b, ( immed ) X0181 ed 08 4d in0 c, ( immed ) X0184 ed 10 4d in0 d, ( immed ) X0187 ed 18 4d in0 e, ( immed ) X018a ed 20 4d in0 h, ( immed ) X018d ed 28 4d in0 l, ( immed ) X0190 34 inc (hl) X0191 dd 34 2b inc (ix+disp) X0194 fd 34 2b inc (iy+disp) X0197 3c inc a X0198 04 inc b X0199 03 inc bc X019a 0c inc c X019b 14 inc d X019c 13 inc de X019d 1c inc e X019e 24 inc h X019f 23 inc hl X01a0 dd 23 inc ix X01a2 fd 23 inc iy X01a4 2c inc l X01a5 33 inc sp X01a6 ed aa ind X01a8 ed ba indr X01aa ed a2 ini X01ac ed b2 inir X01ae e9 jp ( hl ) X01af dd e9 jp ( ix ) X01b1 fd e9 jp ( iy ) X01b3 c3 c5 01 jp addrj X01b6 da c5 01 jp c, addrj X01b9 fa c5 01 jp m, addrj X01bc d2 c5 01 jp nc, addrj X01bf c2 c5 01 jp nz, addrj X01c2 f2 c5 01 jp p, addrj X01c5 ea c5 01 addrj jp pe, addrj X01c8 e2 c5 01 jp po, addrj X01cb ca c5 01 jp z, addrj X01ce 18 f5 jr addrj X01d0 38 f3 jr c, addrj X01d2 30 f1 jr nc, addrj X01d4 20 ef jr nz, addrj X01d6 28 ed jr z, addrj X01d8 32 18 01 ld ( addr ) , a X01db ed 43 18 01 ld ( addr ) , bc X01df ed 53 18 01 ld ( addr ) , de X01e3 22 18 01 ld ( addr ) , hl X01e6 22 18 01 ld ( addr ) , hl X01e9 dd 22 18 01 ld ( addr ) , ix X01ed fd 22 18 01 ld ( addr ) , iy X01f1 ed 73 18 01 ld ( addr ) , sp X01f5 02 ld ( bc ) , a X01f6 12 ld ( de ) , a X01f7 77 ld (hl), a X01f8 70 ld (hl), b X01f9 71 ld (hl), c X01fa 72 ld (hl), d X01fb 73 ld (hl), e X01fc 74 ld (hl), h X01fd 36 4d ld (hl), immed X01ff 75 ld (hl), l X0200 dd 77 2b ld (ix+disp), a X0203 dd 70 2b ld (ix+disp), b X0206 dd 71 2b ld (ix+disp), c X0209 dd 72 2b ld (ix+disp), d X020c dd 73 2b ld (ix+disp), e X020f dd 74 2b ld (ix+disp), h X0212 dd 36 2b 4d ld (ix+disp), immed X0216 dd 75 2b ld (ix+disp), l X0219 fd 77 2b ld (iy+disp), a X021c fd 70 2b ld (iy+disp), b X021f fd 71 2b ld (iy+disp), c X0222 fd 72 2b ld (iy+disp), d X0225 fd 73 2b ld (iy+disp), e X0228 fd 74 2b ld (iy+disp), h X022b fd 36 2b 4d ld (iy+disp), immed X022f fd 75 2b ld (iy+disp), l X0232 3a 18 01 ld a, ( addr ) X0235 0a ld a, ( bc ) X0236 1a ld a, ( de ) X0237 7e ld a, (hl) X0238 dd 7e 2b ld a, (ix+disp) X023b fd 7e 2b ld a, (iy+disp) X023e 7f ld a, a X023f 78 ld a, b X0240 79 ld a, c X0241 7a ld a, d X0242 7b ld a, e X0243 7c ld a, h X0244 ed 57 ld a, i X0246 3e 4d ld a, immed X0248 7d ld a, l X0249 ed 5f ld a, r X024b 46 ld b, (hl) X024c dd 46 2b ld b, (ix+disp) X024f fd 46 2b ld b, (iy+disp) X0252 47 ld b, a X0253 40 ld b, b X0254 41 ld b, c X0255 42 ld b, d X0256 43 ld b, e X0257 44 ld b, h X0258 06 4d ld b, immed X025a 45 ld b, l X025b ed 4b 18 01 ld bc, ( addr ) X025f 01 db 03 ld bc, immed16 X0262 4e ld c, (hl) X0263 dd 4e 2b ld c, (ix+disp) X0266 fd 4e 2b ld c, (iy+disp) X0269 4f ld c, a X026a 48 ld c, b X026b 49 ld c, c X026c 4a ld c, d X026d 4b ld c, e X026e 4c ld c, h X026f 0e 4d ld c, immed X0271 4d ld c, l X0272 56 ld d, (hl) X0273 dd 56 2b ld d, (ix+disp) X0276 fd 56 2b ld d, (iy+disp) X0279 57 ld d, a X027a 50 ld d, b X027b 51 ld d, c X027c 52 ld d, d X027d 53 ld d, e X027e 54 ld d, h X027f 16 4d ld d, immed X0281 55 ld d, l X0282 ed 5b 18 01 ld de, ( addr ) X0286 11 db 03 ld de, immed16 X0289 5e ld e, (hl) X028a dd 5e 2b ld e, (ix+disp) X028d fd 5e 2b ld e, (iy+disp) X0290 5f ld e, a X0291 58 ld e, b X0292 59 ld e, c X0293 5a ld e, d X0294 5b ld e, e X0295 5c ld e, h X0296 1e 4d ld e, immed X0298 5d ld e, l X0299 66 ld h, (hl) X029a dd 66 2b ld h, (ix+disp) X029d fd 66 2b ld h, (iy+disp) X02a0 67 ld h, a X02a1 60 ld h, b X02a2 61 ld h, c X02a3 62 ld h, d X02a4 63 ld h, e X02a5 64 ld h, h X02a6 26 4d ld h, immed X02a8 65 ld h, l X02a9 2a 18 01 ld hl, ( addr ) X02ac 2a 18 01 ld hl, ( addr ) X02af 21 db 03 ld hl, immed16 X02b2 21 db 03 ld hl, immed16 X02b5 ed 47 ld i, a X02b7 dd 2a 18 01 ld ix, ( addr ) X02bb dd 21 db 03 ld ix, immed16 X02bf fd 2a 18 01 ld iy, ( addr ) X02c3 fd 21 db 03 ld iy, immed16 X02c7 6e ld l, (hl) X02c8 dd 6e 2b ld l, (ix+disp) X02cb fd 6e 2b ld l, (iy+disp) X02ce 6f ld l, a X02cf 68 ld l, b X02d0 69 ld l, c X02d1 6a ld l, d X02d2 6b ld l, e X02d3 6c ld l, h X02d4 2e 4d ld l, immed X02d6 6d ld l, l X02d7 ed 4f ld r, a X02d9 ed 7b 18 01 ld sp, ( addr ) X02dd f9 ld sp, hl X02de 31 db 03 ld sp, immed16 X02e1 dd f9 ld sp, ix X02e3 fd f9 ld sp, iy X02e5 ed a8 ldd X02e7 ed b8 lddr X02e9 ed a0 ldi X02eb ed b0 ldir X02ed ed 4c mult bc X02ef ed 5c mult de X02f1 ed 6c mult hl X02f3 ed 7c mult sp X02f5 ed 44 neg X02f7 00 nop X02f8 b6 or (hl) X02f9 dd b6 2b or (ix+disp) X02fc fd b6 2b or (iy+disp) X02ff b7 or a X0300 b0 or b X0301 b1 or c X0302 b2 or d X0303 b3 or e X0304 b4 or h X0305 f6 4d or immed X0307 b5 or l X0308 ed 8b otdm X030a ed 9b otdmr X030c ed bb otdr X030e ed 83 otim X0310 ed 93 otimr X0312 ed b3 otir X0314 ed 79 out ( c ) , a X0316 ed 41 out ( c ) , b X0318 ed 49 out ( c ) , c X031a ed 51 out ( c ) , d X031c ed 59 out ( c ) , e X031e ed 61 out ( c ) , h X0320 ed 69 out ( c ) , l X0322 d3 4d out ( immed ) , a X0324 ed 39 4d out0 ( immed ) , a X0327 ed 01 4d out0 ( immed ) , b X032a ed 09 4d out0 ( immed ) , c X032d ed 11 4d out0 ( immed ) , d X0330 ed 19 4d out0 ( immed ) , e X0333 ed 21 4d out0 ( immed ) , h X0336 ed 29 4d out0 ( immed ) , l X0339 ed ab outd X033b ed a3 outi X033d f1 pop af X033e c1 pop bc X033f d1 pop de X0340 e1 pop hl X0341 dd e1 pop ix X0343 fd e1 pop iy X0345 f5 push af X0346 c5 push bc X0347 d5 push de X0348 e5 push hl X0349 dd e5 push ix X034b fd e5 push iy X034d cb 86 res 0, (hl) X034f dd cb 2b 86 res 0, (ix+disp) X0353 fd cb 2b 86 res 0, (iy+disp) X0357 cb 87 res 0, a X0359 cb 80 res 0, b X035b cb 81 res 0, c X035d cb 82 res 0, d X035f cb 83 res 0, e X0361 cb 84 res 0, h X0363 cb 85 res 0, l X0365 cb 8e res 1, (hl) X0367 dd cb 2b 8e res 1, (ix+disp) X036b fd cb 2b 8e res 1, (iy+disp) X036f cb 8f res 1, a X0371 cb 88 res 1, b X0373 cb 89 res 1, c X0375 cb 8a res 1, d X0377 cb 8b res 1, e X0379 cb 8c res 1, h X037b cb 8d res 1, l X037d cb 96 res 2, (hl) X037f dd cb 2b 96 res 2, (ix+disp) X0383 fd cb 2b 96 res 2, (iy+disp) X0387 cb 97 res 2, a X0389 cb 90 res 2, b X038b cb 91 res 2, c X038d cb 92 res 2, d X038f cb 93 res 2, e X0391 cb 94 res 2, h X0393 cb 95 res 2, l X0395 cb 9e res 3, (hl) X0397 dd cb 2b 9e res 3, (ix+disp) X039b fd cb 2b 9e res 3, (iy+disp) X039f cb 9f res 3, a X03a1 cb 98 res 3, b X03a3 cb 99 res 3, c X03a5 cb 9a res 3, d X03a7 cb 9b res 3, e X03a9 cb 9c res 3, h X03ab cb 9d res 3, l X03ad cb a6 res 4, (hl) X03af dd cb 2b a6 res 4, (ix+disp) X03b3 fd cb 2b a6 res 4, (iy+disp) X03b7 cb a7 res 4, a X03b9 cb a0 res 4, b X03bb cb a1 res 4, c X03bd cb a2 res 4, d X03bf cb a3 res 4, e X03c1 cb a4 res 4, h X03c3 cb a5 res 4, l X03c5 cb ae res 5, (hl) X03c7 dd cb 2b ae res 5, (ix+disp) X03cb fd cb 2b ae res 5, (iy+disp) X03cf cb af res 5, a X03d1 cb a8 res 5, b X03d3 cb a9 res 5, c X03d5 cb aa res 5, d X03d7 cb ab res 5, e X03d9 cb ac res 5, h X03db cb ad res 5, l X03dd cb b6 res 6, (hl) X03df dd cb 2b b6 res 6, (ix+disp) X03e3 fd cb 2b b6 res 6, (iy+disp) X03e7 cb b7 res 6, a X03e9 cb b0 res 6, b X03eb cb b1 res 6, c X03ed cb b2 res 6, d X03ef cb b3 res 6, e X03f1 cb b4 res 6, h X03f3 cb b5 res 6, l X03f5 cb be res 7, (hl) X03f7 dd cb 2b be res 7, (ix+disp) X03fb fd cb 2b be res 7, (iy+disp) X03ff cb bf res 7, a X0401 cb b8 res 7, b X0403 cb b9 res 7, c X0405 cb ba res 7, d X0407 cb bb res 7, e X0409 cb bc res 7, h X040b cb bd res 7, l X040d c9 ret X040e d8 ret c X040f f8 ret m X0410 d0 ret nc X0411 c0 ret nz X0412 f0 ret p X0413 e8 ret pe X0414 e0 ret po X0415 c8 ret z X0416 ed 4d reti X0418 ed 45 retn X041a cb 16 rl (hl) X041c dd cb 2b 16 rl (ix+disp) X0420 fd cb 2b 16 rl (iy+disp) X0424 cb 17 rl a X0426 cb 10 rl b X0428 cb 11 rl c X042a cb 12 rl d X042c cb 13 rl e X042e cb 14 rl h X0430 cb 15 rl l X0432 17 rla X0433 cb 06 rlc (hl) X0435 dd cb 2b 06 rlc (ix+disp) X0439 fd cb 2b 06 rlc (iy+disp) X043d cb 07 rlc a X043f cb 00 rlc b X0441 cb 01 rlc c X0443 cb 02 rlc d X0445 cb 03 rlc e X0447 cb 04 rlc h X0449 cb 05 rlc l X044b 07 rlca X044c ed 6f rld X044e cb 1e rr (hl) X0450 dd cb 2b 1e rr (ix+disp) X0454 fd cb 2b 1e rr (iy+disp) X0458 cb 1f rr a X045a cb 18 rr b X045c cb 19 rr c X045e cb 1a rr d X0460 cb 1b rr e X0462 cb 1c rr h X0464 cb 1d rr l X0466 1f rra X0467 cb 0e rrc (hl) X0469 dd cb 2b 0e rrc (ix+disp) X046d fd cb 2b 0e rrc (iy+disp) X0471 cb 0f rrc a X0473 cb 08 rrc b X0475 cb 09 rrc c X0477 cb 0a rrc d X0479 cb 0b rrc e X047b cb 0c rrc h X047d cb 0d rrc l X047f 0f rrca X0480 ed 67 rrd X0482 c7 rst 0 X0483 d7 rst 16 X0484 df rst 24 X0485 e7 rst 32 X0486 ef rst 40 X0487 f7 rst 48 X0488 ff rst 56 X0489 cf rst 8 X048a 9e sbc a, (hl) X048b dd 9e 2b sbc a, (ix+disp) X048e fd 9e 2b sbc a, (iy+disp) X0491 9f sbc a, a X0492 98 sbc a, b X0493 99 sbc a, c X0494 9a sbc a, d X0495 9b sbc a, e X0496 9c sbc a, h X0497 de 4d sbc a, immed X0499 9d sbc a, l X049a ed 42 sbc hl, bc X049c ed 52 sbc hl, de X049e ed 62 sbc hl, hl X04a0 ed 72 sbc hl, sp X04a2 37 scf X04a3 cb c6 set 0, (hl) X04a5 dd cb 2b c6 set 0, (ix+disp) X04a9 fd cb 2b c6 set 0, (iy+disp) X04ad cb c7 set 0, a X04af cb c0 set 0, b X04b1 cb c1 set 0, c X04b3 cb c2 set 0, d X04b5 cb c3 set 0, e X04b7 cb c4 set 0, h X04b9 cb c5 set 0, l X04bb cb ce set 1, (hl) X04bd dd cb 2b ce set 1, (ix+disp) X04c1 fd cb 2b ce set 1, (iy+disp) X04c5 cb cf set 1, a X04c7 cb c8 set 1, b X04c9 cb c9 set 1, c X04cb cb ca set 1, d X04cd cb cb set 1, e X04cf cb cc set 1, h X04d1 cb cd set 1, l X04d3 cb d6 set 2, (hl) X04d5 dd cb 2b d6 set 2, (ix+disp) X04d9 fd cb 2b d6 set 2, (iy+disp) X04dd cb d7 set 2, a X04df cb d0 set 2, b X04e1 cb d1 set 2, c X04e3 cb d2 set 2, d X04e5 cb d3 set 2, e X04e7 cb d4 set 2, h X04e9 cb d5 set 2, l X04eb cb de set 3, (hl) X04ed dd cb 2b de set 3, (ix+disp) X04f1 fd cb 2b de set 3, (iy+disp) X04f5 cb df set 3, a X04f7 cb d8 set 3, b X04f9 cb d9 set 3, c X04fb cb da set 3, d X04fd cb db set 3, e X04ff cb dc set 3, h X0501 cb dd set 3, l X0503 cb e6 set 4, (hl) X0505 dd cb 2b e6 set 4, (ix+disp) X0509 fd cb 2b e6 set 4, (iy+disp) X050d cb e7 set 4, a X050f cb e0 set 4, b X0511 cb e1 set 4, c X0513 cb e2 set 4, d X0515 cb e3 set 4, e X0517 cb e4 set 4, h X0519 cb e5 set 4, l X051b cb ee set 5, (hl) X051d dd cb 2b ee set 5, (ix+disp) X0521 fd cb 2b ee set 5, (iy+disp) X0525 cb ef set 5, a X0527 cb e8 set 5, b X0529 cb e9 set 5, c X052b cb ea set 5, d X052d cb eb set 5, e X052f cb ec set 5, h X0531 cb ed set 5, l X0533 cb f6 set 6, (hl) X0535 dd cb 2b f6 set 6, (ix+disp) X0539 fd cb 2b f6 set 6, (iy+disp) X053d cb f7 set 6, a X053f cb f0 set 6, b X0541 cb f1 set 6, c X0543 cb f2 set 6, d X0545 cb f3 set 6, e X0547 cb f4 set 6, h X0549 cb f5 set 6, l X054b cb fe set 7, (hl) X054d dd cb 2b fe set 7, (ix+disp) X0551 fd cb 2b fe set 7, (iy+disp) X0555 cb ff set 7, a X0557 cb f8 set 7, b X0559 cb f9 set 7, c X055b cb fa set 7, d X055d cb fb set 7, e X055f cb fc set 7, h X0561 cb fd set 7, l X0563 cb 26 sla (hl) X0565 dd cb 2b 26 sla (ix+disp) X0569 fd cb 2b 26 sla (iy+disp) X056d cb 27 sla a X056f cb 20 sla b X0571 cb 21 sla c X0573 cb 22 sla d X0575 cb 23 sla e X0577 cb 24 sla h X0579 cb 25 sla l X057b ed 76 slp X057d cb 2e sra (hl) X057f dd cb 2b 2e sra (ix+disp) X0583 fd cb 2b 2e sra (iy+disp) X0587 cb 2f sra a X0589 cb 28 sra b X058b cb 29 sra c X058d cb 2a sra d X058f cb 2b sra e X0591 cb 2c sra h X0593 cb 2d sra l X0595 cb 3e srl (hl) X0597 dd cb 2b 3e srl (ix+disp) X059b fd cb 2b 3e srl (iy+disp) X059f cb 3f srl a X05a1 cb 38 srl b X05a3 cb 39 srl c X05a5 cb 3a srl d X05a7 cb 3b srl e X05a9 cb 3c srl h X05ab cb 3d srl l X05ad 96 sub (hl) X05ae dd 96 2b sub (ix+disp) X05b1 fd 96 2b sub (iy+disp) X05b4 97 sub a X05b5 90 sub b X05b6 91 sub c X05b7 92 sub d X05b8 93 sub e X05b9 94 sub h X05ba d6 4d sub immed X05bc 95 sub l X05bd ed 34 tst ( hl ) X05bf ed 3c tst a X05c1 ed 04 tst b X05c3 ed 0c tst c X05c5 ed 14 tst d X05c7 ed 1c tst e X05c9 ed 24 tst h X05cb ed 64 4d tst immed X05ce ed 2c tst l X05d0 ed 74 4d tstio immed X05d3 ae xor (hl) X05d4 dd ae 2b xor (ix+disp) X05d7 fd ae 2b xor (iy+disp) X05da af xor a X05db a8 xor b X05dc a9 xor c X05dd aa xor d X05de ab xor e X05df ac xor h X05e0 ee 4d xor immed X05e2 ad xor l X ERROR SUMMARY - ERRORS DETECTED 0 X - WARNINGS 0 SHAR_EOF true || echo 'restore of asz80.tut failed' fi true || echo 'restore of asz80.y failed' echo End of part 1, continue with part 2 exit 0