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Internet Message Format | 1990-12-28 | 44.1 KB

From: markz@ssc.UUCP (Mark Zenier) Newsgroups: alt.sources Subject: Frankenstein Cross Assemblers, Intel 8096 flavor, Part 1 of 2 Message-ID: <606@ssc.UUCP> Date: 5 Dec 90 06:16:49 GMT ---- Cut Here and feed the following to sh ---- #!/bin/sh # This is Frankasm/As8096, a shell archive (shar 3.43) # made 12/04/1990 08:46 UTC by markz@ssc.uucp # Source directory /usr/mark/frank.shar # # existing files will NOT be overwritten unless -c is specified # This format requires very little intelligence at unshar time. # "if test", "echo", "true", and "sed" may be needed. # # This shar contains: # length mode name # ------ ---------- ------------------------------------------ # 1546 -r--r----- as8096.1 # 14058 -r--r----- as8096.doc # 9469 -r--r----- as8096.tst # 16566 -r--r----- as8096.tut # 55463 -r--r--r-- as8096.y # # ============= as8096.1 ============== if test -f 'as8096.1' -a X"$1" != X"-c"; then echo 'x - skipping as8096.1 (File already exists)' else echo 'x - extracting as8096.1 (Text)' sed 's/^X//' << 'SHAR_EOF' > 'as8096.1' && X.TH AS8096 1L X.SH NAME Xas8096, as80196 \- cross assemblers for microcomputers X.SH SYNOPSIS X.nf Xas8096 [-p cpu] [-l listfile] [-o hexfile] [-d] [-s symbolfile] input Xas80196 [-p cpu] [-l listfile] [-o hexfile] [-d] [-s symbolfile] input X.fi X.SH DESCRIPTION XThe as8096, as80196 commands assembles the input file into a Xtext output file representing the program memory for a microcomputer. X XOptions X.IP "-p cpu" XOverride the instruction set selection. X.RS 10 XValid Values for Cpu X.RS 5 X8096, 80196 X.RE X.RE X.IP "-l listfile" XOutput a file formated with the memory address, data, and source input lines. X.IP "-o hexfile" XOutput the memory data image in a form accepted by most prom programmers. X.IP "-h hexfile" XSame as \-o. X.IP \-d XSave the intermediate data file (see FILE) and abort the execution at the Xend of processing. X.IP "-s symbolfile" XPrint the symbol table values and names, one per line in the specified file. X.SH FILES X/usr/tmp/frtXXXXXX X.SH SEE ALSO XFrankenstein Cross Assemblers Users Manual (file base.doc) XAppendix for as8096 Frankenstein Assembler (file as8096.doc) X.SH NOTES XThere is only one input file. X XThe program can select which subset of instructions is accepted. XThe program first uses the name with which it is invoked. XThis is scanned for a substring which indicates which set to use. XThe -p options overrides this selction by performing the same substring Xsearch. XFinally the input file can select which subset to use with the CPU statement. X XThere should only be one executable file with all of its names linked to it. SHAR_EOF true || echo 'restore of as8096.1 failed' fi # ============= as8096.doc ============== if test -f 'as8096.doc' -a X"$1" != X"-c"; then echo 'x - skipping as8096.doc (File already exists)' else echo 'x - extracting as8096.doc (Text)' sed 's/^X//' << 'SHAR_EOF' > 'as8096.doc' && X.HM A 1 1 1 1 1 1 X.H 1 "Appendix for as8096 Frankenstein Assembler" X.H 2 "Pseudo Operations" X.H 3 "Standard Pseudo Operation Mnemonics" X.VL 40 5 1 X.LI "End" XEND X.LI "File Inclusion" XINCL XINCLUDE X.LI "If" XIF X.LI "Else" XELSE X.LI "End If" XENDI X.LI "Equate" XEQU X.LI "Set" XSET X.LI "Org" XORG X.LI "Reserve Memory" XDSB XRESERVE XRMB X.LI "Define Byte Data" XBYTE XDCB XFCB X.LI "Define String Data" XFCC XSTRING X.LI "Define Character Set Translation" XCHARSET X.LI "Define Character Value" XCHARDEF XCHD X.LI "Use Character Translation" XCHARUSE X.LE X.H 3 "Machine Dependent Pseudo Operations" X.H 4 "Define Word Data, Aligned" X.DS I N X[Label] WORD expression [, expression] ... X[Label] FDB expression [, expression] ... X[Label] DCW expression [, expression] ... X.DE X.P XThe define word statement generates a two byte integer for each expression Xin the expression list. XThere can be up to 128 expressions on a line, more than the line length will Xallow. XThe location counter is adjusted by skipping bytes to make the first Xlocation address divisible by 2. XThe generated constants are in byte reversed order, with the low order Xbyte first, followed by the high order byte. XThe optional label is set to the first location of this area. X.H 4 "Define Long Word Data, Aligned" X.DS I N X[Label] LONG expression [, expression] ... X[Label] DCL expression [, expression] ... X.DE X.P XThe define long word statement generates a four byte integer Xfor each expression in the expression list. XThere can be up to 128 expressions on a line, more than the line length will Xallow. XThe location counter is adjusted by skipping bytes to make the first Xlocation address divisible by 4. XThe generated constants are in byte reversed order, with the low order Xbyte first, followed by the high order bytes. XThe optional label is set to the first location of this area. X.H 4 "Reserve Memory, Word Aligned" X.DS I N X[Label] DSW expression X.DE X.P XThis statement moves the location counter forward by Xthe number of bytes specified in the expression. XThe location counter is adjusted by skipping bytes to make the Xfirst location address divisible by 2. XThe label is set to the first location of this area. X.H 4 "Reserve Memory, Long Word Aligned" X.DS I N X[Label] DSL expression X.DE X.P XThis statement moves the location counter forward by Xthe number of long words specified in the expression. XThe location counter is adjusted by skipping bytes to make Xthe first location address divisible by 4. XThe label is set to the first location of this area. X.H 4 "Instruction Set Selection" X.DS I N XCPU string X.DE XThe instruction set can be specified in the source file with the CPU Xpseudooperation. XThe string, delimited by quotes or apostrophes, is scanned for a Xsubstring which selects which instruction set is used. XWhen the program is invoked, this operation is performed on the name of Xthe program, then the -p optional arguement, if any, and then any CPU Xstatements. XThe last one selects which subset of the instructions the assembler will Xaccept. XThe instruction set can be changed at any place in the source file. X.VL 30 5 1 X.LI "Instruction Set" XSubstrings X.LI "80c196" X19 X.LI "8096" X9 X.LE X.H 2 "Instructions" X.H 3 "Instruction List" X.TS H X; Xl l l. XOpcode Syntax Selection Criteria X.sp X.TH X.sp XADD expr ',' '#' expr XADD expr ',' '[' expr ']' XADD expr ',' expr ',' '#' expr XADD expr ',' expr ',' '[' expr ']' XADD expr ',' expr ',' expr '[' expr ']' DIRECT XADD expr ',' expr ',' expr '[' expr ']' EXTENDED XADD expr ',' expr ',' expr DIRECT XADD expr ',' expr ',' expr EXTENDED XADD expr ',' expr '[' expr ']' DIRECT XADD expr ',' expr '[' expr ']' EXTENDED XADD expr ',' expr DIRECT XADD expr ',' expr EXTENDED X.sp XADDB expr ',' '#' expr XADDB expr ',' '[' expr ']' XADDB expr ',' expr ',' '#' expr XADDB expr ',' expr ',' '[' expr ']' XADDB expr ',' expr ',' expr '[' expr ']' DIRECT XADDB expr ',' expr ',' expr '[' expr ']' EXTENDED XADDB expr ',' expr ',' expr DIRECT XADDB expr ',' expr ',' expr EXTENDED XADDB expr ',' expr '[' expr ']' DIRECT XADDB expr ',' expr '[' expr ']' EXTENDED XADDB expr ',' expr DIRECT XADDB expr ',' expr EXTENDED X.sp XADDC expr ',' '#' expr XADDC expr ',' '[' expr ']' XADDC expr ',' expr '[' expr ']' DIRECT XADDC expr ',' expr '[' expr ']' EXTENDED XADDC expr ',' expr DIRECT XADDC expr ',' expr EXTENDED X.sp XADDCB expr ',' '#' expr XADDCB expr ',' '[' expr ']' XADDCB expr ',' expr '[' expr ']' DIRECT XADDCB expr ',' expr '[' expr ']' EXTENDED XADDCB expr ',' expr DIRECT XADDCB expr ',' expr EXTENDED X.sp XAND expr ',' '#' expr XAND expr ',' '[' expr ']' XAND expr ',' expr ',' '#' expr XAND expr ',' expr ',' '[' expr ']' XAND expr ',' expr ',' expr '[' expr ']' DIRECT XAND expr ',' expr ',' expr '[' expr ']' EXTENDED XAND expr ',' expr ',' expr DIRECT XAND expr ',' expr ',' expr EXTENDED XAND expr ',' expr '[' expr ']' DIRECT XAND expr ',' expr '[' expr ']' EXTENDED XAND expr ',' expr DIRECT XAND expr ',' expr EXTENDED X.sp XANDB expr ',' '#' expr XANDB expr ',' '[' expr ']' XANDB expr ',' expr ',' '#' expr XANDB expr ',' expr ',' '[' expr ']' XANDB expr ',' expr ',' expr '[' expr ']' DIRECT XANDB expr ',' expr ',' expr '[' expr ']' EXTENDED XANDB expr ',' expr ',' expr DIRECT XANDB expr ',' expr ',' expr EXTENDED XANDB expr ',' expr '[' expr ']' DIRECT XANDB expr ',' expr '[' expr ']' EXTENDED XANDB expr ',' expr DIRECT XANDB expr ',' expr EXTENDED X.sp XBMOV expr ',' expr CPU196 X.sp XBR '[' expr ']' X.sp XCLR expr X.sp XCLRB expr X.sp XCLRC X.sp XCLRVT X.sp XCMP expr ',' '#' expr XCMP expr ',' '[' expr ']' XCMP expr ',' expr '[' expr ']' DIRECT XCMP expr ',' expr '[' expr ']' EXTENDED XCMP expr ',' expr DIRECT XCMP expr ',' expr EXTENDED X.sp XCMPB expr ',' '#' expr XCMPB expr ',' '[' expr ']' XCMPB expr ',' expr '[' expr ']' DIRECT XCMPB expr ',' expr '[' expr ']' EXTENDED XCMPB expr ',' expr DIRECT XCMPB expr ',' expr EXTENDED X.sp XCMPL expr ',' expr CPU196 X.sp XDEC expr X.sp XDECB expr X.sp XDI X.sp XDIV expr ',' '#' expr XDIV expr ',' '[' expr ']' XDIV expr ',' expr '[' expr ']' DIRECT XDIV expr ',' expr '[' expr ']' EXTENDED XDIV expr ',' expr DIRECT XDIV expr ',' expr EXTENDED X.sp XDIVB expr ',' '#' expr XDIVB expr ',' '[' expr ']' XDIVB expr ',' expr '[' expr ']' DIRECT XDIVB expr ',' expr '[' expr ']' EXTENDED XDIVB expr ',' expr DIRECT XDIVB expr ',' expr EXTENDED X.sp XDIVU expr ',' '#' expr XDIVU expr ',' '[' expr ']' XDIVU expr ',' expr '[' expr ']' DIRECT XDIVU expr ',' expr '[' expr ']' EXTENDED XDIVU expr ',' expr DIRECT XDIVU expr ',' expr EXTENDED X.sp XDIVUB expr ',' '#' expr XDIVUB expr ',' '[' expr ']' XDIVUB expr ',' expr '[' expr ']' DIRECT XDIVUB expr ',' expr '[' expr ']' EXTENDED XDIVUB expr ',' expr DIRECT XDIVUB expr ',' expr EXTENDED X.sp XDJNZ expr ',' expr X.sp XDJNZW expr ',' expr CPU196 X.sp XEI X.sp XEXT expr X.sp XEXTB expr X.sp XIDLPD '#' expr CPU196 X.sp XINC expr X.sp XINCB expr X.sp XJBC expr ',' expr ',' expr X.sp XJBS expr ',' expr ',' expr X.sp XJC expr X.sp XJE expr X.sp XJGE expr X.sp XJGT expr X.sp XJH expr X.sp XJLE expr X.sp XJLT expr X.sp XJNC expr X.sp XJNE expr X.sp XJNH expr X.sp XJNST expr X.sp XJNV expr X.sp XJNVT expr X.sp XJST expr X.sp XJV expr X.sp XJVT expr X.sp XLCALL expr X.sp XLD expr ',' '#' expr XLD expr ',' '[' expr ']' XLD expr ',' expr '[' expr ']' DIRECT XLD expr ',' expr '[' expr ']' EXTENDED XLD expr ',' expr DIRECT XLD expr ',' expr EXTENDED X.sp XLDB expr ',' '#' expr XLDB expr ',' '[' expr ']' XLDB expr ',' expr '[' expr ']' DIRECT XLDB expr ',' expr '[' expr ']' EXTENDED XLDB expr ',' expr DIRECT XLDB expr ',' expr EXTENDED X.sp XLDBSE expr ',' '#' expr XLDBSE expr ',' '[' expr ']' XLDBSE expr ',' expr '[' expr ']' DIRECT XLDBSE expr ',' expr '[' expr ']' EXTENDED XLDBSE expr ',' expr DIRECT XLDBSE expr ',' expr EXTENDED X.sp XLDBZE expr ',' '#' expr XLDBZE expr ',' '[' expr ']' XLDBZE expr ',' expr '[' expr ']' DIRECT XLDBZE expr ',' expr '[' expr ']' EXTENDED XLDBZE expr ',' expr DIRECT XLDBZE expr ',' expr EXTENDED X.sp XLJMP expr X.sp XMUL expr ',' '#' expr XMUL expr ',' '[' expr ']' XMUL expr ',' expr ',' '#' expr XMUL expr ',' expr ',' '[' expr ']' XMUL expr ',' expr ',' expr '[' expr ']' DIRECT XMUL expr ',' expr ',' expr '[' expr ']' EXTENDED XMUL expr ',' expr ',' expr DIRECT XMUL expr ',' expr ',' expr EXTENDED XMUL expr ',' expr '[' expr ']' DIRECT XMUL expr ',' expr '[' expr ']' EXTENDED XMUL expr ',' expr DIRECT XMUL expr ',' expr EXTENDED X.sp XMULB expr ',' '#' expr XMULB expr ',' '[' expr ']' XMULB expr ',' expr ',' '#' expr XMULB expr ',' expr ',' '[' expr ']' XMULB expr ',' expr ',' expr '[' expr ']' DIRECT XMULB expr ',' expr ',' expr '[' expr ']' EXTENDED XMULB expr ',' expr ',' expr DIRECT XMULB expr ',' expr ',' expr EXTENDED XMULB expr ',' expr '[' expr ']' DIRECT XMULB expr ',' expr '[' expr ']' EXTENDED XMULB expr ',' expr DIRECT XMULB expr ',' expr EXTENDED X.sp XMULU expr ',' '#' expr XMULU expr ',' '[' expr ']' XMULU expr ',' expr ',' '#' expr XMULU expr ',' expr ',' '[' expr ']' XMULU expr ',' expr ',' expr '[' expr ']' DIRECT XMULU expr ',' expr ',' expr '[' expr ']' EXTENDED XMULU expr ',' expr ',' expr DIRECT XMULU expr ',' expr ',' expr EXTENDED XMULU expr ',' expr '[' expr ']' DIRECT XMULU expr ',' expr '[' expr ']' EXTENDED XMULU expr ',' expr DIRECT XMULU expr ',' expr EXTENDED X.sp XMULUB expr ',' '#' expr XMULUB expr ',' '[' expr ']' XMULUB expr ',' expr ',' '#' expr XMULUB expr ',' expr ',' '[' expr ']' XMULUB expr ',' expr ',' expr '[' expr ']' DIRECT XMULUB expr ',' expr ',' expr '[' expr ']' EXTENDED XMULUB expr ',' expr ',' expr DIRECT XMULUB expr ',' expr ',' expr EXTENDED XMULUB expr ',' expr '[' expr ']' DIRECT XMULUB expr ',' expr '[' expr ']' EXTENDED XMULUB expr ',' expr DIRECT XMULUB expr ',' expr EXTENDED X.sp XNEG expr X.sp XNEGB expr X.sp XNOP X.sp XNORML expr ',' expr X.sp XNOT expr X.sp XNOTB expr X.sp XOR expr ',' '#' expr XOR expr ',' '[' expr ']' XOR expr ',' expr '[' expr ']' DIRECT XOR expr ',' expr '[' expr ']' EXTENDED XOR expr ',' expr DIRECT XOR expr ',' expr EXTENDED X.sp XORB expr ',' '#' expr XORB expr ',' '[' expr ']' XORB expr ',' expr '[' expr ']' DIRECT XORB expr ',' expr '[' expr ']' EXTENDED XORB expr ',' expr DIRECT XORB expr ',' expr EXTENDED X.sp XPOP '[' expr ']' XPOP expr '[' expr ']' DIRECT XPOP expr '[' expr ']' EXTENDED XPOP expr DIRECT XPOP expr EXTENDED X.sp XPOPA CPU196 X.sp XPOPF X.sp XPUSH '#' expr XPUSH '[' expr ']' XPUSH expr '[' expr ']' DIRECT XPUSH expr '[' expr ']' EXTENDED XPUSH expr DIRECT XPUSH expr EXTENDED X.sp XPUSHA CPU196 X.sp XPUSHF X.sp XRET X.sp XRST X.sp XSCALL expr X.sp XSETC X.sp XSHL expr ',' '#' expr XSHL expr ',' expr X.sp XSHLB expr ',' '#' expr XSHLB expr ',' expr X.sp XSHLL expr ',' '#' expr XSHLL expr ',' expr X.sp XSHR expr ',' '#' expr XSHR expr ',' expr X.sp XSHRA expr ',' '#' expr XSHRA expr ',' expr X.sp XSHRAB expr ',' '#' expr XSHRAB expr ',' expr X.sp XSHRAL expr ',' '#' expr XSHRAL expr ',' expr X.sp XSHRB expr ',' '#' expr XSHRB expr ',' expr X.sp XSHRL expr ',' '#' expr XSHRL expr ',' expr X.sp XSJMP expr X.sp XSKIP expr X.sp XST expr ',' '[' expr ']' XST expr ',' expr '[' expr ']' DIRECT XST expr ',' expr '[' expr ']' EXTENDED XST expr ',' expr DIRECT XST expr ',' expr EXTENDED X.sp XSTB expr ',' '[' expr ']' XSTB expr ',' expr '[' expr ']' DIRECT XSTB expr ',' expr '[' expr ']' EXTENDED XSTB expr ',' expr DIRECT XSTB expr ',' expr EXTENDED X.sp XSUB expr ',' '#' expr XSUB expr ',' '[' expr ']' XSUB expr ',' expr ',' '#' expr XSUB expr ',' expr ',' '[' expr ']' XSUB expr ',' expr ',' expr '[' expr ']' DIRECT XSUB expr ',' expr ',' expr '[' expr ']' EXTENDED XSUB expr ',' expr ',' expr DIRECT XSUB expr ',' expr ',' expr EXTENDED XSUB expr ',' expr '[' expr ']' DIRECT XSUB expr ',' expr '[' expr ']' EXTENDED XSUB expr ',' expr DIRECT XSUB expr ',' expr EXTENDED X.sp XSUBB expr ',' '#' expr XSUBB expr ',' '[' expr ']' XSUBB expr ',' expr ',' '#' expr XSUBB expr ',' expr ',' '[' expr ']' XSUBB expr ',' expr ',' expr '[' expr ']' DIRECT XSUBB expr ',' expr ',' expr '[' expr ']' EXTENDED XSUBB expr ',' expr ',' expr DIRECT XSUBB expr ',' expr ',' expr EXTENDED XSUBB expr ',' expr '[' expr ']' DIRECT XSUBB expr ',' expr '[' expr ']' EXTENDED XSUBB expr ',' expr DIRECT XSUBB expr ',' expr EXTENDED X.sp XSUBC expr ',' '#' expr XSUBC expr ',' '[' expr ']' XSUBC expr ',' expr '[' expr ']' DIRECT XSUBC expr ',' expr '[' expr ']' EXTENDED XSUBC expr ',' expr DIRECT XSUBC expr ',' expr EXTENDED X.sp XSUBCB expr ',' '#' expr XSUBCB expr ',' '[' expr ']' XSUBCB expr ',' expr '[' expr ']' DIRECT XSUBCB expr ',' expr '[' expr ']' EXTENDED XSUBCB expr ',' expr DIRECT XSUBCB expr ',' expr EXTENDED X.sp XXOR expr ',' '#' expr XXOR expr ',' '[' expr ']' XXOR expr ',' expr '[' expr ']' DIRECT XXOR expr ',' expr '[' expr ']' EXTENDED XXOR expr ',' expr DIRECT XXOR expr ',' expr EXTENDED X.sp XXORB expr ',' '#' expr XXORB expr ',' '[' expr ']' XXORB expr ',' expr '[' expr ']' DIRECT XXORB expr ',' expr '[' expr ']' EXTENDED XXORB expr ',' expr DIRECT XXORB expr ',' expr EXTENDED X.TE X.H 3 "Selection Criteria Keywords" X.VL 25 5 X.LI DIRECT XThe instruction will be generated with a short form if the last operand Xwill fit in one byte, and is defined when the instruction is processed in Xthe first pass. X.LI EXTENDED XThe instruction can be generated with a long form. X.LI CPU196 XThe instruction is implemented only in the 80c196. X.LE X.H 3 "Apostrophes" XThe apostrophes in the syntax field are a notation used for the Xparser generator and are not put in the assembler source statement. X.H 2 "Notes" X.H 3 "Data Alignment" XIn the second pass, data address are checked for alignment. XIf the operand field is not divisible by 2 for word references, or Xby 4 for long word references, the error message X"expression fails validity test" occurs. X.H 3 "Generic Jumps" XThe assembler requires that the length of an instruction Xbe able to be determined at the first pass, so generalized generic jumps Xcould not be implemented. X.H 3 "Reserved Symbols" X.H 4 "Standard Reserved Symbols" XAND XDEFINED XEQ XGE XGT XHIGH XLE XLOW XLT XMOD XNE XNOT XOR XSHL XSHR XXOR Xand Xdefined Xeq Xge Xgt Xhigh Xle Xlow Xlt Xmod Xne Xnot Xor Xshl Xshr Xxor X.TC 1 1 7 SHAR_EOF true || echo 'restore of as8096.doc failed' fi # ============= as8096.tst ============== if test -f 'as8096.tst' -a X"$1" != X"-c"; then echo 'x - skipping as8096.tst (File already exists)' else echo 'x - extracting as8096.tst (Text)' sed 's/^X//' << 'SHAR_EOF' > 'as8096.tst' && Ximmed equ 98h Xsrcreg equ 38h Xdstreg equ 30h Xlongoff equ 7654h Xshortoff equ 33h Xextern equ 1234h Xsrcreg2 equ 44h Xshiftcount equ 10 X add dstreg, #immed X add dstreg, [ srcreg ] X add dstreg, [ srcreg ] + X add dstreg, extern X add dstreg, longoff [ srcreg ] X add dstreg, shortoff [ srcreg ] X add dstreg, srcreg X add dstreg, srcreg2, #immed X add dstreg, srcreg2, [ srcreg ] X add dstreg, srcreg2, [ srcreg ] + X add dstreg, srcreg2, extern X add dstreg, srcreg2, longoff [ srcreg ] X add dstreg, srcreg2, shortoff [ srcreg ] X add dstreg, srcreg2, srcreg X addb dstreg, #immed X addb dstreg, [ srcreg ] X addb dstreg, [ srcreg ] + X addb dstreg, extern X addb dstreg, longoff [ srcreg ] X addb dstreg, shortoff [ srcreg ] X addb dstreg, srcreg X addb dstreg, srcreg2, #immed X addb dstreg, srcreg2, [ srcreg ] X addb dstreg, srcreg2, [ srcreg ] + X addb dstreg, srcreg2, extern X addb dstreg, srcreg2, longoff [ srcreg ] X addb dstreg, srcreg2, shortoff [ srcreg ] X addb dstreg, srcreg2, srcreg X addc dstreg, #immed X addc dstreg, [ srcreg ] X addc dstreg, [ srcreg ] + X addc dstreg, extern X addc dstreg, longoff [ srcreg ] X addc dstreg, shortoff [ srcreg ] X addc dstreg, srcreg X addcb dstreg, #immed X addcb dstreg, [ srcreg ] X addcb dstreg, [ srcreg ] + X addcb dstreg, extern X addcb dstreg, longoff [ srcreg ] X addcb dstreg, shortoff [ srcreg ] X addcb dstreg, srcreg X and dstreg, #immed X and dstreg, [ srcreg ] X and dstreg, [ srcreg ] + X and dstreg, extern X and dstreg, longoff [ srcreg ] X and dstreg, shortoff [ srcreg ] X and dstreg, srcreg X and dstreg, srcreg2, #immed X and dstreg, srcreg2, [ srcreg ] X and dstreg, srcreg2, [ srcreg ] + X and dstreg, srcreg2, extern X and dstreg, srcreg2, longoff [ srcreg ] X and dstreg, srcreg2, shortoff [ srcreg ] X and dstreg, srcreg2, srcreg X andb dstreg, #immed X andb dstreg, [ srcreg ] X andb dstreg, [ srcreg ] + X andb dstreg, extern X andb dstreg, longoff [ srcreg ] X andb dstreg, shortoff [ srcreg ] X andb dstreg, srcreg X andb dstreg, srcreg2, #immed X andb dstreg, srcreg2, [ srcreg ] X andb dstreg, srcreg2, [ srcreg ] + X andb dstreg, srcreg2, extern X andb dstreg, srcreg2, longoff [ srcreg ] X andb dstreg, srcreg2, shortoff [ srcreg ] X andb dstreg, srcreg2, srcreg X br [ srcreg ] X clrc X clr dstreg X clrb dstreg X clrvt X cmp dstreg, #immed X cmp dstreg, [ srcreg ] X cmp dstreg, [ srcreg ] + X cmp dstreg, extern X cmp dstreg, longoff [ srcreg ] X cmp dstreg, shortoff [ srcreg ] X cmp dstreg, srcreg X cmpb dstreg, #immed X cmpb dstreg, [ srcreg ] X cmpb dstreg, [ srcreg ] + X cmpb dstreg, extern X cmpb dstreg, longoff [ srcreg ] X cmpb dstreg, shortoff [ srcreg ] X cmpb dstreg, srcreg X dec dstreg X decb dstreg X di X div dstreg, #immed X div dstreg, [ srcreg ] X div dstreg, [ srcreg ] + X div dstreg, extern X div dstreg, longoff [ srcreg ] X div dstreg, shortoff [ srcreg ] X div dstreg, srcreg X divb dstreg, #immed X divb dstreg, [ srcreg ] X divb dstreg, [ srcreg ] + X divb dstreg, extern X divb dstreg, longoff [ srcreg ] X divb dstreg, shortoff [ srcreg ] X divb dstreg, srcreg X divu dstreg, #immed X divu dstreg, [ srcreg ] X divu dstreg, [ srcreg ] + X divu dstreg, extern X divu dstreg, longoff [ srcreg ] X divu dstreg, shortoff [ srcreg ] X divu dstreg, srcreg X divub dstreg, #immed X divub dstreg, [ srcreg ] X divub dstreg, [ srcreg ] + X divub dstreg, extern X divub dstreg, longoff [ srcreg ] X divub dstreg, shortoff [ srcreg ] X divub dstreg, srcreg X djnz srcreg, jmpdst X ei X ext dstreg X extb dstreg X inc dstreg X incb dstreg X jbc srcreg, 0, jmpdst X jbc srcreg, 1, jmpdst X jbc srcreg, 2, jmpdst X jbc srcreg, 3, jmpdst X jbc srcreg, 4, jmpdst X jbc srcreg, 5, jmpdst X jbc srcreg, 6, jmpdst X jbc srcreg, 7, jmpdst X jbs srcreg, 0, jmpdst X jbs srcreg, 1, jmpdst X jbs srcreg, 2, jmpdst X jbs srcreg, 3, jmpdst X jbs srcreg, 4, jmpdst X jbs srcreg, 5, jmpdst X jbs srcreg, 6, jmpdst X jbs srcreg, 7, jmpdst X jc jmpdst Xjmpdst je jmpdst X jge jmpdst X jgt jmpdst X jh jmpdst X jle jmpdst X jlt jmpdst X jnc jmpdst X jne jmpdst X jnh jmpdst X jnst jmpdst X jnv jmpdst X jnvt jmpdst X jst jmpdst X jv jmpdst X jvt jmpdst X lcall jmpdst X ld dstreg, #immed X ld dstreg, [ srcreg ] X ld dstreg, [ srcreg ] + X ld dstreg, extern X ld dstreg, longoff [ srcreg ] X ld dstreg, shortoff [ srcreg ] X ld dstreg, srcreg X ldb dstreg, #immed X ldb dstreg, [ srcreg ] X ldb dstreg, [ srcreg ] + X ldb dstreg, extern X ldb dstreg, longoff [ srcreg ] X ldb dstreg, shortoff [ srcreg ] X ldb dstreg, srcreg X ldbse dstreg, #immed X ldbse dstreg, [ srcreg ] X ldbse dstreg, [ srcreg ] + X ldbse dstreg, extern X ldbse dstreg, longoff [ srcreg ] X ldbse dstreg, shortoff [ srcreg ] X ldbse dstreg, srcreg X ldbze dstreg, #immed X ldbze dstreg, [ srcreg ] X ldbze dstreg, [ srcreg ] + X ldbze dstreg, extern X ldbze dstreg, longoff [ srcreg ] X ldbze dstreg, shortoff [ srcreg ] X ldbze dstreg, srcreg X ljmp jmpdst X mul dstreg, #immed X mul dstreg, [ srcreg ] X mul dstreg, [ srcreg ] + X mul dstreg, extern X mul dstreg, longoff [ srcreg ] X mul dstreg, shortoff [ srcreg ] X mul dstreg, srcreg X mul dstreg, srcreg2, #immed X mul dstreg, srcreg2, [ srcreg ] X mul dstreg, srcreg2, [ srcreg ] + X mul dstreg, srcreg2, extern X mul dstreg, srcreg2, longoff [ srcreg ] X mul dstreg, srcreg2, shortoff [ srcreg ] X mul dstreg, srcreg2, srcreg X mulb dstreg, #immed X mulb dstreg, [ srcreg ] X mulb dstreg, [ srcreg ] + X mulb dstreg, extern X mulb dstreg, longoff [ srcreg ] X mulb dstreg, shortoff [ srcreg ] X mulb dstreg, srcreg X mulb dstreg, srcreg2, #immed X mulb dstreg, srcreg2, [ srcreg ] X mulb dstreg, srcreg2, [ srcreg ] + X mulb dstreg, srcreg2, extern X mulb dstreg, srcreg2, longoff [ srcreg ] X mulb dstreg, srcreg2, shortoff [ srcreg ] X mulb dstreg, srcreg2, srcreg X mulu dstreg, #immed X mulu dstreg, [ srcreg ] X mulu dstreg, [ srcreg ] + X mulu dstreg, extern X mulu dstreg, longoff [ srcreg ] X mulu dstreg, shortoff [ srcreg ] X mulu dstreg, srcreg X mulu dstreg, srcreg2, #immed X mulu dstreg, srcreg2, [ srcreg ] X mulu dstreg, srcreg2, [ srcreg ] + X mulu dstreg, srcreg2, extern X mulu dstreg, srcreg2, longoff [ srcreg ] X mulu dstreg, srcreg2, shortoff [ srcreg ] X mulu dstreg, srcreg2, srcreg X mulub dstreg, #immed X mulub dstreg, [ srcreg ] X mulub dstreg, [ srcreg ] + X mulub dstreg, extern X mulub dstreg, longoff [ srcreg ] X mulub dstreg, shortoff [ srcreg ] X mulub dstreg, srcreg X mulub dstreg, srcreg2, #immed X mulub dstreg, srcreg2, [ srcreg ] X mulub dstreg, srcreg2, [ srcreg ] + X mulub dstreg, srcreg2, extern X mulub dstreg, srcreg2, longoff [ srcreg ] X mulub dstreg, srcreg2, shortoff [ srcreg ] X mulub dstreg, srcreg2, srcreg X neg dstreg X negb dstreg X nop X norml dstreg, srcreg X not dstreg X notb dstreg X or dstreg, #immed X or dstreg, [ srcreg ] X or dstreg, [ srcreg ] + X or dstreg, extern X or dstreg, longoff [ srcreg ] X or dstreg, shortoff [ srcreg ] X or dstreg, srcreg X orb dstreg, #immed X orb dstreg, [ srcreg ] X orb dstreg, [ srcreg ] + X orb dstreg, extern X orb dstreg, longoff [ srcreg ] X orb dstreg, shortoff [ srcreg ] X orb dstreg, srcreg X pop [ srcreg ] X pop [ srcreg ] + X pop extern X pop longoff [ srcreg ] X pop shortoff [ srcreg ] X pop srcreg X popf X push #immed X push [ srcreg ] X push [ srcreg ] + X push extern X push longoff [ srcreg ] X push shortoff [ srcreg ] X push srcreg X pushf X ret X rst X scall jmpdst X setc X shl dstreg, # shiftcount X shl dstreg, srcreg X shlb dstreg, # shiftcount X shlb dstreg, srcreg X shll dstreg, # shiftcount X shll dstreg, srcreg X shr dstreg, # shiftcount X shr dstreg, srcreg X shra dstreg, # shiftcount X shra dstreg, srcreg X shrab dstreg, # shiftcount X shrab dstreg, srcreg X shral dstreg, # shiftcount X shral dstreg, srcreg X shrb dstreg, # shiftcount X shrb dstreg, srcreg X shrl dstreg, # shiftcount X shrl dstreg, srcreg X sjmp jmpdst X skip dstreg X st dstreg, [ srcreg ] X st dstreg, [ srcreg ] + X st dstreg, extern X st dstreg, longoff [ srcreg ] X st dstreg, shortoff [ srcreg ] X st dstreg, srcreg X stb dstreg, [ srcreg ] X stb dstreg, [ srcreg ] + X stb dstreg, extern X stb dstreg, longoff [ srcreg ] X stb dstreg, shortoff [ srcreg ] X stb dstreg, srcreg X sub dstreg, #immed X sub dstreg, [ srcreg ] X sub dstreg, [ srcreg ] + X sub dstreg, extern X sub dstreg, longoff [ srcreg ] X sub dstreg, shortoff [ srcreg ] X sub dstreg, srcreg X sub dstreg, srcreg2, #immed X sub dstreg, srcreg2, [ srcreg ] X sub dstreg, srcreg2, [ srcreg ] + X sub dstreg, srcreg2, extern X sub dstreg, srcreg2, longoff [ srcreg ] X sub dstreg, srcreg2, shortoff [ srcreg ] X sub dstreg, srcreg2, srcreg X subb dstreg, #immed X subb dstreg, [ srcreg ] X subb dstreg, [ srcreg ] + X subb dstreg, extern X subb dstreg, longoff [ srcreg ] X subb dstreg, shortoff [ srcreg ] X subb dstreg, srcreg X subb dstreg, srcreg2, #immed X subb dstreg, srcreg2, [ srcreg ] X subb dstreg, srcreg2, [ srcreg ] + X subb dstreg, srcreg2, extern X subb dstreg, srcreg2, longoff [ srcreg ] X subb dstreg, srcreg2, shortoff [ srcreg ] X subb dstreg, srcreg2, srcreg X subc dstreg, #immed X subc dstreg, [ srcreg ] X subc dstreg, [ srcreg ] + X subc dstreg, extern X subc dstreg, longoff [ srcreg ] X subc dstreg, shortoff [ srcreg ] X subc dstreg, srcreg X subcb dstreg, #immed X subcb dstreg, [ srcreg ] X subcb dstreg, [ srcreg ] + X subcb dstreg, extern X subcb dstreg, longoff [ srcreg ] X subcb dstreg, shortoff [ srcreg ] X subcb dstreg, srcreg X xor dstreg, #immed X xor dstreg, [ srcreg ] X xor dstreg, [ srcreg ] + X xor dstreg, extern X xor dstreg, longoff [ srcreg ] X xor dstreg, shortoff [ srcreg ] X xor dstreg, srcreg X xorb dstreg, #immed X xorb dstreg, [ srcreg ] X xorb dstreg, [ srcreg ] + X xorb dstreg, extern X xorb dstreg, longoff [ srcreg ] X xorb dstreg, shortoff [ srcreg ] X xorb dstreg, srcreg SHAR_EOF true || echo 'restore of as8096.tst failed' fi # ============= as8096.tut ============== if test -f 'as8096.tut' -a X"$1" != X"-c"; then echo 'x - skipping as8096.tut (File already exists)' else echo 'x - extracting as8096.tut (Text)' sed 's/^X//' << 'SHAR_EOF' > 'as8096.tut' && X00000098 immed 00000038 srcreg 00000030 dstreg X00007654 longoff 00000033 shortoff 00001234 extern X00000044 srcreg2 0000000a shiftcount 0000021d jmpdst X 0x98 immed equ 98h X 0x38 srcreg equ 38h X 0x30 dstreg equ 30h X 0x7654 longoff equ 7654h X 0x33 shortoff equ 33h X 0x1234 extern equ 1234h X 0x44 srcreg2 equ 44h X 0xa shiftcount equ 10 X0000 65 98 00 30 add dstreg, #immed X0004 66 38 30 add dstreg, [ srcreg ] X0007 66 39 30 add dstreg, [ srcreg ] + X000a 67 01 34 12 30 add dstreg, extern X000f 67 39 54 76 30 add dstreg, longoff [ srcreg ] X0014 67 38 33 30 add dstreg, shortoff [ srcreg ] X0018 64 38 30 add dstreg, srcreg X001b 45 98 00 44 30 add dstreg, srcreg2, #immed X0020 46 38 44 30 add dstreg, srcreg2, [ srcreg ] X0024 46 39 44 30 add dstreg, srcreg2, [ srcreg ] + X0028 47 01 34 12 44 30 add dstreg, srcreg2, extern X002e 47 39 54 76 44 30 add dstreg, srcreg2, longoff [ srcreg ] X0034 47 38 33 44 30 add dstreg, srcreg2, shortoff [ srcreg ] X0039 44 38 44 30 add dstreg, srcreg2, srcreg X003d 75 98 30 addb dstreg, #immed X0040 76 38 30 addb dstreg, [ srcreg ] X0043 76 39 30 addb dstreg, [ srcreg ] + X0046 77 01 34 12 30 addb dstreg, extern X004b 77 39 54 76 30 addb dstreg, longoff [ srcreg ] X0050 77 38 33 30 addb dstreg, shortoff [ srcreg ] X0054 74 38 30 addb dstreg, srcreg X0057 55 98 44 30 addb dstreg, srcreg2, #immed X005b 56 38 44 30 addb dstreg, srcreg2, [ srcreg ] X005f 56 39 44 30 addb dstreg, srcreg2, [ srcreg ] + X0063 57 01 34 12 44 30 addb dstreg, srcreg2, extern X0069 57 39 54 76 44 30 addb dstreg, srcreg2, longoff [ srcreg ] X006f 57 38 33 44 30 addb dstreg, srcreg2, shortoff [ srcreg ] X0074 54 38 44 30 addb dstreg, srcreg2, srcreg X0078 a5 98 00 30 addc dstreg, #immed X007c a6 38 30 addc dstreg, [ srcreg ] X007f a6 39 30 addc dstreg, [ srcreg ] + X0082 a7 01 34 12 30 addc dstreg, extern X0087 a7 39 54 76 30 addc dstreg, longoff [ srcreg ] X008c a7 38 33 30 addc dstreg, shortoff [ srcreg ] X0090 a4 38 30 addc dstreg, srcreg X0093 b5 98 30 addcb dstreg, #immed X0096 b6 38 30 addcb dstreg, [ srcreg ] X0099 b6 39 30 addcb dstreg, [ srcreg ] + X009c b7 01 34 12 30 addcb dstreg, extern X00a1 b7 39 54 76 30 addcb dstreg, longoff [ srcreg ] X00a6 b7 38 33 30 addcb dstreg, shortoff [ srcreg ] X00aa b4 38 30 addcb dstreg, srcreg X00ad 61 98 00 30 and dstreg, #immed X00b1 62 38 30 and dstreg, [ srcreg ] X00b4 62 39 30 and dstreg, [ srcreg ] + X00b7 63 01 34 12 30 and dstreg, extern X00bc 63 39 54 76 30 and dstreg, longoff [ srcreg ] X00c1 63 38 33 30 and dstreg, shortoff [ srcreg ] X00c5 60 38 30 and dstreg, srcreg X00c8 41 98 00 44 30 and dstreg, srcreg2, #immed X00cd 42 38 44 30 and dstreg, srcreg2, [ srcreg ] X00d1 42 39 44 30 and dstreg, srcreg2, [ srcreg ] + X00d5 43 01 34 12 44 30 and dstreg, srcreg2, extern X00db 43 39 54 76 44 30 and dstreg, srcreg2, longoff [ srcreg ] X00e1 43 38 33 44 30 and dstreg, srcreg2, shortoff [ srcreg ] X00e6 40 38 44 30 and dstreg, srcreg2, srcreg X00ea 71 98 30 andb dstreg, #immed X00ed 72 38 30 andb dstreg, [ srcreg ] X00f0 72 39 30 andb dstreg, [ srcreg ] + X00f3 73 01 34 12 30 andb dstreg, extern X00f8 73 39 54 76 30 andb dstreg, longoff [ srcreg ] X00fd 73 38 33 30 andb dstreg, shortoff [ srcreg ] X0101 70 38 30 andb dstreg, srcreg X0104 51 98 44 30 andb dstreg, srcreg2, #immed X0108 52 38 44 30 andb dstreg, srcreg2, [ srcreg ] X010c 52 39 44 30 andb dstreg, srcreg2, [ srcreg ] + X0110 53 01 34 12 44 30 andb dstreg, srcreg2, extern X0116 53 39 54 76 44 30 andb dstreg, srcreg2, longoff [ srcreg ] X011c 53 38 33 44 30 andb dstreg, srcreg2, shortoff [ srcreg ] X0121 50 38 44 30 andb dstreg, srcreg2, srcreg X0125 e3 38 br [ srcreg ] X0127 f8 clrc X0128 01 30 clr dstreg X012a 11 30 clrb dstreg X012c fc clrvt X012d 89 98 00 30 cmp dstreg, #immed X0131 8a 38 30 cmp dstreg, [ srcreg ] X0134 8a 39 30 cmp dstreg, [ srcreg ] + X0137 8b 01 34 12 30 cmp dstreg, extern X013c 8b 39 54 76 30 cmp dstreg, longoff [ srcreg ] X0141 8b 38 33 30 cmp dstreg, shortoff [ srcreg ] X0145 88 38 30 cmp dstreg, srcreg X0148 99 98 30 cmpb dstreg, #immed X014b 9a 38 30 cmpb dstreg, [ srcreg ] X014e 9a 39 30 cmpb dstreg, [ srcreg ] + X0151 9b 01 34 12 30 cmpb dstreg, extern X0156 9b 39 54 76 30 cmpb dstreg, longoff [ srcreg ] X015b 9b 38 33 30 cmpb dstreg, shortoff [ srcreg ] X015f 98 38 30 cmpb dstreg, srcreg X0162 05 30 dec dstreg X0164 15 30 decb dstreg X0166 fa di X0167 fe 8d 98 00 30 div dstreg, #immed X016c fe 8e 38 30 div dstreg, [ srcreg ] X0170 fe 8e 39 30 div dstreg, [ srcreg ] + X0174 fe 8f 01 34 12 30 div dstreg, extern X017a fe 8f 39 54 76 30 div dstreg, longoff [ srcreg ] X0180 fe 8f 38 33 30 div dstreg, shortoff [ srcreg ] X0185 fe 8c 38 30 div dstreg, srcreg X0189 fe 9d 98 30 divb dstreg, #immed X018d fe 9e 38 30 divb dstreg, [ srcreg ] X0191 fe 9e 39 30 divb dstreg, [ srcreg ] + X0195 fe 9f 01 34 12 30 divb dstreg, extern X019b fe 9f 39 54 76 30 divb dstreg, longoff [ srcreg ] X01a1 fe 9f 38 33 30 divb dstreg, shortoff [ srcreg ] X01a6 fe 9c 38 30 divb dstreg, srcreg X01aa 8d 98 00 30 divu dstreg, #immed X01ae 8e 38 30 divu dstreg, [ srcreg ] X01b1 8e 39 30 divu dstreg, [ srcreg ] + X01b4 8f 01 34 12 30 divu dstreg, extern X01b9 8f 39 54 76 30 divu dstreg, longoff [ srcreg ] X01be 8f 38 33 30 divu dstreg, shortoff [ srcreg ] X01c2 8c 38 30 divu dstreg, srcreg X01c5 9d 98 30 divub dstreg, #immed X01c8 9e 38 30 divub dstreg, [ srcreg ] X01cb 9e 39 30 divub dstreg, [ srcreg ] + X01ce 9f 01 34 12 30 divub dstreg, extern X01d3 9f 39 54 76 30 divub dstreg, longoff [ srcreg ] X01d8 9f 38 33 30 divub dstreg, shortoff [ srcreg ] X01dc 9c 38 30 divub dstreg, srcreg X01df e0 38 3b djnz srcreg, jmpdst X01e2 fb ei X01e3 06 30 ext dstreg X01e5 16 30 extb dstreg X01e7 07 30 inc dstreg X01e9 17 30 incb dstreg X01eb 30 38 2f jbc srcreg, 0, jmpdst X01ee 31 38 2c jbc srcreg, 1, jmpdst X01f1 32 38 29 jbc srcreg, 2, jmpdst X01f4 33 38 26 jbc srcreg, 3, jmpdst X01f7 34 38 23 jbc srcreg, 4, jmpdst X01fa 35 38 20 jbc srcreg, 5, jmpdst X01fd 36 38 1d jbc srcreg, 6, jmpdst X0200 37 38 1a jbc srcreg, 7, jmpdst X0203 38 38 17 jbs srcreg, 0, jmpdst X0206 39 38 14 jbs srcreg, 1, jmpdst X0209 3a 38 11 jbs srcreg, 2, jmpdst X020c 3b 38 0e jbs srcreg, 3, jmpdst X020f 3c 38 0b jbs srcreg, 4, jmpdst X0212 3d 38 08 jbs srcreg, 5, jmpdst X0215 3e 38 05 jbs srcreg, 6, jmpdst X0218 3f 38 02 jbs srcreg, 7, jmpdst X021b db 00 jc jmpdst X021d df fe jmpdst je jmpdst X021f d6 fc jge jmpdst X0221 d2 fa jgt jmpdst X0223 d9 f8 jh jmpdst X0225 da f6 jle jmpdst X0227 de f4 jlt jmpdst X0229 d3 f2 jnc jmpdst X022b d7 f0 jne jmpdst X022d d1 ee jnh jmpdst X022f d0 ec jnst jmpdst X0231 d5 ea jnv jmpdst X0233 d4 e8 jnvt jmpdst X0235 d8 e6 jst jmpdst X0237 dd e4 jv jmpdst X0239 dc e2 jvt jmpdst X023b ef df ff lcall jmpdst X023e a1 98 00 30 ld dstreg, #immed X0242 a2 38 30 ld dstreg, [ srcreg ] X0245 a2 39 30 ld dstreg, [ srcreg ] + X0248 a3 01 34 12 30 ld dstreg, extern X024d a3 39 54 76 30 ld dstreg, longoff [ srcreg ] X0252 a3 38 33 30 ld dstreg, shortoff [ srcreg ] X0256 a0 38 30 ld dstreg, srcreg X0259 b1 98 30 ldb dstreg, #immed X025c b2 38 30 ldb dstreg, [ srcreg ] X025f b2 39 30 ldb dstreg, [ srcreg ] + X0262 b3 01 34 12 30 ldb dstreg, extern X0267 b3 39 54 76 30 ldb dstreg, longoff [ srcreg ] X026c b3 38 33 30 ldb dstreg, shortoff [ srcreg ] X0270 b0 38 30 ldb dstreg, srcreg X0273 bd 98 30 ldbse dstreg, #immed X0276 be 38 30 ldbse dstreg, [ srcreg ] X0279 be 39 30 ldbse dstreg, [ srcreg ] + X027c bf 01 34 12 30 ldbse dstreg, extern X0281 bf 39 54 76 30 ldbse dstreg, longoff [ srcreg ] X0286 bf 38 33 30 ldbse dstreg, shortoff [ srcreg ] X028a bc 38 30 ldbse dstreg, srcreg X028d ad 98 30 ldbze dstreg, #immed X0290 ae 38 30 ldbze dstreg, [ srcreg ] X0293 ae 39 30 ldbze dstreg, [ srcreg ] + X0296 af 01 34 12 30 ldbze dstreg, extern X029b af 39 54 76 30 ldbze dstreg, longoff [ srcreg ] X02a0 af 38 33 30 ldbze dstreg, shortoff [ srcreg ] X02a4 ac 38 30 ldbze dstreg, srcreg X02a7 e7 73 ff ljmp jmpdst X02aa fe 6d 98 00 30 mul dstreg, #immed X02af fe 6e 38 30 mul dstreg, [ srcreg ] X02b3 fe 6e 39 30 mul dstreg, [ srcreg ] + X02b7 fe 6f 01 34 12 30 mul dstreg, extern X02bd fe 6f 39 54 76 30 mul dstreg, longoff [ srcreg ] X02c3 fe 6f 38 33 30 mul dstreg, shortoff [ srcreg ] X02c8 fe 6c 38 30 mul dstreg, srcreg X02cc fe 4d 98 00 44 30 mul dstreg, srcreg2, #immed X02d2 fe 4e 38 44 30 mul dstreg, srcreg2, [ srcreg ] X02d7 fe 4e 39 44 30 mul dstreg, srcreg2, [ srcreg ] + X02dc fe 4f 01 34 12 44 mul dstreg, srcreg2, extern X02e2 30 X02e3 fe 4f 39 54 76 44 mul dstreg, srcreg2, longoff [ srcreg ] X02e9 30 X02ea fe 4f 38 33 44 30 mul dstreg, srcreg2, shortoff [ srcreg ] X02f0 fe 4c 38 44 30 mul dstreg, srcreg2, srcreg X02f5 fe 7d 98 30 mulb dstreg, #immed X02f9 fe 7e 38 30 mulb dstreg, [ srcreg ] X02fd fe 7e 39 30 mulb dstreg, [ srcreg ] + X0301 fe 7f 01 34 12 30 mulb dstreg, extern X0307 fe 7f 39 54 76 30 mulb dstreg, longoff [ srcreg ] X030d fe 7f 38 33 30 mulb dstreg, shortoff [ srcreg ] X0312 fe 7c 38 30 mulb dstreg, srcreg X0316 fe 5d 98 44 30 mulb dstreg, srcreg2, #immed X031b fe 5e 38 44 30 mulb dstreg, srcreg2, [ srcreg ] X0320 fe 5e 39 44 30 mulb dstreg, srcreg2, [ srcreg ] + X0325 fe 5f 01 34 12 44 mulb dstreg, srcreg2, extern X032b 30 X032c fe 5f 39 54 76 44 mulb dstreg, srcreg2, longoff [ srcreg ] X0332 30 X0333 fe 5f 38 33 44 30 mulb dstreg, srcreg2, shortoff [ srcreg ] X0339 fe 5c 38 44 30 mulb dstreg, srcreg2, srcreg X033e 6d 98 00 30 mulu dstreg, #immed X0342 6e 38 30 mulu dstreg, [ srcreg ] X0345 6e 39 30 mulu dstreg, [ srcreg ] + X0348 6f 01 34 12 30 mulu dstreg, extern X034d 6f 39 54 76 30 mulu dstreg, longoff [ srcreg ] X0352 6f 38 33 30 mulu dstreg, shortoff [ srcreg ] X0356 6c 38 30 mulu dstreg, srcreg X0359 4d 98 00 44 30 mulu dstreg, srcreg2, #immed X035e 4e 38 44 30 mulu dstreg, srcreg2, [ srcreg ] X0362 4e 39 44 30 mulu dstreg, srcreg2, [ srcreg ] + X0366 4f 01 34 12 44 30 mulu dstreg, srcreg2, extern X036c 4f 39 54 76 44 30 mulu dstreg, srcreg2, longoff [ srcreg ] X0372 4f 38 33 44 30 mulu dstreg, srcreg2, shortoff [ srcreg ] X0377 4c 38 44 30 mulu dstreg, srcreg2, srcreg X037b 7d 98 30 mulub dstreg, #immed X037e 7e 38 30 mulub dstreg, [ srcreg ] X0381 7e 39 30 mulub dstreg, [ srcreg ] + X0384 7f 01 34 12 30 mulub dstreg, extern X0389 7f 39 54 76 30 mulub dstreg, longoff [ srcreg ] X038e 7f 38 33 30 mulub dstreg, shortoff [ srcreg ] X0392 7c 38 30 mulub dstreg, srcreg X0395 5d 98 44 30 mulub dstreg, srcreg2, #immed X0399 5e 38 44 30 mulub dstreg, srcreg2, [ srcreg ] X039d 5e 39 44 30 mulub dstreg, srcreg2, [ srcreg ] + X03a1 5f 01 34 12 44 30 mulub dstreg, srcreg2, extern X03a7 5f 39 54 76 44 30 mulub dstreg, srcreg2, longoff [ srcreg ] X03ad 5f 38 33 44 30 mulub dstreg, srcreg2, shortoff [ srcreg ] X03b2 5c 38 44 30 mulub dstreg, srcreg2, srcreg X03b6 03 30 neg dstreg X03b8 13 30 negb dstreg X03ba fd nop X03bb 0f 38 30 norml dstreg, srcreg X03be 02 30 not dstreg X03c0 12 30 notb dstreg X03c2 81 98 00 30 or dstreg, #immed X03c6 82 38 30 or dstreg, [ srcreg ] X03c9 82 39 30 or dstreg, [ srcreg ] + X03cc 83 01 34 12 30 or dstreg, extern X03d1 83 39 54 76 30 or dstreg, longoff [ srcreg ] X03d6 83 38 33 30 or dstreg, shortoff [ srcreg ] X03da 80 38 30 or dstreg, srcreg X03dd 91 98 30 orb dstreg, #immed X03e0 92 38 30 orb dstreg, [ srcreg ] X03e3 92 39 30 orb dstreg, [ srcreg ] + X03e6 93 01 34 12 30 orb dstreg, extern X03eb 93 39 54 76 30 orb dstreg, longoff [ srcreg ] X03f0 93 38 33 30 orb dstreg, shortoff [ srcreg ] X03f4 90 38 30 orb dstreg, srcreg X03f7 ce 38 pop [ srcreg ] X03f9 ce 39 pop [ srcreg ] + X03fb cf 01 34 12 pop extern X03ff cf 39 54 76 pop longoff [ srcreg ] X0403 cf 38 33 pop shortoff [ srcreg ] X0406 cc 38 pop srcreg X0408 f3 popf X0409 c9 98 00 push #immed X040c ca 38 push [ srcreg ] X040e ca 39 push [ srcreg ] + X0410 cb 01 34 12 push extern X0414 cb 39 54 76 push longoff [ srcreg ] X0418 cb 38 33 push shortoff [ srcreg ] X041b c8 38 push srcreg X041d f2 pushf X041e f0 ret X041f ff rst X0420 2d fb scall jmpdst X0422 f9 setc X0423 09 0a 30 shl dstreg, # shiftcount X0426 09 38 30 shl dstreg, srcreg X0429 19 0a 30 shlb dstreg, # shiftcount X042c 19 38 30 shlb dstreg, srcreg X042f 0d 0a 30 shll dstreg, # shiftcount X0432 0d 38 30 shll dstreg, srcreg X0435 08 0a 30 shr dstreg, # shiftcount X0438 08 38 30 shr dstreg, srcreg X043b 0a 0a 30 shra dstreg, # shiftcount X043e 0a 38 30 shra dstreg, srcreg X0441 1a 0a 30 shrab dstreg, # shiftcount X0444 1a 38 30 shrab dstreg, srcreg X0447 0e 0a 30 shral dstreg, # shiftcount X044a 0e 38 30 shral dstreg, srcreg X044d 18 0a 30 shrb dstreg, # shiftcount X0450 18 38 30 shrb dstreg, srcreg X0453 0c 0a 30 shrl dstreg, # shiftcount X0456 0c 38 30 shrl dstreg, srcreg X0459 25 c2 sjmp jmpdst X045b 00 30 skip dstreg X045d c2 38 30 st dstreg, [ srcreg ] X0460 c2 39 30 st dstreg, [ srcreg ] + X0463 c3 01 34 12 30 st dstreg, extern X0468 c3 39 54 76 30 st dstreg, longoff [ srcreg ] X046d c3 38 33 30 st dstreg, shortoff [ srcreg ] X0471 c0 38 30 st dstreg, srcreg X0474 c6 38 30 stb dstreg, [ srcreg ] X0477 c6 39 30 stb dstreg, [ srcreg ] + X047a c7 01 34 12 30 stb dstreg, extern X047f c7 39 54 76 30 stb dstreg, longoff [ srcreg ] X0484 c7 38 33 30 stb dstreg, shortoff [ srcreg ] X0488 c4 38 30 stb dstreg, srcreg X048b 69 98 00 30 sub dstreg, #immed X048f 6a 38 30 sub dstreg, [ srcreg ] X0492 6a 39 30 sub dstreg, [ srcreg ] + X0495 6b 01 34 12 30 sub dstreg, extern X049a 6b 39 54 76 30 sub dstreg, longoff [ srcreg ] X049f 6b 38 33 30 sub dstreg, shortoff [ srcreg ] X04a3 68 38 30 sub dstreg, srcreg X04a6 49 98 00 44 30 sub dstreg, srcreg2, #immed X04ab 4a 38 44 30 sub dstreg, srcreg2, [ srcreg ] X04af 4a 39 44 30 sub dstreg, srcreg2, [ srcreg ] + X04b3 4b 01 34 12 44 30 sub dstreg, srcreg2, extern X04b9 4b 39 54 76 44 30 sub dstreg, srcreg2, longoff [ srcreg ] X04bf 4b 38 33 44 30 sub dstreg, srcreg2, shortoff [ srcreg ] X04c4 48 38 44 30 sub dstreg, srcreg2, srcreg X04c8 79 98 30 subb dstreg, #immed X04cb 7a 38 30 subb dstreg, [ srcreg ] X04ce 7a 39 30 subb dstreg, [ srcreg ] + X04d1 7b 01 34 12 30 subb dstreg, extern X04d6 7b 39 54 76 30 subb dstreg, longoff [ srcreg ] X04db 7b 38 33 30 subb dstreg, shortoff [ srcreg ] X04df 78 38 30 subb dstreg, srcreg X04e2 59 98 44 30 subb dstreg, srcreg2, #immed X04e6 5a 38 44 30 subb dstreg, srcreg2, [ srcreg ] X04ea 5a 39 44 30 subb dstreg, srcreg2, [ srcreg ] + X04ee 5b 01 34 12 44 30 subb dstreg, srcreg2, extern X04f4 5b 39 54 76 44 30 subb dstreg, srcreg2, longoff [ srcreg ] X04fa 5b 38 33 44 30 subb dstreg, srcreg2, shortoff [ srcreg ] X04ff 58 38 44 30 subb dstreg, srcreg2, srcreg X0503 a9 98 00 30 subc dstreg, #immed X0507 aa 38 30 subc dstreg, [ srcreg ] X050a aa 39 30 subc dstreg, [ srcreg ] + X050d ab 01 34 12 30 subc dstreg, extern X0512 ab 39 54 76 30 subc dstreg, longoff [ srcreg ] X0517 ab 38 33 30 subc dstreg, shortoff [ srcreg ] X051b a8 38 30 subc dstreg, srcreg X051e b9 98 30 subcb dstreg, #immed X0521 ba 38 30 subcb dstreg, [ srcreg ] X0524 ba 39 30 subcb dstreg, [ srcreg ] + X0527 bb 01 34 12 30 subcb dstreg, extern X052c bb 39 54 76 30 subcb dstreg, longoff [ srcreg ] X0531 bb 38 33 30 subcb dstreg, shortoff [ srcreg ] X0535 b8 38 30 subcb dstreg, srcreg X0538 85 98 00 30 xor dstreg, #immed X053c 86 38 30 xor dstreg, [ srcreg ] X053f 86 39 30 xor dstreg, [ srcreg ] + X0542 87 01 34 12 30 xor dstreg, extern X0547 87 39 54 76 30 xor dstreg, longoff [ srcreg ] X054c 87 38 33 30 xor dstreg, shortoff [ srcreg ] X0550 84 38 30 xor dstreg, srcreg X0553 95 98 30 xorb dstreg, #immed X0556 96 38 30 xorb dstreg, [ srcreg ] X0559 96 39 30 xorb dstreg, [ srcreg ] + X055c 97 01 34 12 30 xorb dstreg, extern X0561 97 39 54 76 30 xorb dstreg, longoff [ srcreg ] X0566 97 38 33 30 xorb dstreg, shortoff [ srcreg ] X056a 94 38 30 xorb dstreg, srcreg X ERROR SUMMARY - ERRORS DETECTED 0 X - WARNINGS 0 SHAR_EOF true || echo 'restore of as8096.tut failed' fi true || echo 'restore of as8096.y failed' echo End of part 1, continue with part 2 exit 0