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- * Library of standard devices
- *
- * This is the master library for MicroSim's standard parts libraries.
- * You are welcome to make as many copies of it as you find convenient.
- *
- * Release date: 87/12/22
- *
-
- * Sample library of diode model parameters
- *
- * This is a reduced version of MicroSim's diode model library.
- * You are welcome to make as many copies of it as you find convenient.
- *
- * The parameters in this model library were derived from the data
- * sheets for each part. The methods used were as follows:
- * IS nominal leakage current
- * RS for zener diodes: nominal small-signal impedance
- * at specified operating current
- * IB for zener diodes: set to nominal leakage current
- * IBV for zener diodes: at specified operating current
- * IBV is adjusted to give the rated zener voltage
- *
- *
- *** Zener Diodes ***
- *
- * "A" suffix zeners have the same parameters (e.g., 1N750A has the same
- * parameters as 1N750)
- *
- .MODEL D1N752 D (IS=0.5UA RS=6 BV=5.20 IBV=0.5UA)
- .MODEL D1N754 D (IS=0.05UA RS=3 BV=6.41 IBV=0.05UA)
- .MODEL D1N759 D (IS=0.05UA RS=15 BV=11.37 IBV=0.05UA)
- *
- *** 1N916 ***
- *
- .MODEL D1N914 D (IS=100E-15 RS=16 CJO=2PF TT=12NS BV=100 IBV=100E-15)
- .MODEL D1N916 D (IS=100E-15 RS=8 CJO=1PF TT=12NS BV=100 IBV=100E-15)
- *
- * End of library file
-
- * Library of bipolar transistor model parameters
- *
- * This is a reduced version of MicroSim's bipolar transistor model library.
- * You are welcome to make as many copies of it as you find convenient.
- *
- * The parameters in this model library were derived from the data sheets for
- * each part. Where specified, the part was characterize using the Parts
- * option. Otherwise, methods used were as follows:
- *
- * NE, NC Normally set to 4
- * BF, ISE, IKF These are adjusted to give the nominal beta vs.
- * collector current curve. BF controls the mid-
- * range beta. ISE/IS controls the low-current
- * roll-off. IKF controls the high-current rolloff.
- * ISC Set to ISE.
- * IS, RB, RE, RC These are adjusted to give the nominal VBE vs.
- * IC and VCE vs. IC curves in saturation. IS
- * controls the low-current value of VBE. RB+RE
- * controls the rise of VBE with IC. RE+RC controls
- * the rise of VCE with IC. RC is normally set to 0.
- * VAF Using the voltages specified on the data sheet
- * VAF is set to give the nominal output impedance
- * (RO on the .OP printout) on the data sheet.
- * CJC, CJE Using the voltages specified on the data sheet
- * CJC and CJE are set to give the nominal input
- * and output capacitances (CPI and CMU on the .OP
- * printout; Cibo and Cobo on the data sheet).
- * TF Using the voltages and currents specified on the
- * data sheet for FT, TF is adjusted to produce the
- * nominal value of FT on the .OP printout.
- * TR Using the rise and fall time circuits on the
- * data sheet, TR (and if necessary TF) are adjusted
- * to give a transient analysis which shows the
- * nominal values of the turn-on delay, rise time,
- * storage time, and fall time.
- * KF, AF These parameters are only set if the data sheet has
- * a spec for noise. Then, AF is set to 1 and KF
- * is set to produce a total noise at the collector
- * which is greater than the generator noise at the
- * collector by the rated number of decibels.
- *
- *
- *** 2N2222 ***
- *
- .model Q2N2222 NPN(Is=3.108f Xti=3 Eg=1.11 Vaf=131.5 Bf=217.5 Ne=1.541
- + Ise=190.7f Ikf=1.296 Xtb=1.5 Br=6.18 Nc=2 Isc=0 Ikr=0 Rc=1
- + Cjc=14.57p Vjc=.75 Mjc=.3333 Fc=.5 Cje=26.08p Vje=.75
- + Mje=.3333 Tr=51.35n Tf=451p Itf=.1 Vtf=10 Xtf=2)
- *
- *** 2N2907
- *
- .model Q2N2907 PNP(Is=9.913f Xti=3 Eg=1.11 Vaf=90.7 Bf=197.8 Ne=2.264
- + Ise=6.191p Ikf=.7322 Xtb=1.5 Br=3.369 Nc=2 Isc=0 Ikr=0 Rc=1
- + Cjc=14.57p Vjc=.75 Mjc=.3333 Fc=.5 Cje=20.16p Vje=.75
- + Mje=.3333 Tr=29.17n Tf=405.6p Itf=.4 Vtf=10 Xtf=2)
-
- * Library of MOSFET model parameters (for "power" MOSFET devices)
- *
- * This is a reduced version of MicroSim's power MOSFET model library.
- * You are welcome to make as many copies of it as you find convenient.
- *
- * The parameters in this model library were derived from the data
- * sheets for each part. The methods used were as follows:
- * LEVEL Set to 3 (short-channel device).
- * TOX Determined from gate ratings.
- * L, LD, W, WD Assume L=2u. Calculate from input capacitance.
- * XJ, NSUB Assume usual technology.
- * IS, RD, RB Determined from "source-drain diode forward voltage"
- * specification or curve (Idr vs. Vsd).
- * RS Determine from Rds(on) specification.
- * RDS Calculated from Idss specification or curves.
- * VTO, UO, THETA Determined from "output characteristics" curve family
- * (Ids vs. Vds, stepped Vgs).
- * ETA, VMAX, CBS Set for null effect.
- * CBD, PB, MJ Determined from "capacitance vs. Vds" curves.
- * RG Calculate from rise/fall time specification or curves.
- * CGSO, CGDO Determined from gate-charge, turn-on/off delay and
- * rise time specifications.
- *
- * NOTE: when specifying the instance of a device in your circuit file:
- *
- * BE SURE to have the source and bulk nodes connected together, as this
- * is the way the real device is constructed.
- *
- * DO NOT include values for L, W, AD, AS, PD, PS, NRD, or NDS.
- * The PSpice default values for these parameters are taken into account
- * in the library model statements. Of course, you should NOT reset
- * the default values using the .OPTIONS statement, either.
- *
- * Example use: M17 15 23 7 7 IRF150
- *
- * - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- *
- * The "power" MOSFET device models benefit from relatively complete specifi-
- * cation of static and dynamic characteristics by their manufacturers. The
- * following effects are modeled:
- * - DC transfer curves in forward operation,
- * - gate drive characteristics and switching delay,
- * - "on" resistance,
- * - reverse-mode "body-diode" operation.
- *
- * The factors not modeled include:
- * - maximum ratings (eg. high-voltage breakdown),
- * - safe operating area (eg. power dissipation),
- * - latch-up,
- * - noise.
- *
- * For high-current switching applications, we advise that you include
- * series inductance elements, for the source and drain, in your circuit file.
- * In doing so, voltage spikes due to di/dt will be modeled. According to the
- * 1985 International Rectifier databook, the following case styles have lead
- * inductance values of:
- * TO-204 (modified TO-3) source = 12.5nH drain = 5.0nH
- * TO-220 source = 7.5nH drain = 3.5-4.5nH
- * - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- *
- * IRF150, from 1985 Siliconix databook, pages 1-7,8 and 5-22,3
- *
- .model IRF150 NMOS(Level=3 Gamma=0 Delta=0 Eta=0 Theta=0 Kappa=0 Vmax=0 Xj=0
- + Tox=100n Uo=600 Phi=.6 Rs=5.724m Kp=20.76u W=.31 L=2u
- + Vto=2.759 Rd=2.6m Rds=400K Cbd=4.039n Pb=.8 Mj=.5 Fc=.5
- + Cgso=8.984n Cgdo=1.62n Rg=18.6 Is=648.2E-18)
- *
- * IRF9130, from 1985 International Rectifier databook, pages D-187,92
- *
- .model IRF9130 PMOS(Level=3 Gamma=0 Delta=0 Eta=0 Theta=0 Kappa=0 Vmax=0 Xj=0
- + Tox=100n Uo=300 Phi=.6 Rs=.1429 Kp=9.899u W=1.1 L=2u
- + Vto=-3.418 Rd=74.02m Rds=400K Cbd=407.7p Pb=.8 Mj=.5 Fc=.5
- + Cgso=1.996n Cgdo=147p Rg=8.696 Is=1E-30)
- *
- * End of library file
-
- * Library of Op Amp subcircuit definitions
- *
- * This is a reduced version of MicroSim's opamp subcircuit library.
- * You are welcome to make as many copies of it as you find convenient.
- *
- * The parameters in this opamp library were derived from the data
- * sheets for each part. The macromodel used is described in:
- *
- * Macromodeling of Integrated Circuit Operational Amplifiers
- * by Graeme Boyle, Barry Cohn, Donald Pederson, and
- * James Solomon
- * IEEE Journal of Solid-State Circuits, Vol. SC-9, no. 6, Dec. 1974
- *
- * Differences from the reference (above) occur in the output limiting stage
- * which was modified to reduce internally generated currents associated with
- * output voltage limiting, as well as short-circuit current limiting.
- *
- * The opamps are modelled at room temperature. The macro model
- * does not track changes with temperature. This library file contains
- * models for nominal, not worst case, devices.
- *
- * Note: Each macromodel consists of a subcircuit definition AND a set
- * of .MODEL statements. The .MODEL statements should be put into
- * the main circuit file along with the subcircuit definition.
- *
- *
- *-----------------------------------------------------------------------------
- * connections: non-inverting input
- * | inverting input
- * | | positive power supply
- * | | | negative power supply
- * | | | | output
- * | | | | |
- .subckt uA741 1 2 3 4 5
- *
- c1 11 12 8.661E-12
- c2 6 7 30.00E-12
- dc 5 53 dx
- de 54 5 dx
- dlp 90 91 dx
- dln 92 90 dx
- dp 4 3 dx
- egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5
- fb 7 99 poly(5) vb vc ve vlp vln 0 10.61E6 -10E6 10E6 10E6 -10E6
- ga 6 0 11 12 188.5E-6
- gcm 0 6 10 99 5.961E-9
- iee 10 4 dc 15.16E-6
- hlim 90 0 vlim 1K
- q1 11 2 13 qx
- q2 12 1 14 qx
- r2 6 9 100.0E3
- rc1 3 11 5.305E3
- rc2 3 12 5.305E3
- re1 13 10 1.836E3
- re2 14 10 1.836E3
- ree 10 99 13.19E6
- ro1 8 5 50
- ro2 7 99 100
- rp 3 4 18.16E3
- vb 9 0 dc 0
- vc 3 53 dc 1
- ve 54 4 dc 1
- vlim 7 8 dc 0
- vlp 91 0 dc 40
- vln 0 92 dc 40
- .model dx D(Is=800.0E-18)
- .model qx NPN(Is=800.0E-18 Bf=93.75)
- .ends
- *
- * End of library file
-
- * Library of Comparator subcircuit definitions
- *
- * This is a reduced version of MicroSim's voltage comparator subcircuit
- * library. You are welcome to make as many copies of it as you find
- * convenient.
- *
- * The parameters in this opamp library were derived from the data
- * sheets for each part. The comparator macro model used is derived
- * from the op amp macro model used in the OPNOM.LIB file. The op amp
- * macro model is described in:
- *
- * Macromodeling of Integrated Circuit Operational Amplifiers
- * by Graeme Boyle, Barry Cohn, Donald Pederson, and
- * James Solomon
- * IEEE Journal of Solid-State Circuits, Vol. SC-9, no. 6, Dec. 1974
- *
- * Although we do not use it, a slightly more elaborate comparator macro
- * model is described in:
- *
- * An Integrated-Circuit Comparator Macromodel
- * by Ian Getreu, Andreas Hadiwidjaja, and Johan Brinch
- * IEEE Journal of Solid-State Circuits, Vol. SC-11, no. 6, Dec. 1976
- *
- * This reference covers the considerations that go into duplicating the
- * behavior of voltage comparators.
- *
- * The comparators are modelled at room temperature. The macro model
- * does not track changes with temperature. This library file contains
- * models for nominal, not worst case, devices.
- *
- *-----------------------------------------------------------------------------
- * connections: non-inverting input
- * | inverting input
- * | | positive power supply
- * | | | negative power supply
- * | | | | open collector output
- * | | | | | output ground
- * | | | | | |
- .subckt LM111 1 2 3 4 5 6
- *
- f1 9 3 v1 1
- iee 3 7 dc 100.0E-6
- vi1 21 1 dc .45
- vi2 22 2 dc .45
- q1 9 21 7 qin
- q2 8 22 7 qin
- q3 9 8 4 qmo
- q4 8 8 4 qmi
- .model qin PNP(Is=800.0E-18 Bf=833.3)
- .model qmi NPN(Is=800.0E-18 Bf=1002)
- .model qmo NPN(Is=800.0E-18 Bf=1000 Cjc=1E-15 Tr=118.8E-9)
- e1 10 6 9 4 1
- v1 10 11 dc 0
- q5 5 11 6 qoc
- .model qoc NPN(Is=800.0E-18 Bf=34.49E3 Cjc=1E-15 Tf=364.6E-12 Tr=79.34E-9)
- dp 4 3 dx
- rp 3 4 6.122E3
- .model dx D(Is=800.0E-18)
- *
- .ends
- *
- * End of library file
- *
- * End of library file
-