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C/C++ Source or Header  |  1993-01-04  |  3.3 KB  |  123 lines
  1. /* Copyright (c) 1992 NeXT Computer, Inc.  All rights reserved.
  2.  *
  3.  *    File:    architecture/m98k/fp_regs.h
  4.  *    Author:    Doug Mitchell, NeXT Computer, Inc.
  5.  *
  6.  *    m98k floating point registers.
  7.  *
  8.  * HISTORY
  9.  * 05-Nov-92  Doug Mitchell at NeXT
  10.  *    Created.
  11.  */
  12.  
  13. #ifndef _ARCH_M98K_FP_REGS_H_
  14. #define _ARCH_M98K_FP_REGS_H_
  15.  
  16. #import <architecture/m98k/reg_help.h>
  17.  
  18. /*
  19.  * Floating point status and control register.
  20.  *
  21.  * This struct is aligned to an 8-byte boundary because 64-bit
  22.  * load/store instructions (lfd/stfd) are used to access it. The
  23.  * FPSCR can only be read/written through other FP registers.
  24.  */
  25. typedef struct {
  26.         unsigned        unused[1] __attribute__(( aligned(8) ));
  27.     unsigned    fx:BIT_WIDTH(31),    // exception summary
  28.             fex:BIT_WIDTH(30),    // enabled exception summary
  29.             vx:BIT_WIDTH(29),    // invalid op exception
  30.                         //    summary
  31.             ox:BIT_WIDTH(28),    // overflow exception
  32.             ux:BIT_WIDTH(27),    // underflow exception
  33.             zx:BIT_WIDTH(26),    // divide by zero exception
  34.             xx:BIT_WIDTH(25),    // inexact exception
  35.             vx_snan:BIT_WIDTH(24),    // not a number exception
  36.             vx_isi:BIT_WIDTH(23),    // exception
  37.             vx_idi:BIT_WIDTH(22),    // exception
  38.             vx_zdz:BIT_WIDTH(21),    // exception
  39.             vx_imz:BIT_WIDTH(20),    // exception
  40.             vx_xvc:BIT_WIDTH(19),    // exception
  41.             fr:BIT_WIDTH(18),    // fraction rounded
  42.             fi:BIT_WIDTH(17),    // fraction inexact
  43.             class:BIT_WIDTH(16),    // class descriptor
  44.             fl:BIT_WIDTH(15),    // negative
  45.             fg:BIT_WIDTH(14),    // positive
  46.             fe:BIT_WIDTH(13),    // equal or zero
  47.             fu:BIT_WIDTH(12),    // not a number
  48.             rsvd1:BIT_WIDTH(11),    // reserved
  49.             vx_soft:BIT_WIDTH(10),    // software request exception
  50.             rsvd2:BIT_WIDTH(9),    // reserved
  51.             vx_cvi:BIT_WIDTH(8),    // invalid integer convert
  52.                         //    exception
  53.             ve:BIT_WIDTH(7),    // invalid op exception enable
  54.             oe:BIT_WIDTH(6),    // overflow exception enable
  55.             ue:BIT_WIDTH(5),    // underflow exception enable
  56.             ze:BIT_WIDTH(4),    // divide by zero exception
  57.                         //    enable
  58.             xe:BIT_WIDTH(3),    // inexact exception enable
  59.             ni:BIT_WIDTH(2),    // non-IEEE exception enable
  60.             rn:BITS_WIDTH(1,0);    // rounding control
  61. } m98k_fp_scr_t;
  62.  
  63. /*
  64.  * Values for fp_scr_t.rn (rounding control).
  65.  */
  66. typedef enum {
  67.     RN_NEAREST = 0,
  68.     RN_TOWARD_ZERO = 1,
  69.     RN_TOWARD_PLUS = 2,
  70.     RN_TOWARD_MINUS = 3,
  71. } m98k_fp_rn_t;
  72.  
  73. /*
  74.  * m98k_fpf_t -- data types that MAY be in floating point register file
  75.  * Actual data types supported is implementation dependent
  76.  */
  77. typedef union {
  78.         float           f;              // 32 bit IEEE single
  79.         double          d;              // 64 bit IEEE double
  80.      
  81.         /* 
  82.      * Insure compiler aligns struct appropriately 
  83.      */
  84.         unsigned        x[2] __attribute__(( aligned(8) ));
  85. } m98k_fpf_t;
  86.  
  87. /*
  88.  * Number of FP registers.
  89.  */
  90. #define M98K_NFP_REGS    32
  91.  
  92. /*
  93.  * Read/write FPSCR.
  94.  * FIXME - these don't work, you need to go thru a fp register.
  95.  */
  96. typedef union {
  97.     double         __dbl;
  98.     m98k_fp_scr_t     __scr;
  99. } __fp_un_t;
  100.  
  101. static __inline__ m98k_fp_scr_t
  102. get_fp_scr()
  103. {
  104.     __fp_un_t     __fp_un;
  105.     
  106.     __asm__ volatile ("mffs. %0           /* mffs */"    \
  107.           : "=f" (__fp_un.__dbl));
  108.     return (__fp_un.__scr);        
  109. }
  110.  
  111. static __inline__ void
  112. set_fp_scr(m98k_fp_scr_t fp_scr)
  113. {
  114.     __fp_un_t     __fp_un;
  115.  
  116.     __fp_un.__scr = fp_scr;
  117.     __asm__ volatile ("mtfsf 0xff, %0;    /* mtfsf */ "    \
  118.       : : "f" (__fp_un.__dbl));    
  119. }
  120.  
  121.  
  122. #endif    _ARCH_M98K_FP_REGS_H_
  123.