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- ; This example demonstrates situations
- ; where the PLDshell design compiler can
- ; and cannot fit a design to the EPX780
- ; due to constraints on the number of
- ; product terms that a macrocell can
- ; access. Essentially, o1 and o2 are
- ; sum-of-products outputs with 8 product
- ; terms each. If they are assigned to
- ; adjacent macrocells, the design will
- ; not fit because there are not enough
- ; product terms to share. If you move
- ; o2 slightly farther from o1, then there
- ; are sufficient product terms to share
- ; and the design will fit in the EPX780.
- ;
- ; SET COMPILER OPTIONS TO:
- ; Use Design Pin Assignments, but not
- ; Previous, Abort on no fit
-
- CHIP product NFX780_84
-
- PIN a[0:7] ; eight inputs
- PIN 82 o1 ; first output
-
- ;second output adjacent to o1
- ;PIN 83 o2 ; second output (no fit!)
-
- ; second output not adjacent to o1
- PIN 84 o2 ; second output (this fits!)
-
- EQUATIONS
- o1 = a0*a1 + a1*a2 + a2*a3 + a3*a4 +
- a4*a5 + a5*a6 + a6*a7 + a7*a0
- o2 = a0*a3 + a1*a4 + a2*a5 + a3*a6 +
- a4*a7 + a5*a0 + a6*a1 + a7*a2
-