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- ; This example demonstrates situations
- ; where the PLDshell design compiler can
- ; and cannot fit a design to the EPX780
- ; due to constraints on the control
- ; signals. Essentially, all preset, clear,
- ; clock, and tristate controls can only
- ; include a single product term.
- ;
- ; SET COMPILER OPTIONS TO:
- ; Use Design Pin Assignments, but not
- ; Previous, Abort on no fit
-
- CHIP product NFX780_84
-
- PIN a[0:7] ; eight inputs
- PIN 82 o1 ; first output
-
- EQUATIONS
-
- ; o1 is in registered mode, so the
- ; flip-flop is strobed by the clock
- o1 := a0*a1 + a1*a2 + a2*a3 + a3*a4
-
- ; this describes the asynchronous clock
- ; which can only have a single product term
- ; o1.ACLK = a5*a6 + a6*a7 ; this doesn't fit!
- o1.ACLK = a5*a6 ; this fits!
-
- ; this describes the preset term which can
- ; only have a single product term
- ; o1.SETF = a5*a6 + a6*a7 ; this doesn't fit!
- o1.SETF = a5*a6 ; this fits!
-
- ; this describes the clear term which can
- ; only have a single product term
- ; o1.RSTF = a5*a6 + a6*a7 ; this doesn't fit!
- o1.RSTF = a5*a6 ; this fits!
-
- ; this describes the tristate enable term
- ; which can only have a single product term
- ; o1.TRST = a5*a6 + a6*a7 ; this doesn't fit!
- o1.TRST = a5*a6 ; this fits!
-