(***************************************************************************)
(*                                                                         *)
(*                         Copyright (C) 1987-1990                         *)
(*                      by Gogesch Micro Systems, INC.                     *)
(*                                                                         *)
(*                           All rights reserved.                          *)
(*                                                                         *)
(***************************************************************************)


;MODELS FOR THE FOLLOWING DEVICES WERE TAKEN FROM NATIONAL
;PRELIMINARY DATA SHEETS 1988 UNLESS OTHERWISE SPECIFIED.
;
;Delays used were for `typical' and `maximum' throughout.
;
;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:10H8
%PartNumber:NATL'PAL10H8
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7 P8 ~P8 P9 ~P9
     P11 ~P11 *

OR(%FF00, %FF20; P19; 25,25,35,35);
OR(%FF40, %FF60; P18; 25,25,35,35);
OR(%FF80, %FF100; P17; 25,25,35,35);
OR(%FF120, %FF140; P16; 25,25,35,35);
OR(%FF160, %FF180; P15; 25,25,35,35);
OR(%FF200, %FF220; P14; 25,25,35,35);
OR(%FF240, %FF260; P13; 25,25,35,35);
OR(%FF280, %FF300; P12; 25,25,35,35);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:10H8
%PartNumber:NATL'PAL10H8A
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7 P8 ~P8 P9 ~P9
     P11 ~P11 *

OR(%FF00, %FF20; P19; 15,15,25,25);
OR(%FF40, %FF60; P18; 15,15,25,25);
OR(%FF80, %FF100; P17; 15,15,25,25);
OR(%FF120, %FF140; P16; 15,15,25,25);
OR(%FF160, %FF180; P15; 15,15,25,25);
OR(%FF200, %FF220; P14; 15,15,25,25);
OR(%FF240, %FF260; P13; 15,15,25,25);
OR(%FF280, %FF300; P12; 15,15,25,25);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:10H8
%PartNumber:NATL'PAL10H8A2
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7 P8 ~P8 P9 ~P9
     P11 ~P11 *

OR(%FF00, %FF20; P19; 25,25,35,35);
OR(%FF40, %FF60; P18; 25,25,35,35);
OR(%FF80, %FF100; P17; 25,25,35,35);
OR(%FF120, %FF140; P16; 25,25,35,35);
OR(%FF160, %FF180; P15; 25,25,35,35);
OR(%FF200, %FF220; P14; 25,25,35,35);
OR(%FF240, %FF260; P13; 25,25,35,35);
OR(%FF280, %FF300; P12; 25,25,35,35);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:10L8
%PartNumber:NATL'PAL10L8
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7 P8 ~P8 P9 ~P9
     P11 ~P11 *

NOR(%FF00, %FF20; P19; 25,25,35,35);
NOR(%FF40, %FF60; P18; 25,25,35,35);
NOR(%FF80, %FF100; P17; 25,25,35,35);
NOR(%FF120, %FF140; P16; 25,25,35,35);
NOR(%FF160, %FF180; P15; 25,25,35,35);
NOR(%FF200, %FF220; P14; 25,25,35,35);
NOR(%FF240, %FF260; P13; 25,25,35,35);
NOR(%FF280, %FF300; P12; 25,25,35,35);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:10L8
%PartNumber:NATL'PAL10L8A
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7 P8 ~P8 P9 ~P9
     P11 ~P11 *

NOR(%FF00, %FF20; P19; 15,15,25,25);
NOR(%FF40, %FF60; P18; 15,15,25,25);
NOR(%FF80, %FF100; P17; 15,15,25,25);
NOR(%FF120, %FF140; P16; 15,15,25,25);
NOR(%FF160, %FF180; P15; 15,15,25,25);
NOR(%FF200, %FF220; P14; 15,15,25,25);
NOR(%FF240, %FF260; P13; 15,15,25,25);
NOR(%FF280, %FF300; P12; 15,15,25,25);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:10L8
%PartNumber:NATL'PAL10L8A2
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7 P8 ~P8 P9 ~P9
     P11 ~P11 *

NOR(%FF00, %FF20; P19; 25,25,35,35);
NOR(%FF40, %FF60; P18; 25,25,35,35);
NOR(%FF80, %FF100; P17; 25,25,35,35);
NOR(%FF120, %FF140; P16; 25,25,35,35);
NOR(%FF160, %FF180; P15; 25,25,35,35);
NOR(%FF200, %FF220; P14; 25,25,35,35);
NOR(%FF240, %FF260; P13; 25,25,35,35);
NOR(%FF280, %FF300; P12; 25,25,35,35);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:12H6
%PartNumber:NATL'PAL12H6
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7
     P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

OR(%FF00, %FF24, %FF48, %FF72; P18; 25,25,35,35);
OR(%FF96, %FF120; P17; 25,25,35,35);
OR(%FF144, %FF168; P16; 25,25,35,35);
OR(%FF192, %FF216; P15; 25,25,35,35);
OR(%FF240, %FF264; P14; 25,25,35,35);
OR(%FF288, %FF312, %FF336, %FF360; P13; 25,25,35,35);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:12H6
%PartNumber:NATL'PAL12H6A
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7
     P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

OR(%FF00, %FF24, %FF48, %FF72; P18; 15,15,25,25);
OR(%FF96, %FF120; P17; 15,15,25,25);
OR(%FF144, %FF168; P16; 15,15,25,25);
OR(%FF192, %FF216; P15; 15,15,25,25);
OR(%FF240, %FF264; P14; 15,15,25,25);
OR(%FF288, %FF312, %FF336, %FF360; P13; 15,15,25,25);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:12H6
%PartNumber:NATL'PAL12H6A2
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7
     P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

OR(%FF00, %FF24, %FF48, %FF72; P18; 25,25,35,35);
OR(%FF96, %FF120; P17; 25,25,35,35);
OR(%FF144, %FF168; P16; 25,25,35,35);
OR(%FF192, %FF216; P15; 25,25,35,35);
OR(%FF240, %FF264; P14; 25,25,35,35);
OR(%FF288, %FF312, %FF336, %FF360; P13; 25,25,35,35);
%EndModel

%StartModel
%Manufacturer:National
%Type:12L10
%PartNumber:NATL'PAL12L10
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7 P8 ~P8 P9 ~P9
     P10 ~P10 P11 ~P11 P13 ~P13 *

NOR(%FF00, %FF24; P23; 25,25,40,40);
NOR(%FF48, %FF72; P22; 25,25,40,40);
NOR(%FF96, %FF120; P21; 25,25,40,40);
NOR(%FF144, %FF168; P20; 25,25,40,40);
NOR(%FF192, %FF216; P19; 25,25,40,40);
NOR(%FF240, %FF264; P18; 25,25,40,40);
NOR(%FF288, %FF312; P17; 25,25,40,40);
NOR(%FF336, %FF360; P16; 25,25,40,40);
NOR(%FF384, %FF408; P15; 25,25,40,40);
NOR(%FF432, %FF456; P14; 25,25,40,40);
%EndModel

%StartModel
%Manufacturer:National
%Type:12L10
%PartNumber:NATL'PAL12L10A
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7 P8 ~P8 P9 ~P9
     P10 ~P10 P11 ~P11 P13 ~P13 *

NOR(%FF00, %FF24; P23; 15,15,25,25);
NOR(%FF48, %FF72; P22; 15,15,25,25);
NOR(%FF96, %FF120; P21; 15,15,25,25);
NOR(%FF144, %FF168; P20; 15,15,25,25);
NOR(%FF192, %FF216; P19; 15,15,25,25);
NOR(%FF240, %FF264; P18; 15,15,25,25);
NOR(%FF288, %FF312; P17; 15,15,25,25);
NOR(%FF336, %FF360; P16; 15,15,25,25);
NOR(%FF384, %FF408; P15; 15,15,25,25);
NOR(%FF432, %FF456; P14; 15,15,25,25);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:12L6
%PartNumber:NATL'PAL12L6
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7
     P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

NOR(%FF00, %FF24, %FF48, %FF72; P18; 25,25,35,35);
NOR(%FF96, %FF120; P17; 25,25,35,35);
NOR(%FF144, %FF168; P16; 25,25,35,35);
NOR(%FF192, %FF216; P15; 25,25,35,35);
NOR(%FF240, %FF264; P14; 25,25,35,35);
NOR(%FF288, %FF312, %FF336, %FF360; P13; 25,25,35,35);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:12L6
%PartNumber:NATL'PAL12L6A
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7
     P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

NOR(%FF00, %FF24, %FF48, %FF72; P18; 15,15,25,25);
NOR(%FF96, %FF120; P17; 15,15,25,25);
NOR(%FF144, %FF168; P16; 15,15,25,25);
NOR(%FF192, %FF216; P15; 15,15,25,25);
NOR(%FF240, %FF264; P14; 15,15,25,25);
NOR(%FF288, %FF312, %FF336, %FF360; P13; 15,15,25,25);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:12L6
%PartNumber:NATL'PAL12L6A2
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7
     P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

NOR(%FF00, %FF24, %FF48, %FF72; P18; 25,25,35,35);
NOR(%FF96, %FF120; P17; 25,25,35,35);
NOR(%FF144, %FF168; P16; 25,25,35,35);
NOR(%FF192, %FF216; P15; 25,25,35,35);
NOR(%FF240, %FF264; P14; 25,25,35,35);
NOR(%FF288, %FF312, %FF336, %FF360; P13; 25,25,35,35);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:14H4
%PartNumber:NATL'PAL14H4
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P18 ~P18 P5 ~P5 P6 ~P6
     P7 ~P7 P13 ~P13 P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

OR(%FF00, %FF28, %FF56, %FF84; P17; 25,25,35,35);
OR(%FF112, %FF140, %FF168, %FF196; P16; 25,25,35,35);
OR(%FF224, %FF252, %FF280, %FF308; P15; 25,25,35,35);
OR(%FF336, %FF364, %FF392, %FF420; P14; 25,25,35,35);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:14H4
%PartNumber:NATL'PAL14H4A
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P18 ~P18 P5 ~P5 P6 ~P6
     P7 ~P7 P13 ~P13 P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

OR(%FF00, %FF28, %FF56, %FF84; P17; 15,15,25,25);
OR(%FF112, %FF140, %FF168, %FF196; P16; 15,15,25,25);
OR(%FF224, %FF252, %FF280, %FF308; P15; 15,15,25,25);
OR(%FF336, %FF364, %FF392, %FF420; P14; 15,15,25,25);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:14H4
%PartNumber:NATL'PAL14H4A2
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P18 ~P18 P5 ~P5 P6 ~P6
     P7 ~P7 P13 ~P13 P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

OR(%FF00, %FF28, %FF56, %FF84; P17; 25,25,35,35);
OR(%FF112, %FF140, %FF168, %FF196; P16; 25,25,35,35);
OR(%FF224, %FF252, %FF280, %FF308; P15; 25,25,35,35);
OR(%FF336, %FF364, %FF392, %FF420; P14; 25,25,35,35);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:14L4
%PartNumber:NATL'PAL14L4
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P18 ~P18 P5 ~P5 P6 ~P6
     P7 ~P7 P13 ~P13 P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

NOR(%FF00, %FF28, %FF56, %FF84; P17; 25,25,35,35);
NOR(%FF112, %FF140, %FF168, %FF196; P16; 25,25,35,35);
NOR(%FF224, %FF252, %FF280, %FF308; P15; 25,25,35,35);
NOR(%FF336, %FF364, %FF392, %FF420; P14; 25,25,35,35);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:14L4
%PartNumber:NATL'PAL14L4A
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P18 ~P18 P5 ~P5 P6 ~P6
     P7 ~P7 P13 ~P13 P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

NOR(%FF00, %FF28, %FF56, %FF84; P17; 15,15,25,25);
NOR(%FF112, %FF140, %FF168, %FF196; P16; 15,15,25,25);
NOR(%FF224, %FF252, %FF280, %FF308; P15; 15,15,25,25);
NOR(%FF336, %FF364, %FF392, %FF420; P14; 15,15,25,25);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:14L4
%PartNumber:NATL'PAL14L4A2
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P18 ~P18 P5 ~P5 P6 ~P6
     P7 ~P7 P13 ~P13 P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

NOR(%FF00, %FF28, %FF56, %FF84; P17; 25,25,35,35);
NOR(%FF112, %FF140, %FF168, %FF196; P16; 25,25,35,35);
NOR(%FF224, %FF252, %FF280, %FF308; P15; 25,25,35,35);
NOR(%FF336, %FF364, %FF392, %FF420; P14; 25,25,35,35);
%EndModel

%StartModel
%Manufacturer:National
%Type:14L8
%PartNumber:NATL'PAL14L8
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P23 ~P23 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7
     P8 ~P8 P9 ~P9 P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

NOR(%FF00, %FF28, %FF56, %FF84; P22; 25,25,40,40);
NOR(%FF112, %FF140; P21; 25,25,40,40);
NOR(%FF168, %FF196; P20; 25,25,40,40);
NOR(%FF224, %FF252; P19; 25,25,40,40);
NOR(%FF280, %FF308; P18; 25,25,40,40);
NOR(%FF336, %FF364; P17; 25,25,40,40);
NOR(%FF392, %FF420; P16; 25,25,40,40);
NOR(%FF448, %FF476, %FF504, %FF532; P15; 25,25,40,40);
%EndModel

%StartModel
%Manufacturer:National
%Type:14L8
%PartNumber:NATL'PAL14L8A
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P23 ~P23 P4 ~P4 P5 ~P5 P6 ~P6 P7 ~P7
     P8 ~P8 P9 ~P9 P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

NOR(%FF00, %FF28, %FF56, %FF84; P22; 15,15,25,25);
NOR(%FF112, %FF140; P21; 15,15,25,25);
NOR(%FF168, %FF196; P20; 15,15,25,25);
NOR(%FF224, %FF252; P19; 15,15,25,25);
NOR(%FF280, %FF308; P18; 15,15,25,25);
NOR(%FF336, %FF364; P17; 15,15,25,25);
NOR(%FF392, %FF420; P16; 15,15,25,25);
NOR(%FF448, %FF476, %FF504, %FF532; P15; 15,15,25,25);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
;Data for "other"delays not given; used ("max"-10)ns.
%StartModel
%Manufacturer:National
%Type:16C1
%PartNumber:NATL'PAL16C1
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P18 ~P18 P5 ~P5 P17 ~P17
     P6 ~P6 P14 ~P14 P7 ~P7 P13 ~P13 P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

LOR(%FF00, %FF32, %FF64, %FF96, %FF128, %FF160, %FF192, %FF224, %FF256,
   %FF288, %FF320, %FF352, %FF384, %FF416, %FF448, %FF480; L1);
BUF(L1; P16; 25,25,35,35);
INV(L1; P15; 25,25,35,35);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
;Data for "other"delays not given; used ("max"-10)ns.
%StartModel
%Manufacturer:National
%Type:16C1
%PartNumber:NATL'PAL16C1A
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P18 ~P18 P5 ~P5 P17 ~P17
     P6 ~P6 P14 ~P14 P7 ~P7 P13 ~P13 P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

LOR(%FF00, %FF32, %FF64, %FF96, %FF128, %FF160, %FF192, %FF224, %FF256,
   %FF288, %FF320, %FF352, %FF384, %FF416, %FF448, %FF480; L1);
BUF(L1; P16; 20,20,30,30);
INV(L1; P15; 20,20,30,30);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
;Data for "other"delays not given; used ("max"-10)ns.
%StartModel
%Manufacturer:National
%Type:16C1
%PartNumber:NATL'PAL16C1A2
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P18 ~P18 P5 ~P5 P17 ~P17
     P6 ~P6 P14 ~P14 P7 ~P7 P13 ~P13 P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

LOR(%FF00, %FF32, %FF64, %FF96, %FF128, %FF160, %FF192, %FF224, %FF256,
   %FF288, %FF320, %FF352, %FF384, %FF416, %FF448, %FF480; L1);
BUF(L1; P16; 30,30,40,40);
INV(L1; P15; 30,30,40,40);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16H2
%PartNumber:NATL'PAL16H2
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P18 ~P18 P5 ~P5 P17 ~P17
     P6 ~P6 P14 ~P14 P7 ~P7 P13 ~P13 P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

OR(%FF00, %FF32, %FF64, %FF96, %FF128, %FF160, %FF192, %FF224; P16; 25,25,35,35);
OR(%FF256, %FF288, %FF320, %FF352, %FF384, %FF416, %FF448, %FF480; P15; 25,25,35,35);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16H2
%PartNumber:NATL'PAL16H2A
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P18 ~P18 P5 ~P5 P17 ~P17
     P6 ~P6 P14 ~P14 P7 ~P7 P13 ~P13 P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

OR(%FF00, %FF32, %FF64, %FF96, %FF128, %FF160, %FF192, %FF224; P16; 15,15,25,25);
OR(%FF256, %FF288, %FF320, %FF352, %FF384, %FF416, %FF448, %FF480; P15; 15,15,25,25);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16H2
%PartNumber:NATL'PAL16H2A2
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P18 ~P18 P5 ~P5 P17 ~P17
     P6 ~P6 P14 ~P14 P7 ~P7 P13 ~P13 P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

OR(%FF00, %FF32, %FF64, %FF96, %FF128, %FF160, %FF192, %FF224; P16; 25,25,35,35);
OR(%FF256, %FF288, %FF320, %FF352, %FF384, %FF416, %FF448, %FF480; P15; 25,25,35,35);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16L2
%PartNumber:NATL'PAL16L2
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P18 ~P18 P5 ~P5 P17 ~P17
     P6 ~P6 P14 ~P14 P7 ~P7 P13 ~P13 P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

NOR(%FF00, %FF32, %FF64, %FF96, %FF128, %FF160, %FF192, %FF224; P16; 25,25,35,35);
NOR(%FF256, %FF288, %FF320, %FF352, %FF384, %FF416, %FF448, %FF480; P15; 25,25,35,35);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16L2
%PartNumber:NATL'PAL16L2A
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P18 ~P18 P5 ~P5 P17 ~P17
     P6 ~P6 P14 ~P14 P7 ~P7 P13 ~P13 P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

NOR(%FF00, %FF32, %FF64, %FF96, %FF128, %FF160, %FF192, %FF224; P16; 15,15,25,25);
NOR(%FF256, %FF288, %FF320, %FF352, %FF384, %FF416, %FF448, %FF480; P15; 15,15,25,25);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16L2
%PartNumber:NATL'PAL16L2A2
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P19 ~P19 P4 ~P4 P18 ~P18 P5 ~P5 P17 ~P17
     P6 ~P6 P14 ~P14 P7 ~P7 P13 ~P13 P8 ~P8 P12 ~P12 P9 ~P9 P11 ~P11 *

NOR(%FF00, %FF32, %FF64, %FF96, %FF128, %FF160, %FF192, %FF224; P16; 25,25,35,35);
NOR(%FF256, %FF288, %FF320, %FF352, %FF384, %FF416, %FF448, %FF480; P15; 25,25,35,35);
%EndModel

%StartModel
%Manufacturer:National
%Type:16L6
%PartNumber:NATL'PAL16L6
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P23 ~P23 P4 ~P4 P22 ~P22 P5 ~P5 P6 ~P6
     P7 ~P7 P8 ~P8 P9 ~P9 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

NOR(%FF00, %FF32, %FF64, %FF96; P21; 25,25,40,40);
NOR(%FF128, %FF160, %FF192, %FF224; P20; 25,25,40,40);
NOR(%FF256, %FF288; P19; 25,25,40,40);
NOR(%FF320, %FF352; P18; 25,25,40,40);
NOR(%FF384, %FF416, %FF448, %FF480; P17; 25,25,40,40);
NOR(%FF512, %FF544, %FF576, %FF608; P16; 25,25,40,40);
%EndModel

%StartModel
%Manufacturer:National
%Type:16L6
%PartNumber:NATL'PAL16L6A
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P23 ~P23 P4 ~P4 P22 ~P22 P5 ~P5 P6 ~P6
     P7 ~P7 P8 ~P8 P9 ~P9 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

NOR(%FF00, %FF32, %FF64, %FF96; P21; 15,15,25,25);
NOR(%FF128, %FF160, %FF192, %FF224; P20; 15,15,25,25);
NOR(%FF256, %FF288; P19; 15,15,25,25);
NOR(%FF320, %FF352; P18; 15,15,25,25);
NOR(%FF384, %FF416, %FF448, %FF480; P17; 15,15,25,25);
NOR(%FF512, %FF544, %FF576, %FF608; P16; 15,15,25,25);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16L8
%PartNumber:NATL'PAL16L8
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P18 ~P18 P4 ~P4 P17 ~P17 P5 ~P5 P16 ~P16
     P6 ~P6 P15 ~P15 P7 ~P7 P14 ~P14 P8 ~P8 P13 ~P13 P9 ~P9 P11 ~P11 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 25,25,35,35);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 25,25,35,35);
  TSB(TNode, %InFuse; OutPin; 25,25,25,25,35,35,35,35);
 %END;
%MACEND;

NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR7ENABLE(%SF256, %FF256, P18, N2);
NOR7ENABLE(%SF512, %FF512, P17, N3);
NOR7ENABLE(%SF768, %FF768, P16, N4);
NOR7ENABLE(%SF1024, %FF1024, P15, N5);
NOR7ENABLE(%SF1280, %FF1280, P14, N6);
NOR7ENABLE(%SF1536, %FF1536, P13, N7);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16L8
%PartNumber:NATL'PAL16L8A
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P18 ~P18 P4 ~P4 P17 ~P17 P5 ~P5 P16 ~P16
     P6 ~P6 P15 ~P15 P7 ~P7 P14 ~P14 P8 ~P8 P13 ~P13 P9 ~P9 P11 ~P11 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 15,15,25,25);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 15,15,25,25);
  TSB(TNode, %InFuse; OutPin; 10,10,13,13,25,25,25,25);
 %END;
%MACEND;

NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR7ENABLE(%SF256, %FF256, P18, N2);
NOR7ENABLE(%SF512, %FF512, P17, N3);
NOR7ENABLE(%SF768, %FF768, P16, N4);
NOR7ENABLE(%SF1024, %FF1024, P15, N5);
NOR7ENABLE(%SF1280, %FF1280, P14, N6);
NOR7ENABLE(%SF1536, %FF1536, P13, N7);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

%StartModel
%Manufacturer:National
%Type:16L8
%PartNumber:NATL'PAL16L8A2
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P18 ~P18 P4 ~P4 P17 ~P17 P5 ~P5 P16 ~P16
     P6 ~P6 P15 ~P15 P7 ~P7 P14 ~P14 P8 ~P8 P13 ~P13 P9 ~P9 P11 ~P11 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 25,25,35,35);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 25,25,35,35);
  TSB(TNode, %InFuse; OutPin; 25,25,25,25,35,35,35,35);
 %END;
%MACEND;

NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR7ENABLE(%SF256, %FF256, P18, N2);
NOR7ENABLE(%SF512, %FF512, P17, N3);
NOR7ENABLE(%SF768, %FF768, P16, N4);
NOR7ENABLE(%SF1024, %FF1024, P15, N5);
NOR7ENABLE(%SF1280, %FF1280, P14, N6);
NOR7ENABLE(%SF1536, %FF1536, P13, N7);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

%StartModel
%Manufacturer:National
%Type:16L8
%PartNumber:NATL'PAL16L8B
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P18 ~P18 P4 ~P4 P17 ~P17 P5 ~P5 P16 ~P16
     P6 ~P6 P15 ~P15 P7 ~P7 P14 ~P14 P8 ~P8 P13 ~P13 P9 ~P9 P11 ~P11 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 11,11,15,15);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 11,11,15,15);
  TSB(TNode, %InFuse; OutPin; 11,11,11,11,20,20,15,15);
 %END;
%MACEND;


NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR7ENABLE(%SF256, %FF256, P18, N2);
NOR7ENABLE(%SF512, %FF512, P17, N3);
NOR7ENABLE(%SF768, %FF768, P16, N4);
NOR7ENABLE(%SF1024, %FF1024, P15, N5);
NOR7ENABLE(%SF1280, %FF1280, P14, N6);
NOR7ENABLE(%SF1536, %FF1536, P13, N7);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16L8
%PartNumber:NATL'PAL16L8B2
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P18 ~P18 P4 ~P4 P17 ~P17 P5 ~P5 P16 ~P16
     P6 ~P6 P15 ~P15 P7 ~P7 P14 ~P14 P8 ~P8 P13 ~P13 P9 ~P9 P11 ~P11 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 15,15,25,25);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 15,15,25,25);
  TSB(TNode, %InFuse; OutPin; 10,10,13,13,25,25,25,25);
 %END;
%MACEND;

NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR7ENABLE(%SF256, %FF256, P18, N2);
NOR7ENABLE(%SF512, %FF512, P17, N3);
NOR7ENABLE(%SF768, %FF768, P16, N4);
NOR7ENABLE(%SF1024, %FF1024, P15, N5);
NOR7ENABLE(%SF1280, %FF1280, P14, N6);
NOR7ENABLE(%SF1536, %FF1536, P13, N7);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16L8
%PartNumber:NATL'PAL16L8D
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P18 ~P18 P4 ~P4 P17 ~P17 P5 ~P5 P16 ~P16
     P6 ~P6 P15 ~P15 P7 ~P7 P14 ~P14 P8 ~P8 P13 ~P13 P9 ~P9 P11 ~P11 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 7,7,10,10);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 7,7,10,10);
  TSB(TNode, %InFuse; OutPin; 7,7,5,5,10,10,10,10);
 %END;
%MACEND;

NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR7ENABLE(%SF256, %FF256, P18, N2);
NOR7ENABLE(%SF512, %FF512, P17, N3);
NOR7ENABLE(%SF768, %FF768, P16, N4);
NOR7ENABLE(%SF1024, %FF1024, P15, N5);
NOR7ENABLE(%SF1280, %FF1280, P14, N6);
NOR7ENABLE(%SF1536, %FF1536, P13, N7);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16R4
%PartNumber:NATL'PAL16R4
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 P18 ~P18 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 P13 ~P13 P9 ~P9 P12 ~P12 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 25,25,35,35);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 25,25,35,35);
  TSB(TNode, %InFuse; OutPin; 25,25,25,25,35,35,35,35);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFF(TLNode,P1;NodeInp;15,15,35,0,25,25,25,25,35,0,25,25);
 TSB(NodeInp,L1;OutPin;15,15,15,15,25,25,25,25);
%MACEND;

LINV(P11;L1);
NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR7ENABLE(%SF256, %FF256, P18, N2);
NOR8DFF(%FF512, N3, L2, P17);
NOR8DFF(%FF768, N4, L3, P16);
NOR8DFF(%FF1024, N5, L4, P15);
NOR8DFF(%FF1280, N6, L5, P14);
NOR7ENABLE(%SF1536, %FF1536, P13, N7);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16R4
%PartNumber:NATL'PAL16R4A
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 P18 ~P18 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 P13 ~P13 P9 ~P9 P12 ~P12 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 15,15,25,25);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 15,15,25,25);
  TSB(TNode, %InFuse; OutPin; 10,10,13,13,25,25,25,25);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFF(TLNode,P1;NodeInp;10,10,16,0,10,10,15,15,25,0,15,15);
 TSB(NodeInp,L1;OutPin;10,10,11,11,20,20,20,20);
%MACEND;

LINV(P11;L1);
NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR7ENABLE(%SF256, %FF256, P18, N2);
NOR8DFF(%FF512, N3, L2, P17);
NOR8DFF(%FF768, N4, L3, P16);
NOR8DFF(%FF1024, N5, L4, P15);
NOR8DFF(%FF1280, N6, L5, P14);
NOR7ENABLE(%SF1536, %FF1536, P13, N7);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

%StartModel
%Manufacturer:National
%Type:16R4
%PartNumber:NATL'PAL16R4A2
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 P18 ~P18 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 P13 ~P13 P9 ~P9 P12 ~P12 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 25,25,35,35);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 25,25,35,35);
  TSB(TNode, %InFuse; OutPin; 25,25,25,25,35,35,35,35);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFF(TLNode,P1;NodeInp;15,15,25,0,10,10,25,25,35,0,25,25);
 TSB(NodeInp,L1;OutPin;15,15,15,15,25,25,25,25);
%MACEND;

LINV(P11;L1);
NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR7ENABLE(%SF256, %FF256, P18, N2);
NOR8DFF(%FF512, N3, L2, P17);
NOR8DFF(%FF768, N4, L3, P16);
NOR8DFF(%FF1024, N5, L4, P15);
NOR8DFF(%FF1280, N6, L5, P14);
NOR7ENABLE(%SF1536, %FF1536, P13, N7);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

%StartModel
%Manufacturer:National
%Type:16R4
%PartNumber:NATL'PAL16R4B
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 P18 ~P18 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 P13 ~P13 P9 ~P9 P12 ~P12 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 11,11,15,15);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 11,11,15,15);
  TSB(TNode, %InFuse; OutPin; 11,11,11,11,20,20,15,15);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFF(TLNode,P1;NodeInp;8,8,10,0,5,5,12,12,15,0,10,10);
 TSB(NodeInp,L1;OutPin;10,10,10,10,15,15,15,15);
%MACEND;

LINV(P11;L1);
NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR7ENABLE(%SF256, %FF256, P18, N2);
NOR8DFF(%FF512, N3, L2, P17);
NOR8DFF(%FF768, N4, L3, P16);
NOR8DFF(%FF1024, N5, L4, P15);
NOR8DFF(%FF1280, N6, L5, P14);
NOR7ENABLE(%SF1536, %FF1536, P13, N7);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

%StartModel
%Manufacturer:National
%Type:16R4
%PartNumber:NATL'PAL16R4B2
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 P18 ~P18 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 P13 ~P13 P9 ~P9 P12 ~P12 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 15,15,25,25);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 15,15,25,25);
  TSB(TNode, %InFuse; OutPin; 10,10,13,13,25,25,25,25);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFF(TLNode,P1;NodeInp;10,10,11,0,10,8,15,15,20,0,15,10);
 TSB(NodeInp,L1;OutPin;15,15,11,11,20,20,20,20);
%MACEND;

LINV(P11;L1);
NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR7ENABLE(%SF256, %FF256, P18, N2);
NOR8DFF(%FF512, N3, L2, P17);
NOR8DFF(%FF768, N4, L3, P16);
NOR8DFF(%FF1024, N5, L4, P15);
NOR8DFF(%FF1280, N6, L5, P14);
NOR7ENABLE(%SF1536, %FF1536, P13, N7);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
;The following device has power-up reset
%StartModel
%Manufacturer:National
%Type:16R4
%PartNumber:NATL'PAL16R4D
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 P18 ~P18 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 P13 ~P13 P9 ~P9 P12 ~P12 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 7,7,10,10);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 7,7,10,10);
  TSB(TNode, %InFuse; OutPin; 7,7,5,5,10,10,10,10);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFFC(TLNode,P1,IPL;NodeInp;6,6,6,0,2,4,1,1,1,1,8,8,10,0,7,7,1,1,1,1);
 TSB(NodeInp,L1;OutPin;6,6,4,4,10,10,10,10);
%MACEND;

LINV(P11;L1);
NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR7ENABLE(%SF256, %FF256, P18, N2);
NOR8DFF(%FF512, N3, L2, P17);
NOR8DFF(%FF768, N4, L3, P16);
NOR8DFF(%FF1024, N5, L4, P15);
NOR8DFF(%FF1280, N6, L5, P14);
NOR7ENABLE(%SF1536, %FF1536, P13, N7);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16R6
%PartNumber:NATL'PAL16R6
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 P12 ~P12 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 25,25,35,35);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 25,25,35,35);
  TSB(TNode, %InFuse; OutPin; 25,25,25,25,35,35,35,35);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFF(TLNode,P1;NodeInp;15,15,35,0,25,25,25,25,35,0,25,25);
 TSB(NodeInp,L1;OutPin;15,15,15,15,25,25,25,25);
%MACEND;

LINV(P11;L1);
NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR8DFF(%FF256, N2, L2, P18);
NOR8DFF(%FF512, N3, L3, P17);
NOR8DFF(%FF768, N4, L4, P16);
NOR8DFF(%FF1024, N5, L5, P15);
NOR8DFF(%FF1280, N6, L6, P14);
NOR8DFF(%FF1536, N7, L7, P13);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16R6
%PartNumber:NATL'PAL16R6A
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 P12 ~P12 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 15,15,25,25);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 15,15,25,25);
  TSB(TNode, %InFuse; OutPin; 10,10,13,13,25,25,25,25);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFF(TLNode,P1;NodeInp;10,10,16,0,10,10,15,15,25,0,15,15);
 TSB(NodeInp,L1;OutPin;10,10,11,11,20,20,20,20);
%MACEND;

LINV(P11;L1);
NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR8DFF(%FF256, N2, L2, P18);
NOR8DFF(%FF512, N3, L3, P17);
NOR8DFF(%FF768, N4, L4, P16);
NOR8DFF(%FF1024, N5, L5, P15);
NOR8DFF(%FF1280, N6, L6, P14);
NOR8DFF(%FF1536, N7, L7, P13);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

%StartModel
%Manufacturer:National
%Type:16R6
%PartNumber:NATL'PAL16R6A2
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 P12 ~P12 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 25,25,35,35);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 25,25,35,35);
  TSB(TNode, %InFuse; OutPin; 25,25,25,25,35,35,35,35);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFF(TLNode,P1;NodeInp;15,15,25,0,10,10,25,25,35,0,25,25);
 TSB(NodeInp,L1;OutPin;15,15,15,15,25,25,25,25);
%MACEND;

LINV(P11;L1);
NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR8DFF(%FF256, N2, L2, P18);
NOR8DFF(%FF512, N3, L3, P17);
NOR8DFF(%FF768, N4, L4, P16);
NOR8DFF(%FF1024, N5, L5, P15);
NOR8DFF(%FF1280, N6, L6, P14);
NOR8DFF(%FF1536, N7, L7, P13);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

%StartModel
%Manufacturer:National
%Type:16R6
%PartNumber:NATL'PAL16R6B
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 P12 ~P12 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 11,11,15,15);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 11,11,15,15);
  TSB(TNode, %InFuse; OutPin; 11,11,11,11,20,20,15,15);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFF(TLNode,P1;NodeInp;8,8,10,0,5,5,12,12,15,0,10,10);
 TSB(NodeInp,L1;OutPin;10,10,10,10,15,15,15,15);
%MACEND;

LINV(P11;L1);
NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR8DFF(%FF256, N2, L2, P18);
NOR8DFF(%FF512, N3, L3, P17);
NOR8DFF(%FF768, N4, L4, P16);
NOR8DFF(%FF1024, N5, L5, P15);
NOR8DFF(%FF1280, N6, L6, P14);
NOR8DFF(%FF1536, N7, L7, P13);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16R6
%PartNumber:NATL'PAL16R6B2
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 P12 ~P12 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 15,15,25,25);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 15,15,25,25);
  TSB(TNode, %InFuse; OutPin; 10,10,13,13,25,25,25,25);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFF(TLNode,P1;NodeInp;10,10,11,0,10,8,15,15,20,0,15,10);
 TSB(NodeInp,L1;OutPin;15,15,11,11,20,20,20,20);
%MACEND;

LINV(P11;L1);
NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR8DFF(%FF256, N2, L2, P18);
NOR8DFF(%FF512, N3, L3, P17);
NOR8DFF(%FF768, N4, L4, P16);
NOR8DFF(%FF1024, N5, L5, P15);
NOR8DFF(%FF1280, N6, L6, P14);
NOR8DFF(%FF1536, N7, L7, P13);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
;The following device resets on power-up
%StartModel
%Manufacturer:National
%Type:16R6
%PartNumber:NATL'PAL16R6D
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 P12 ~P12 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 7,7,10,10);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 7,7,10,10);
  TSB(TNode, %InFuse; OutPin; 7,7,5,5,10,10,10,10);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFFC(TLNode,P1,IPL;NodeInp;6,6,6,0,2,4,1,1,1,1,8,8,10,0,7,7,1,1,1,1);
 TSB(NodeInp,L1;OutPin;6,6,4,4,10,10,10,10);
%MACEND;

LINV(P11;L1);
NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR8DFF(%FF256, N2, L2, P18);
NOR8DFF(%FF512, N3, L3, P17);
NOR8DFF(%FF768, N4, L4, P16);
NOR8DFF(%FF1024, N5, L5, P15);
NOR8DFF(%FF1280, N6, L6, P14);
NOR8DFF(%FF1536, N7, L7, P13);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16R8
%PartNumber:NATL'PAL16R8
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFF(TLNode,P1;NodeInp;15,15,35,0,25,25,25,25,35,0,25,25);
 TSB(NodeInp,L1;OutPin;15,15,25,25,25,25,35,35);
%MACEND;

LINV(P11;L1);
NOR8DFF(%FF00, N1, L2, P19);
NOR8DFF(%FF256, N2, L3, P18);
NOR8DFF(%FF512, N3, L4, P17);
NOR8DFF(%FF768, N4, L5, P16);
NOR8DFF(%FF1024, N5, L6, P15);
NOR8DFF(%FF1280, N6, L7, P14);
NOR8DFF(%FF1536, N7, L8, P13);
NOR8DFF(%FF1792, N8, L9, P12);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16R8
%PartNumber:NATL'PAL16R8A
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFF(TLNode,P1;NodeInp;10,10,16,0,10,10,15,15,25,0,15,15);
 TSB(NodeInp,L1;OutPin;10,10,11,11,20,20,20,20);
%MACEND;

LINV(P11;L1);
NOR8DFF(%FF00, N1, L2, P19);
NOR8DFF(%FF256, N2, L3, P18);
NOR8DFF(%FF512, N3, L4, P17);
NOR8DFF(%FF768, N4, L5, P16);
NOR8DFF(%FF1024, N5, L6, P15);
NOR8DFF(%FF1280, N6, L7, P14);
NOR8DFF(%FF1536, N7, L8, P13);
NOR8DFF(%FF1792, N8, L9, P12);
%EndModel

%StartModel
%Manufacturer:National
%Type:16R8
%PartNumber:NATL'PAL16R8A2
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFF(TLNode,P1;NodeInp;15,15,25,0,10,10,25,25,35,0,25,25);
 TSB(NodeInp,L1;OutPin;15,15,15,15,25,25,25,25);
%MACEND;

LINV(P11;L1);
NOR8DFF(%FF00, N1, L2, P19);
NOR8DFF(%FF256, N2, L3, P18);
NOR8DFF(%FF512, N3, L4, P17);
NOR8DFF(%FF768, N4, L5, P16);
NOR8DFF(%FF1024, N5, L6, P15);
NOR8DFF(%FF1280, N6, L7, P14);
NOR8DFF(%FF1536, N7, L8, P13);
NOR8DFF(%FF1792, N8, L9, P12);
%EndModel

%StartModel
%Manufacturer:National
%Type:16R8
%PartNumber:NATL'PAL16R8B
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFF(TLNode,P1;NodeInp;8,8,10,0,5,5,12,12,15,0,10,10);
 TSB(NodeInp,L1;OutPin;10,10,10,10,15,15,15,15);
%MACEND;

LINV(P11;L1);
NOR8DFF(%FF00, N1, L2, P19);
NOR8DFF(%FF256, N2, L3, P18);
NOR8DFF(%FF512, N3, L4, P17);
NOR8DFF(%FF768, N4, L5, P16);
NOR8DFF(%FF1024, N5, L6, P15);
NOR8DFF(%FF1280, N6, L7, P14);
NOR8DFF(%FF1536, N7, L8, P13);
NOR8DFF(%FF1792, N8, L9, P12);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:16R8
%PartNumber:NATL'PAL16R8B2
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFF(TLNode,P1;NodeInp;10,10,11,0,10,8,15,15,20,0,15,10);
 TSB(NodeInp,L1;OutPin;15,15,11,11,20,20,20,20);
%MACEND;

LINV(P11;L1);
NOR8DFF(%FF00, N1, L2, P19);
NOR8DFF(%FF256, N2, L3, P18);
NOR8DFF(%FF512, N3, L4, P17);
NOR8DFF(%FF768, N4, L5, P16);
NOR8DFF(%FF1024, N5, L6, P15);
NOR8DFF(%FF1280, N6, L7, P14);
NOR8DFF(%FF1536, N7, L8, P13);
NOR8DFF(%FF1792, N8, L9, P12);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
;The following device resets on power-up
%StartModel
%Manufacturer:National
%Type:16R8
%PartNumber:NATL'PAL16R8D
%LastNode ? ?
%NumPins:20
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFFC(TLNode,P1,IPL;NodeInp;6,6,6,0,2,4,1,1,1,1,8,8,10,0,7,7,1,1,1,1);
 TSB(NodeInp,L1;OutPin;6,6,4,4,10,10,10,10);
%MACEND;

LINV(P11;L1);
NOR8DFF(%FF00, N1, L2, P19);
NOR8DFF(%FF256, N2, L3, P18);
NOR8DFF(%FF512, N3, L4, P17);
NOR8DFF(%FF768, N4, L5, P16);
NOR8DFF(%FF1024, N5, L6, P15);
NOR8DFF(%FF1280, N6, L7, P14);
NOR8DFF(%FF1536, N7, L8, P13);
NOR8DFF(%FF1792, N8, L9, P12);
%EndModel

%StartModel
%Manufacturer:National
%Type:16RA8
%PartNumber:NATL'PAL16RA8
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 P18 ~P18 P4 ~P4 P17 ~P17 P5 ~P5 P16 ~P16
           P6 ~P6 P15 ~P15 P7 ~P7 P14 ~P14 P8 ~P8 P13 ~P13 P9 ~P9 P12 ~P12 *


%MACRO LOADMac(IO:%TEXT, IOBar:%TEXT, InFuse:%FF, TLNode1:%TEXT,
                   TLNode2:%TEXT, ResetLoadInput:%TEXT, TLNode3:%TEXT,
        	   SetLoadInput:%TEXT, XorFuse:%SF, TNode:%TEXT, PClock:%TEXT,
                   RegOut:%TEXT, TLSet:%TEXT);

  LINV(IO; IOBar);
  LAND(P1, %InFuse+64; TLNode1);
  LAND(L1, IOBar; TLNode2);
  LNOR(TLNode1, TLNode2, IPH; ResetLoadInput);
  LINV(%InFuse+96; TLSet);
  LAND(P1, TLSet; TLNode3);
  LOR(TLNode2, TLNode3; SetLoadInput);

 %IF %XorFuse=1 %THEN
  OR(%InFuse+128, %InFuse+160, %InFuse+192, %InFuse+224; TNode; 20,20,30,30);
 %ELSE
  NOR(%InFuse+128, %InFuse+160, %InFuse+192, %InFuse+224; TNode; 20,20,30,30);
 %END;
  AND(%InFuse+32; PClock; 0,0,0,0);
  DQFFPC(TNode, PClock, SetLoadInput, ResetLoadInput; RegOut; 17,17,10,0,13,13,22,27,1,1,30,30,20,0,20,20,35,40,1,1);
%MACEND;


%MACRO OUTPUTMac(InFuse:%FF, TNode:%TEXT, RegOutput:%TEXT, Output:%TEXT,
                 TsbEnable:%TEXT, IO:%TEXT, EnableFuse:%SF, SETFuse:%SF,
		 RESETFuse:%SF);

%IF %SETFuse..%SETFuse+31 = 1 %THEN
 %IF %RESETFuse..%RESETFuse+31 = 1 %THEN

   %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
     ITSB(TNode, L2; IO; 1,1,1,1,1,1,1,1);
   %ELSE
     LAND(%InFuse, L2; TSBEnable);
     ITSB(TNode, TsbEnable; IO; 15,15,15,15,30,30,30,30);
   %END;

 %ELSE

   %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
     ITSB(RegOutput, L2; IO; 15,15,15,15,30,30,30,30);
   %ELSE
     LAND(%InFuse, L2; TsbEnable);
     ITSB(RegOutput, TsbEnable; IO; 15,15,15,15,30,30,30,30);
   %END;
 %END;
%ELSE
 %IF %RESETFuse..%RESETFuse+31 = 1 %THEN

   %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
     ITSB(RegOutput, L2; IO; 15,15,15,15,30,30,30,30);
   %ELSE
     LAND(%InFuse, L2; TsbEnable);
     ITSB(RegOutput, TsbEnable; IO; 15,15,15,15,30,30,30,30);
   %END;

 %ELSE

   %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
     ITSB(RegOutput, L2; IO; 15,15,15,15,30,30,30,30);
   %ELSE
     LAND(%InFuse, L2; TsbEnable);
     ITSB(RegOutput, TsbEnable; IO; 15,15,15,15,30,30,30,30);
   %END;
 %END;
%END;
%MACEND;

LINV(P1; L1);
LINV(P11; L2);

LOADMac(P19, L3, %FF00, L4, L5, L6, L7, L8, %SF2048, N17, N1, N2, L59);
LOADMac(P18, L10, %FF256, L11, L12, L13, L14, L15, %SF2049, N18, N3, N4, L60);
LOADMac(P17, L17, %FF512, L18, L19 ,L20, L21, L22, %SF2050, N19, N5, N6, L61);
LOADMac(P16, L24, %FF768, L25, L26, L27, L28, L29, %SF2051, N20, N7, N8, L62);
LOADMac(P15, L31, %FF1024, L32, L33, L34, L35, L36, %SF2052, N21, N9, N10, L63);
LOADMac(P14, L38, %FF1280, L39, L40, L41, L42, L43, %SF2053, N22, N11, N12, L64);
LOADMac(P13, L45, %FF1536, L46, L47, L48, L49, L50, %SF2054, N23, N13, N14, L65);
LOADMac(P12, L52, %FF1792, L53, L54, L55, L56, L57, %SF2055, N24, N15, N16, L66);

OUTPUTMac(%FF00, N17, N2, L67, L68, P19, %SF00, %SF96, %SF64);
OUTPUTMac(%FF256, N18, N4, L69, L70, P18, %SF256, %SF352, %SF320);
OUTPUTMac(%FF512, N19, N6, L71, L172, P17, %SF512, %SF608, %SF576);
OUTPUTMac(%FF768, N20, N8, L73, L74, P16, %SF768, %SF864, %SF832);
OUTPUTMac(%FF1024, N21, N10, L75, L76, P15, %SF1024, %SF1120, %SF1088);
OUTPUTMac(%FF1280, N22, N12, L77, L78, P14, %SF1280, %SF1376, %SF1344);
OUTPUTMac(%FF1536, N23, N14, L79, L80, P13, %SF1536, %SF1632, %SF1600);
OUTPUTMac(%FF1792, N24, N16, L81, L82, P12, %SF1792, %SF1888, %SF1856);

%EndModel

%StartModel
%Manufacturer:National
%Type:16V8
%PartNumber:NATL'GAL16V8-20L
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4 P6 ~P6
     N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 *

%MACRO V8MAC(S0:%SF, XorFuse:%SF, FeedBack:%TEXT, LorOutput:%TEXT, InFuse:%FF,
             OutPin:%TEXT, TNode:%TEXT, EnableFuse:%SF, TLNode:%TEXT,
	     TSNode:%TEXT, NextPin:%TEXT, PrevPin:%TEXT);

 %CASE %SF2192,%SF2193,%S0
   2:
     LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %XorFuse=0 %THEN
      LINV(LorOutput;TLNode);
      DQFFC(TLNode, P1, IPL; TNode; 13,13,15,0,12,12,1,1,1,1,15,15,15,0,12,12,1,1,1,1);
     %ELSE
      DQFFC(LorOutput, P1, IPL; TNode; 13,13,15,0,12,12,1,1,1,1,15,15,15,0,12,12,1,1,1,1);
     %END;
     TSB(TNode, L17; OutPin; 16,16,16,16,18,18,18,18);
     BUF(TNode; FeedBack; 0,0,0,0);
  |3:
     LOR(%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 18,18,20,20);
      %ELSE
       BUF(LorOutput; OutPin; 18,18,20,20);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 18,18,20,20);
      %ELSE
       BUF(LorOutput; TNode; 18,18,20,20);
      %END;
      TSB(TNode, %InFuse; OutPin; 18,18,18,18,20,20,20,20);
     %END;
     BUF(OutPin; FeedBack; 0,0,0,0);
  |4:
     LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %XorFuse = 0 %THEN
      INV(LorOutput; OutPin; 18,18,20,20);
     %ELSE
      BUF(LorOutput; OutPin; 18,18,20,20);
     %END;
     BUF(ZERO; FeedBack; 0,0,0,0);
  |5:
     TSB(TSNode, ZERO; OutPin; 16,16,16,16,18,18,18,18);
     BUF(NextPin; FeedBack; 0,0,0,0);
  |7:
     LOR(%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 18,18,20,20);
      %ELSE
       BUF(LorOutput; OutPin; 18,18,20,20);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 18,18,20,20);
      %ELSE
       BUF(LorOutput; TNode; 18,18,20,20);
      %END;
      TSB(TNode, %InFuse; OutPin; 18,18,18,18,20,20,20,20);
     %END;
     BUF(PrevPin; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LINV(P11;L17);

V8MAC(%SF2120, %SF2048, N1, L1, %FF00, P19, N9, %SF00, L9, N17, P1, P1);
V8MAC(%SF2121, %SF2049, N2, L2, %FF256, P18, N10, %SF256, L10, N18, P19, P18);
V8MAC(%SF2122, %SF2050, N3, L3, %FF512, P17, N11, %SF512, L11, N19, P18, P17);
V8MAC(%SF2123, %SF2051, N4, L4, %FF768, P16, N12, %SF768, L12, N20, P17, P16);
V8MAC(%SF2124, %SF2052, N5, L5, %FF1024, P15, N13, %SF1024, L13, N21, P14, P15);
V8MAC(%SF2125, %SF2053, N6, L6, %FF1280, P14, N14, %SF1280, L14, N22, P13, P14);
V8MAC(%SF2126, %SF2054, N7, L7, %FF1536, P13, N15, %SF1536, L15, N23, P12, P13);
V8MAC(%SF2127, %SF2055, N8, L8, %FF1792, P12, N16, %SF1792, L16, N24, P11, P11);
%EndModel

%StartModel
%Manufacturer:National
%Type:16V8
%PartNumber:NATL'GAL16V8-25Q
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4 P6 ~P6
     N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 *

%MACRO V8MAC(S0:%SF, XorFuse:%SF, FeedBack:%TEXT, LorOutput:%TEXT, InFuse:%FF,
             OutPin:%TEXT, TNode:%TEXT, EnableFuse:%SF, TLNode:%TEXT,
	     TSNode:%TEXT, NextPin:%TEXT, PrevPin:%TEXT);

 %CASE %SF2192,%SF2193,%S0
   2:
     LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %XorFuse=0 %THEN
      LINV(LorOutput;TLNode);
      DQFFC(TLNode, P1, IPL; TNode; 13,13,25,0,15,15,1,1,1,1,15,15,25,0,15,15,1,1,1,1);
     %ELSE
      DQFFC(LorOutput, P1, IPL; TNode; 13,13,25,0,15,15,1,1,1,1,15,15,25,0,15,15,1,1,1,1);
     %END;
     TSB(TNode, L17; OutPin; 18,18,18,18,20,20,20,20);
     BUF(TNode; FeedBack; 0,0,0,0);
  |3:
     LOR(%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 23,23,25,25);
      %ELSE
       BUF(LorOutput; OutPin; 23,23,25,25);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 23,23,25,25);
      %ELSE
       BUF(LorOutput; TNode; 23,23,25,25);
      %END;
      TSB(TNode, %InFuse; OutPin; 23,23,23,23,25,25,25,25);
     %END;
     BUF(OutPin; FeedBack; 0,0,0,0);
  |4:
     LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %XorFuse = 0 %THEN
      INV(LorOutput; OutPin; 23,23,25,25);
     %ELSE
      BUF(LorOutput; OutPin; 23,23,25,25);
     %END;
     BUF(ZERO; FeedBack; 0,0,0,0);
  |5:
     TSB(TSNode, ZERO; OutPin; 18,18,18,18,20,20,20,20);
     BUF(NextPin; FeedBack; 0,0,0,0);
  |7:
     LOR(%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 23,23,25,25);
      %ELSE
       BUF(LorOutput; OutPin; 23,23,25,25);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 23,23,25,25);
      %ELSE
       BUF(LorOutput; TNode; 23,23,25,25);
      %END;
      TSB(TNode, %InFuse; OutPin; 23,23,23,23,25,25,25,25);
     %END;
     BUF(PrevPin; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LINV(P11;L17);

V8MAC(%SF2120, %SF2048, N1, L1, %FF00, P19, N9, %SF00, L9, N17, P1, P1);
V8MAC(%SF2121, %SF2049, N2, L2, %FF256, P18, N10, %SF256, L10, N18, P19, P18);
V8MAC(%SF2122, %SF2050, N3, L3, %FF512, P17, N11, %SF512, L11, N19, P18, P17);
V8MAC(%SF2123, %SF2051, N4, L4, %FF768, P16, N12, %SF768, L12, N20, P17, P16);
V8MAC(%SF2124, %SF2052, N5, L5, %FF1024, P15, N13, %SF1024, L13, N21, P14, P15);
V8MAC(%SF2125, %SF2053, N6, L6, %FF1280, P14, N14, %SF1280, L14, N22, P13, P14);
V8MAC(%SF2126, %SF2054, N7, L7, %FF1536, P13, N15, %SF1536, L15, N23, P12, P13);
V8MAC(%SF2127, %SF2055, N8, L8, %FF1792, P12, N16, %SF1792, L16, N24, P11, P11);
%EndModel

%StartModel
%Manufacturer:National
%Type:16V8
%PartNumber:NATL'GAL16V8-30Q
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4 P6 ~P6
     N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 *

%MACRO V8MAC(S0:%SF, XorFuse:%SF, FeedBack:%TEXT, LorOutput:%TEXT, InFuse:%FF,
             OutPin:%TEXT, TNode:%TEXT, EnableFuse:%SF, TLNode:%TEXT,
	     TSNode:%TEXT, NextPin:%TEXT, PrevPin:%TEXT);

 %CASE %SF2192,%SF2193,%S0
   2:
     LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %XorFuse=0 %THEN
      LINV(LorOutput;TLNode);
      DQFFC(TLNode, P1, IPL; TNode; 18,18,25,0,15,15,1,1,1,1,20,20,25,0,15,15,1,1,1,1);
     %ELSE
      DQFFC(LorOutput, P1, IPL; TNode; 18,18,25,0,15,15,1,1,1,1,20,20,25,0,15,15,1,1,1,1);
     %END;
     TSB(TNode, L17; OutPin; 23,23,23,23,25,25,25,25);
     BUF(TNode; FeedBack; 0,0,0,0);
  |3:
     LOR(%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 28,28,30,30);
      %ELSE
       BUF(LorOutput; OutPin; 28,28,30,30);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 28,28,30,30);
      %ELSE
       BUF(LorOutput; TNode; 28,28,30,30);
      %END;
      TSB(TNode, %InFuse; OutPin; 28,28,28,28,30,30,30,30);
     %END;
     BUF(OutPin; FeedBack; 0,0,0,0);
  |4:
     LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %XorFuse = 0 %THEN
      INV(LorOutput; OutPin; 28,28,30,30);
     %ELSE
      BUF(LorOutput; OutPin; 28,28,30,30);
     %END;
     BUF(ZERO; FeedBack; 0,0,0,0);
  |5:
     TSB(TSNode, ZERO; OutPin; 23,23,23,23,25,25,25,25);
     BUF(NextPin; FeedBack; 0,0,0,0);
  |7:
     LOR(%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 28,28,30,30);
      %ELSE
       BUF(LorOutput; OutPin; 28,28,30,30);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 28,28,30,30);
      %ELSE
       BUF(LorOutput; TNode; 28,28,30,30);
      %END;
      TSB(TNode, %InFuse; OutPin; 28,28,28,28,30,30,30,30);
     %END;
     BUF(PrevPin; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LINV(P11;L17);

V8MAC(%SF2120, %SF2048, N1, L1, %FF00, P19, N9, %SF00, L9, N17, P1, P1);
V8MAC(%SF2121, %SF2049, N2, L2, %FF256, P18, N10, %SF256, L10, N18, P19, P18);
V8MAC(%SF2122, %SF2050, N3, L3, %FF512, P17, N11, %SF512, L11, N19, P18, P17);
V8MAC(%SF2123, %SF2051, N4, L4, %FF768, P16, N12, %SF768, L12, N20, P17, P16);
V8MAC(%SF2124, %SF2052, N5, L5, %FF1024, P15, N13, %SF1024, L13, N21, P14, P15);
V8MAC(%SF2125, %SF2053, N6, L6, %FF1280, P14, N14, %SF1280, L14, N22, P13, P14);
V8MAC(%SF2126, %SF2054, N7, L7, %FF1536, P13, N15, %SF1536, L15, N23, P12, P13);
V8MAC(%SF2127, %SF2055, N8, L8, %FF1792, P12, N16, %SF1792, L16, N24, P11, P11);
%EndModel

%StartModel
%Manufacturer:National
%Type:18L4
%PartNumber:NATL'PAL18L4
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P23 ~P23 P4 ~P4 P22 ~P22 P5 ~P5 P21 ~P21 P6 ~P6
   P7 ~P7 P8 ~P8 P16 ~P16 P9 ~P9 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

NOR(%FF00, %FF36, %FF72, %FF108, %FF144, %FF180; P20; 25,25,40,40);
NOR(%FF216, %FF252, %FF288, %FF324; P19; 25,25,40,40);
NOR(%FF360, %FF396, %FF432, %FF468; P18; 25,25,40,40);
NOR(%FF504, %FF540, %FF576, %FF612, %FF648, %FF684; P17; 25,25,40,40);
%EndModel

%StartModel
%Manufacturer:National
%Type:18L4
%PartNumber:NATL'PAL18L4A
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P23 ~P23 P4 ~P4 P22 ~P22 P5 ~P5 P21 ~P21 P6 ~P6
   P7 ~P7 P8 ~P8 P16 ~P16 P9 ~P9 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

NOR(%FF00, %FF36, %FF72, %FF108, %FF144, %FF180; P20; 15,15,25,25);
NOR(%FF216, %FF252, %FF288, %FF324; P19; 15,15,25,25);
NOR(%FF360, %FF396, %FF432, %FF468; P18; 15,15,25,25);
NOR(%FF504, %FF540, %FF576, %FF612, %FF648, %FF684; P17; 15,15,25,25);
%EndModel

%StartModel
%Manufacturer:National
%Type:20C1
%PartNumber:NATL'PAL20C1
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P23 ~P23 P4 ~P4 P22 ~P22 P5 ~P5 P21 ~P21
     P6 ~P6 P20 ~P20 P7 ~P7 P17 ~P17 P8 ~P8 P16 ~P16 P9 ~P9 P15 ~P15
     P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

LOR(%FF00, %FF40, %FF80, %FF120, %FF160, %FF200, %FF240, %FF280, %FF320,
   %FF360, %FF400, %FF440, %FF480, %FF520, %FF560, %FF600; L1);
BUF(L1; P19; 25,25,40,40);
INV(L1; P18; 25,25,40,40);
%EndModel

;Delay values for "other" were not given. "Max" delays were used for both cases.
%StartModel
%Manufacturer:National
%Type:20C1
%PartNumber:NATL'PAL20C1A
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P23 ~P23 P4 ~P4 P22 ~P22 P5 ~P5 P21 ~P21
     P6 ~P6 P20 ~P20 P7 ~P7 P17 ~P17 P8 ~P8 P16 ~P16 P9 ~P9 P15 ~P15
     P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

LOR(%FF00, %FF40, %FF80, %FF120, %FF160, %FF200, %FF240, %FF280, %FF320,
   %FF360, %FF400, %FF440, %FF480, %FF520, %FF560, %FF600; L1);
BUF(L1; P19; 30,30,30,30);
INV(L1; P18; 30,30,30,30);
%EndModel

%StartModel
%Manufacturer:National
%Type:20L10
%PartNumber:NATL'PAL20L10
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P22 ~P22 P4 ~P4 P21 ~P21 P5 ~P5 P20 ~P20
     P6 ~P6 P19 ~P19 P7 ~P7 P18 ~P18 P8 ~P8 P17 ~P17 P9 ~P9 P16 ~P16
     P10 ~P10 P15 ~P15 P11 ~P11 P13 ~P13 *

%MACRO NOR3ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; OutPin; 35,35,50,50);
 %ELSE
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; TNode; 35,35,50,50);
  TSB(TNode, %InFuse; OutPin; 35,35,35,35,45,45,45,45);
 %END;
%MACEND;

NOR3ENABLE(%SF00, %FF00, P23, N1);
NOR3ENABLE(%SF160, %FF160, P22, N2);
NOR3ENABLE(%SF320, %FF320, P21, N3);
NOR3ENABLE(%SF480, %FF480, P20, N4);
NOR3ENABLE(%SF640, %FF640, P19, N5);
NOR3ENABLE(%SF800, %FF800, P18, N6);
NOR3ENABLE(%SF960, %FF960, P17, N7);
NOR3ENABLE(%SF1120, %FF1120, P16, N8);
NOR3ENABLE(%SF1280, %FF1280, P15, N9);
NOR3ENABLE(%SF1440, %FF1440, P14, N10);
%EndModel

%StartModel
%Manufacturer:National
%Type:20L10
%PartNumber:NATL'PAL20L10A
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P22 ~P22 P4 ~P4 P21 ~P21 P5 ~P5 P20 ~P20
     P6 ~P6 P19 ~P19 P7 ~P7 P18 ~P18 P8 ~P8 P17 ~P17 P9 ~P9 P16 ~P16
     P10 ~P10 P15 ~P15 P11 ~P11 P13 ~P13 *

%MACRO NOR3ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; OutPin; 23,23,30,30);
 %ELSE
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; TNode; 23,23,30,30);
  TSB(TNode, %InFuse; OutPin; 19,19,15,15,30,30,30,30);
 %END;
%MACEND;

NOR3ENABLE(%SF00, %FF00, P23, N1);
NOR3ENABLE(%SF160, %FF160, P22, N2);
NOR3ENABLE(%SF320, %FF320, P21, N3);
NOR3ENABLE(%SF480, %FF480, P20, N4);
NOR3ENABLE(%SF640, %FF640, P19, N5);
NOR3ENABLE(%SF800, %FF800, P18, N6);
NOR3ENABLE(%SF960, %FF960, P17, N7);
NOR3ENABLE(%SF1120, %FF1120, P16, N8);
NOR3ENABLE(%SF1280, %FF1280, P15, N9);
NOR3ENABLE(%SF1440, %FF1440, P14, N10);
%EndModel

%StartModel
%Manufacturer:National
%Type:20L2
%PartNumber:NATL'PAL20L2
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P23 ~P23 P4 ~P4 P22 ~P22 P5 ~P5 P21 ~P21
     P6 ~P6 P20 ~P20 P7 ~P7 P17 ~P17 P8 ~P8 P16 ~P16 P9 ~P9 P15 ~P15
     P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

NOR(%FF00, %FF40, %FF80, %FF120, %FF160, %FF200, %FF240, %FF280; P19; 25,25,40,40);
NOR(%FF320, %FF360, %FF400, %FF440, %FF480, %FF520, %FF560, %FF600; P18; 25,25,40,40);
%EndModel

%StartModel
%Manufacturer:National
%Type:20L2
%PartNumber:NATL'PAL20L2A
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P23 ~P23 P4 ~P4 P22 ~P22 P5 ~P5 P21 ~P21
     P6 ~P6 P20 ~P20 P7 ~P7 P17 ~P17 P8 ~P8 P16 ~P16 P9 ~P9 P15 ~P15
     P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

NOR(%FF00, %FF40, %FF80, %FF120, %FF160, %FF200, %FF240, %FF280; P19; 15,15,25,25);
NOR(%FF320, %FF360, %FF400, %FF440, %FF480, %FF520, %FF560, %FF600; P18; 15,15,25,25);
%EndModel

%StartModel
%Manufacturer:National
%Type:20L8
%PartNumber:NATL'PAL20L8A
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P23 ~P23 P4 ~P4 P21 ~P21 P5 ~P5 P20 ~P20
     P6 ~P6 P19 ~P19 P7 ~P7 P18 ~P18 P8 ~P8 P17 ~P17 P9 ~P9 P16 ~P16
     P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280; OutPin; 18,18,25,25);
 %ELSE
  NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; TNode; 18,18,25,25);
  TSB(TNode, %InFuse; OutPin; 10,10,13,13,25,25,25,25);
 %END;
%MACEND;

NOR7ENABLE(%SF00, %FF00, P22, N1);
NOR7ENABLE(%SF320, %FF320, P21, N2);
NOR7ENABLE(%SF640, %FF640, P20, N3);
NOR7ENABLE(%SF960, %FF960, P19, N4);
NOR7ENABLE(%SF1280, %FF1280, P18, N5);
NOR7ENABLE(%SF1600, %FF1600, P17, N6);
NOR7ENABLE(%SF1920, %FF1920, P16, N7);
NOR7ENABLE(%SF2240, %FF2240, P15, N8);
%EndModel

%StartModel
%Manufacturer:National
%Type:20L8
%PartNumber:NATL'PAL20L8B
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P23 ~P23 P4 ~P4 P21 ~P21 P5 ~P5 P20 ~P20
     P6 ~P6 P19 ~P19 P7 ~P7 P18 ~P18 P8 ~P8 P17 ~P17 P9 ~P9 P16 ~P16
     P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280; OutPin; 11,11,15,15);
 %ELSE
  NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; TNode; 11,11,15,15);
  TSB(TNode, %InFuse; OutPin; 11,11,11,11,18,18,15,15);
 %END;
%MACEND;

NOR7ENABLE(%SF00, %FF00, P22, N1);
NOR7ENABLE(%SF320, %FF320, P21, N2);
NOR7ENABLE(%SF640, %FF640, P20, N3);
NOR7ENABLE(%SF960, %FF960, P19, N4);
NOR7ENABLE(%SF1280, %FF1280, P18, N5);
NOR7ENABLE(%SF1600, %FF1600, P17, N6);
NOR7ENABLE(%SF1920, %FF1920, P16, N7);
NOR7ENABLE(%SF2240, %FF2240, P15, N8);
%EndModel

;Delays for the following device are preliminary. `Typical'
;delays were not given; used typical delays for other `D' types.
;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:20L8
%PartNumber:NATL'PAL20L8D
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P1 ~P1 P3 ~P3 P23 ~P23 P4 ~P4 P21 ~P21 P5 ~P5 P20 ~P20
     P6 ~P6 P19 ~P19 P7 ~P7 P18 ~P18 P8 ~P8 P17 ~P17 P9 ~P9 P16 ~P16
     P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280; OutPin; 7,7,10,10);
 %ELSE
  NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; TNode; 7,7,10,10);
  TSB(TNode, %InFuse; OutPin; 7,7,5,5,10,10,10,10);
 %END;
%MACEND;

NOR7ENABLE(%SF00, %FF00, P22, N1);
NOR7ENABLE(%SF320, %FF320, P21, N2);
NOR7ENABLE(%SF640, %FF640, P20, N3);
NOR7ENABLE(%SF960, %FF960, P19, N4);
NOR7ENABLE(%SF1280, %FF1280, P18, N5);
NOR7ENABLE(%SF1600, %FF1600, P17, N6);
NOR7ENABLE(%SF1920, %FF1920, P16, N7);
NOR7ENABLE(%SF2240, %FF2240, P15, N8);
%EndModel

%StartModel
%Manufacturer:National
%Type:20R4
%PartNumber:NATL'PAL20R4A
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 P22 ~P22 P4 ~P4 P21 ~P21 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 P16 ~P16 P10 ~P10 P15 ~P15
   P11 ~P11 P14 ~P14 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
  DQFF(TLNode,P1;NodeInp;12,12,18,0,7,7,15,15,25,0,15,15);
  TSB(NodeInp,L1;OutPin;10,10,11,11,20,20,20,20);
%MACEND;

%MACRO NOR7ENABLE(InFuse:%FF, EnableFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; OutPin; 18,18,25,25);
 %ELSE
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; TNode; 18,18,25,25);
   TSB(TNode, %InFuse; OutPin; 10,10,13,13,25,25,25,25);
 %END;
%MACEND;

LINV(P13; L1);
NOR7ENABLE(%FF00, %SF00, P22, N1);
NOR7ENABLE(%FF320, %SF320, P21, N2);
NOR8DFF(%FF640, N3, L2, P20);
NOR8DFF(%FF960, N4, L3, P19);
NOR8DFF(%FF1280, N5, L4, P18);
NOR8DFF(%FF1600, N6, L5, P17);
NOR7ENABLE(%FF1920, %SF1920, P16, N7);
NOR7ENABLE(%FF2240, %SF2240, P15, N8);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
;The following device reset on power-up
%StartModel
%Manufacturer:National
%Type:20R4
%PartNumber:NATL'PAL20R4B
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 P22 ~P22 P4 ~P4 P21 ~P21 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 P16 ~P16 P10 ~P10 P15 ~P15
   P11 ~P11 P14 ~P14 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
  DQFFP(TLNode,P1,IPL;NodeInp;8,8,10,0,5,5,1,1,1,1,12,12,15,0,10,10,1,1,1,1);
  TSB(NodeInp,L1;OutPin;10,10,8,8,15,15,12,12);
%MACEND;

%MACRO NOR7ENABLE(InFuse:%FF, EnableFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; OutPin; 11,11,15,15);
 %ELSE
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; TNode; 11,11,15,15);
   TSB(TNode, %InFuse; OutPin; 11,11,11,11,18,18,15,15);
 %END;
%MACEND;

LINV(P13; L1);
NOR7ENABLE(%FF00, %SF00, P22, N1);
NOR7ENABLE(%FF320, %SF320, P21, N2);
NOR8DFF(%FF640, N3, L2, P20);
NOR8DFF(%FF960, N4, L3, P19);
NOR8DFF(%FF1280, N5, L4, P18);
NOR8DFF(%FF1600, N6, L5, P17);
NOR7ENABLE(%FF1920, %SF1920, P16, N7);
NOR7ENABLE(%FF2240, %SF2240, P15, N8);
%EndModel

;Taken from 1989 National Programmable Logic
;The following device resets on power-up
;Delays for the following device are preliminary. `Typical'
;delays were not given; used typical delays for other `D' types.
%StartModel
%Manufacturer:National
%Type:20R4
%PartNumber:NATL'PAL20R4D
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 P22 ~P22 P4 ~P4 P21 ~P21 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 P16 ~P16 P10 ~P10 P15 ~P15
   P11 ~P11 P14 ~P14 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
  DQFFC(TLNode,P1,IPL;NodeInp;6,6,6,0,2,4,1,1,1,1,8,8,10,0,7,7,1,1,1,1);
  TSB(NodeInp,L1;OutPin;6,6,4,4,10,10,10,10);
%MACEND;

%MACRO NOR7ENABLE(InFuse:%FF, EnableFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; OutPin; 7,7,10,10);
 %ELSE
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; TNode; 7,7,10,10);
   TSB(TNode, %InFuse; OutPin; 7,7,5,5,10,10,10,10);
 %END;
%MACEND;

LINV(P13; L1);
NOR7ENABLE(%FF00, %SF00, P22, N1);
NOR7ENABLE(%FF320, %SF320, P21, N2);
NOR8DFF(%FF640, N3, L2, P20);
NOR8DFF(%FF960, N4, L3, P19);
NOR8DFF(%FF1280, N5, L4, P18);
NOR8DFF(%FF1600, N6, L5, P17);
NOR7ENABLE(%FF1920, %SF1920, P16, N7);
NOR7ENABLE(%FF2240, %SF2240, P15, N8);
%EndModel

%StartModel
%Manufacturer:National
%Type:20R6
%PartNumber:NATL'PAL20R6A
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 P22 ~P22 P4 ~P4 N2 ~N2 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 N7 ~N7 P10 ~P10 P15 ~P15
   P11 ~P11 P14 ~P14 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
  DQFF(TLNode,P1;NodeInp;12,12,18,0,7,7,15,15,25,0,15,15);
  TSB(NodeInp,L1;OutPin;10,10,11,11,20,20,20,20);
%MACEND;

%MACRO NOR7ENABLE(InFuse:%FF, EnableFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; OutPin; 18,18,25,25);
 %ELSE
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; TNode; 18,18,25,25);
  TSB(TNode, %InFuse; OutPin; 10,10,13,13,25,25,25,25);
 %END;
%MACEND;

LINV(P13; L1);
NOR7ENABLE(%FF00, %SF00, P22, N1);
NOR8DFF(%FF320, N2, L2, P21);
NOR8DFF(%FF640, N3, L3, P20);
NOR8DFF(%FF960, N4, L4, P19);
NOR8DFF(%FF1280, N5, L5, P18);
NOR8DFF(%FF1600, N6, L6, P17);
NOR8DFF(%FF1920, N7, L7, P16);
NOR7ENABLE(%FF2240, %SF2240, P15, N8);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
;The following device reset on power-up
%StartModel
%Manufacturer:National
%Type:20R6
%PartNumber:NATL'PAL20R6B
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 P22 ~P22 P4 ~P4 N2 ~N2 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 N7 ~N7 P10 ~P10 P15 ~P15
   P11 ~P11 P14 ~P14 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
  DQFFP(TLNode,P1,IPL;NodeInp;8,8,10,0,5,5,1,1,1,1,12,12,15,0,10,10,1,1,1,1);
  TSB(NodeInp,L1;OutPin;10,10,8,8,15,15,12,12);
%MACEND;

%MACRO NOR7ENABLE(InFuse:%FF, EnableFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; OutPin; 11,11,15,15);
 %ELSE
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; TNode; 11,11,15,15);
  TSB(TNode, %InFuse; OutPin; 11,11,11,11,18,18,15,15);
 %END;
%MACEND;

LINV(P13; L1);
NOR7ENABLE(%FF00, %SF00, P22, N1);
NOR8DFF(%FF320, N2, L2, P21);
NOR8DFF(%FF640, N3, L3, P20);
NOR8DFF(%FF960, N4, L4, P19);
NOR8DFF(%FF1280, N5, L5, P18);
NOR8DFF(%FF1600, N6, L6, P17);
NOR8DFF(%FF1920, N7, L7, P16);
NOR7ENABLE(%FF2240, %SF2240, P15, N8);
%EndModel

;Delays for the following device are preliminary. `Typical'
;delays were not given; used typical delays for other `D' types.
;Taken from 1989 National Programmable Logic Devices.
;The following device reset on power-up
%StartModel
%Manufacturer:National
%Type:20R6
%PartNumber:NATL'PAL20R6D
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 P22 ~P22 P4 ~P4 N2 ~N2 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 N7 ~N7 P10 ~P10 P15 ~P15
   P11 ~P11 P14 ~P14 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
  DQFFC(TLNode,P1,IPL;NodeInp;6,6,6,0,2,4,1,1,1,1,8,8,10,0,7,7,1,1,1,1);
  TSB(NodeInp,L1;OutPin;6,6,4,4,10,10,10,10);
%MACEND;

%MACRO NOR7ENABLE(InFuse:%FF, EnableFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; OutPin; 7,7,10,10);
 %ELSE
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; TNode; 7,7,10,10);
  TSB(TNode, %InFuse; OutPin; 7,7,5,5,10,10,10,10);
 %END;
%MACEND;

LINV(P13; L1);
NOR7ENABLE(%FF00, %SF00, P22, N1);
NOR8DFF(%FF320, N2, L2, P21);
NOR8DFF(%FF640, N3, L3, P20);
NOR8DFF(%FF960, N4, L4, P19);
NOR8DFF(%FF1280, N5, L5, P18);
NOR8DFF(%FF1600, N6, L6, P17);
NOR8DFF(%FF1920, N7, L7, P16);
NOR7ENABLE(%FF2240, %SF2240, P15, N8);
%EndModel

%StartModel
%Manufacturer:National
%Type:20R8
%PartNumber:NATL'PAL20R8A
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 N1 ~N1 P4 ~P4 N2 ~N2 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 N7 ~N7 P10 ~P10 N8 ~N8
   P11 ~P11 P14 ~P14 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
  DQFF(TLNode,P1;NodeInp;12,12,18,0,7,7,15,15,25,0,15,15);
  TSB(NodeInp,L1;OutPin;10,10,11,11,20,20,20,20);
%MACEND;

LINV(P13; L1);
NOR8DFF(%FF00, N1, L2, P22);
NOR8DFF(%FF320, N2, L3, P21);
NOR8DFF(%FF640, N3, L4, P20);
NOR8DFF(%FF960, N4, L5, P19);
NOR8DFF(%FF1280, N5, L6, P18);
NOR8DFF(%FF1600, N6, L7, P17);
NOR8DFF(%FF1920, N7, L8, P16);
NOR8DFF(%FF2240, N8, L9, P15);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
;The following device reset on power-up
%StartModel
%Manufacturer:National
%Type:20R8
%PartNumber:NATL'PAL20R8B
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 N1 ~N1 P4 ~P4 N2 ~N2 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 N7 ~N7 P10 ~P10 N8 ~N8
   P11 ~P11 P14 ~P14 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
  DQFFP(TLNode,P1,IPL;NodeInp;8,8,10,0,5,5,1,1,1,1,12,12,15,0,10,10,1,1,1,1);
  TSB(NodeInp,L1;OutPin;10,10,8,8,15,15,12,12);
%MACEND;

LINV(P13; L1);
NOR8DFF(%FF00, N1, L2, P22);
NOR8DFF(%FF320, N2, L3, P21);
NOR8DFF(%FF640, N3, L4, P20);
NOR8DFF(%FF960, N4, L5, P19);
NOR8DFF(%FF1280, N5, L6, P18);
NOR8DFF(%FF1600, N6, L7, P17);
NOR8DFF(%FF1920, N7, L8, P16);
NOR8DFF(%FF2240, N8, L9, P15);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
;The following device reset on power-up
;Delays for the following device are preliminary. `Typical'
;delays were not given; used typical delays for other `D' types.
%StartModel
%Manufacturer:National
%Type:20R8
%PartNumber:NATL'PAL20R8D
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 N1 ~N1 P4 ~P4 N2 ~N2 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 N7 ~N7 P10 ~P10 N8 ~N8
   P11 ~P11 P14 ~P14 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
  DQFFC(TLNode,P1,IPL;NodeInp;6,6,6,0,2,4,1,1,1,1,8,8,10,0,7,7,1,1,1,1);
  TSB(NodeInp,L1;OutPin;6,6,4,4,10,10,10,10);
%MACEND;

LINV(P13; L1);
NOR8DFF(%FF00, N1, L2, P22);
NOR8DFF(%FF320, N2, L3, P21);
NOR8DFF(%FF640, N3, L4, P20);
NOR8DFF(%FF960, N4, L5, P19);
NOR8DFF(%FF1280, N5, L6, P18);
NOR8DFF(%FF1600, N6, L7, P17);
NOR8DFF(%FF1920, N7, L8, P16);
NOR8DFF(%FF2240, N8, L9, P15);
%EndModel

%StartModel
%Manufacturer:National
%Type:20RA10
%PartNumber:NATL'PAL20RA10
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 P23 ~P23 P3 ~P3 P22 ~P22 P4 ~P4 P21 ~P21 P5 ~P5 P20 ~P20 P6 ~P6
           P19 ~P19 P7 ~P7 P18 ~P18 P8 ~P8 P17 ~P17  P9 ~P9 P16 ~P16 P10 ~P10  P15 ~P15
           P11 ~P11 P14 ~P14 *


%MACRO LOADMac(IO:%TEXT, IOBar:%TEXT, InFuse:%FF, TLNode1:%TEXT,
                   TLNode2:%TEXT, ResetLoadInput:%TEXT, TLNode3:%TEXT,
        	   SetLoadInput:%TEXT, XorFuse:%SF, TNode:%TEXT, PClock:%TEXT,
                   RegOut:%TEXT, TLSet:%TEXT);

  LINV(IO; IOBar);
  LAND(P1, %InFuse+80; TLNode1);
  LAND(L1, IOBar; TLNode2);
  LNOR(TLNode1, TLNode2, IPH; ResetLoadInput);
  LINV(%InFuse+120; TLSet);
  LAND(P1, TLSet; TLNode3);
  LOR(TLNode2, TLNode3; SetLoadInput);

 %IF %XorFuse=1 %THEN
  OR(%InFuse+160, %InFuse+200, %InFuse+240, %InFuse+280; TNode; 20,20,30,30);
 %ELSE
  NOR(%InFuse+160, %InFuse+200, %InFuse+240, %InFuse+280; TNode; 20,20,30,30);
 %END;
  AND(%InFuse+40; PClock; 0,0,0,0);
  DQFFPC(TNode, PClock, SetLoadInput, ResetLoadInput; RegOut; 17,17,10,0,13,13,22,27,1,1,30,30,20,0,20,20,35,40,1,1);
%MACEND;

%MACRO OUTPUTMac(InFuse:%FF, TNode:%TEXT, RegOutput:%TEXT, Output:%TEXT,
                 TsbEnable:%TEXT, IO:%TEXT, EnableFuse:%SF, SETFuse:%SF,
		 RESETFuse:%SF);

%IF %SETFuse..%SETFuse+39 = 1 %THEN
 %IF %RESETFuse..%RESETFuse+39 = 1 %THEN

   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
     ITSB(TNode, L2; IO; 15,15,15,15,30,30,30,30);
   %ELSE
     LAND(%InFuse, L2; TSBEnable);
     ITSB(TNode, TsbEnable; IO; 15,15,15,15,30,30,30,30);
   %END;

 %ELSE

   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
     ITSB(RegOutput, L2; IO; 15,15,15,15,30,30,30,30);
   %ELSE
     LAND(%InFuse, L2; TsbEnable);
     ITSB(RegOutput, TsbEnable; IO; 15,15,15,15,30,30,30,30);
   %END;
 %END;
%ELSE
 %IF %RESETFuse..%RESETFuse+39 = 1 %THEN

   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
     ITSB(RegOutput, L2; IO; 15,15,15,15,30,30,30,30);
   %ELSE
     LAND(%InFuse, L2; TsbEnable);
     ITSB(RegOutput, TsbEnable; IO; 15,15,15,15,30,30,30,30);
   %END;

 %ELSE

   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
     ITSB(RegOutput, L2; IO; 15,15,15,15,30,30,30,30);
   %ELSE
     LAND(%InFuse, L2; TsbEnable);
     ITSB(RegOutput, TsbEnable; IO; 15,15,15,15,30,30,30,30);
   %END;
 %END;
%END;
%MACEND;

LINV(P1;L1);
LINV(P13;L2);

LOADMac(P23, L3, %FF00, L4, L5, L6, L7, L8, %SF3200, N21, N1, N2, L73);
LOADMac(P22, L10, %FF320, L11, L12, L13, L14, L15, %SF3201, N22, N3, N4, L74);
LOADMac(P21, L17, %FF640, L18, L19, L20, L21, L22, %SF3202, N23, N5, N6, L75);
LOADMac(P20, L24, %FF960, L25, L26, L27, L28, L29, %SF3203, N24, N7, N8, L76);
LOADMac(P19, L31, %FF1280, L32, L33, L34, L35, L36, %SF3204, N25, N9, N10, L77);
LOADMac(P18, L38, %FF1600, L39, L40, L41, L42, L43, %SF3205, N26, N11, N12, L78);
LOADMac(P17, L45, %FF1920, L46, L47, L48, L49, L50, %SF3206, N27, N13, N14, L79);
LOADMac(P16, L52, %FF2240, L53, L54, L55, L56, L57, %SF3207, N28, N15, N16, L80);
LOADMac(P15, L59, %FF2560, L60, L61, L62, L63, L64, %SF3208, N29, N17, N18, L81);
LOADMac(P14, L66, %FF2880, L67, L68, L69, L70, L71, %SF3209, N30, N19, N20, L82);

OUTPUTMac(%FF00, N21, N2, L83, L84, P23, %SF00, %SF120, %SF80);
OUTPUTMac(%FF320, N22, N4, L85, L86, P22, %SF320, %SF440, %SF400);
OUTPUTMac(%FF640, N23, N6, L87, L88, P21, %SF640, %SF760, %SF720);
OUTPUTMac(%FF960, N24, N8, L89, L90, P20, %SF960, %SF1080, %SF1040);
OUTPUTMac(%FF1280, N25, N10, L91, L92, P19, %SF1280, %SF1400, %SF1360);
OUTPUTMac(%FF1600, N26, N12, L93, L94, P18, %SF1600, %SF1720, %SF1680);
OUTPUTMac(%FF1920, N27, N14, L95, L96, P17, %SF1920, %SF2040, %SF2000);
OUTPUTMac(%FF2240, N28, N16, L97, L98, P16, %SF2240, %SF2360, %SF2320);
OUTPUTMac(%FF2560, N29, N18, L99, L100, P15, %SF2560, %SF2680, %SF2640);
OUTPUTMac(%FF2880, N30, N20, L100, L101, P14, %SF2880, %SF3000, %SF2960);
%EndModel

%StartModel
%Manufacturer:NATIONAL
%Type:20RP4
%PartNumber:NATL'PAL20RP4B
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 P22 ~P22 P4 ~P4 P21 ~P21 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 P16 ~P16 P10 ~P10 P15 ~P15
   P11 ~P11 P14 ~P14 *

%MACRO POR8DFF(InFuse:%FF, XorFuse:%SF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %END;
 DQFFC(TLNode,P1,IPL;NodeInp;8,8,5,0,5,5,1,1,1,1,12,12,10,0,10,10,1,1,1,1);
 TSB(NodeInp,L1;OutPin;10,10,11,11,15,15,15,15);
%MACEND;

%MACRO POR7ENABLE(InFuse:%FF, EnableFuse:%SF, XorFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; OutPin; 11,11,15,15);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280; OutPin; 11,11,15,15);
  %END;
 %ELSE
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; TNode; 11,11,15,15);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280; TNode; 11,11,15,15);
  %END;
  TSB(TNode, %InFuse; OutPin; 10,10,11,11,15,15,15,15);
 %END;
%MACEND;

LINV(P13; L1);
POR7ENABLE(%FF00, %SF00, %SF2560, P22, N1);
POR7ENABLE(%FF320, %SF320, %SF2561, P21, N2);
POR8DFF(%FF640, %SF2562, N3, L2, P20);
POR8DFF(%FF960, %SF2563, N4, L3, P19);
POR8DFF(%FF1280, %SF2564, N5, L4, P18);
POR8DFF(%FF1600, %SF2565, N6, L5, P17);
POR7ENABLE(%FF1920, %SF1920, %SF2566, P16, N7);
POR7ENABLE(%FF2240, %SF2240, %SF2567, P15, N8);
%EndModel

%StartModel
%Manufacturer:NATIONAL
%Type:20RP6
%PartNumber:NATL'PAL20RP6B
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 P22 ~P22 P4 ~P4 N2 ~N2 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 N7 ~N7 P10 ~P10 P15 ~P15
   P11 ~P11 P14 ~P14 *

%MACRO POR8DFF(InFuse:%FF, XorFuse:%SF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %END;
 DQFFC(TLNode,P1,IPL;NodeInp;8,8,5,0,5,5,1,1,1,1,12,12,10,0,10,10,1,1,1,1);
 TSB(NodeInp,L1;OutPin;10,10,11,11,15,15,15,15);
%MACEND;

%MACRO POR7ENABLE(InFuse:%FF, EnableFuse:%SF, XorFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; OutPin; 11,11,15,15);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280; OutPin; 11,11,15,15);
  %END;
 %ELSE
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; TNode; 11,11,15,15);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280; TNode; 11,11,15,15);
  %END;
  TSB(TNode, %InFuse; OutPin; 10,10,11,11,15,15,15,15);
 %END;
%MACEND;

LINV(P13; L1);
POR7ENABLE(%FF00, %SF00, %SF2560, P22, N1);
POR8DFF(%FF320, %SF2561, N2, L2, P21);
POR8DFF(%FF640, %SF2562, N3, L3, P20);
POR8DFF(%FF960, %SF2563, N4, L4, P19);
POR8DFF(%FF1280, %SF2564, N5, L5, P18);
POR8DFF(%FF1600, %SF2565, N6, L6, P17);
POR8DFF(%FF1920, %SF2566, N7, L7, P16);
POR7ENABLE(%FF2240, %SF2240, %SF2567, P15, N8);
%EndModel

%StartModel
%Manufacturer:NATIONAL
%Type:20RP8
%PartNumber:NATL'PAL20RP8B
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 N1 ~N1 P4 ~P4 N2 ~N2 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 N7 ~N7 P10 ~P10 N8 ~N8
   P11 ~P11 P14 ~P14 *

%MACRO POR8DFF(InFuse:%FF, XorFuse:%SF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %END;
 DQFFC(TLNode,P1,IPL;NodeInp;8,8,5,0,5,5,1,1,1,1,12,12,10,0,10,10,1,1,1,1);
 TSB(NodeInp,L1;OutPin;10,10,11,11,15,15,15,15);
%MACEND;

LINV(P13; L1);
POR8DFF(%FF00, %SF2560, N1, L2, P22);
POR8DFF(%FF320, %SF2561, N2, L3, P21);
POR8DFF(%FF640, %SF2562, N3, L4, P20);
POR8DFF(%FF960, %SF2563, N4, L5, P19);
POR8DFF(%FF1280, %SF2564, N5, L6, P18);
POR8DFF(%FF1600, %SF2565, N6, L7, P17);
POR8DFF(%FF1920, %SF2566, N7, L8, P16);
POR8DFF(%FF2240, %SF2567, N8, L9, P15);
%EndModel

%StartModel
%Manufacturer:National
%Type:20V8
%PartNumber:NATL'GAL20V8-20L
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4 P6 ~P6
     N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 P10 ~P10 N9 ~N9
     P11 ~P11 N10 ~N10 *

%MACRO FEEDBACK(N1FeedBack: %TEXT, N10FeedBack: %TEXT);
 %IF %SF2704 = 1 %THEN
  BUF(P1; N1FeedBack; 0,0,0,0);
  BUF(P13; N10FeedBack; 0,0,0,0);
 %ELSE
  BUF(P23; N1FeedBack; 0,0,0,0);
  BUF(P14; N10FeedBack; 0,0,0,0);
 %END;
%MACEND;

%MACRO V8MAC(S0:%SF, XorFuse:%SF, FeedBack:%TEXT, LorOutput:%TEXT, InFuse:%FF,
             OutPin:%TEXT, TNode:%TEXT, EnableFuse:%SF, TLNode:%TEXT,
	     TSNode:%TEXT, NextPin:%TEXT, PrevPin:%TEXT);
 %CASE %SF2704,%SF2705,%S0
   2:
     LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,
         %InFuse+240,%InFuse+280;LorOutput);
     %IF %XorFuse=0 %THEN
      LINV(LorOutput;TLNode);
      DQFFC(TLNode, P1, IPL; TNode; 13,13,15,0,12,12,1,1,1,1,15,15,15,0,12,12,1,1,1,1);
     %ELSE
      DQFFC(LorOutput, P1, IPL; TNode; 13,13,15,0,12,12,1,1,1,1,15,15,15,0,12,12,1,1,1,1);
     %END;
     TSB(TNode, L17; OutPin; 16,16,16,16,18,18,18,18);
     BUF(TNode; FeedBack; 0,0,0,0);
  |3:
     LOR(%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,
         %InFuse+280;LorOutput);
     %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 18,18,20,20);
      %ELSE
       BUF(LorOutput; OutPin; 18,18,20,20);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 18,18,20,20);
      %ELSE
       BUF(LorOutput; TNode; 18,18,20,20);
      %END;
      TSB(TNode, %InFuse; OutPin; 18,18,18,18,20,20,20,20);
     %END;
     BUF(OutPin; FeedBack; 0,0,0,0);
  |4:
     LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,
         %InFuse+240,%InFuse+280;LorOutput);
     %IF %XorFuse = 0 %THEN
      INV(LorOutput; OutPin; 18,18,20,20);
     %ELSE
      BUF(LorOutput; OutPin; 18,18,20,20);
     %END;
     BUF(ZERO; FeedBack; 0,0,0,0);
  |5:
     TSB(TSNode, ZERO; OutPin; 16,16,16,16,18,18,18,18);
     BUF(NextPin; FeedBack; 0,0,0,0);
  |7:
   LOR(%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,
       %InFuse+280;LorOutput);
     %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 18,18,20,20);
      %ELSE
       BUF(LorOutput; OutPin; 18,18,20,20);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 18,18,20,20);
      %ELSE
       BUF(LorOutput; TNode; 18,18,20,20);
      %END;
      TSB(TNode, %InFuse; OutPin; 18,18,18,18,20,20,20,20);
     %END;
     BUF(PrevPin; FeedBack; 0,0,0,0);
 %END;
%MACEND;

FEEDBACK(N1, N10);

LINV(P13;L17);

V8MAC(%SF2632, %SF2560, N2, L1, %FF00, P22, N11, %SF00, L9, N17, P23, P23);
V8MAC(%SF2633, %SF2561, N3, L2, %FF320, P21, N12, %SF320, L10, N18, P22, P21);
V8MAC(%SF2634, %SF2562, N4, L3, %FF640, P20, N13, %SF640, L11, N19, P21, P20);
V8MAC(%SF2635, %SF2563, N5, L4, %FF960, P19, N14, %SF960, L12, N20, P20, P19);
V8MAC(%SF2636, %SF2564, N6, L5, %FF1280, P18, N15, %SF1280, L13, N21, P17, P18);
V8MAC(%SF2637, %SF2565, N7, L6, %FF1600, P17, N16, %SF1600, L14, N22, P16, P17);
V8MAC(%SF2638, %SF2566, N8, L7, %FF1920, P16, N17, %SF1920, L15, N23, P15, P16);
V8MAC(%SF2639, %SF2567, N9, L8, %FF2240, P15, N18, %SF2240, L16, N24, P14, P14);
%EndModel

%StartModel
%Manufacturer:National
%Type:20V8
%PartNumber:NATL'GAL20V8-25Q
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4 P6 ~P6
     N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 P10 ~P10 N9 ~N9
     P11 ~P11 N10 ~N10 *

%MACRO FEEDBACK(N1FeedBack: %TEXT, N10FeedBack: %TEXT);
 %IF %SF2704 = 1 %THEN
  BUF(P1; N1FeedBack; 0,0,0,0);
  BUF(P13; N10FeedBack; 0,0,0,0);
 %ELSE
  BUF(P23; N1FeedBack; 0,0,0,0);
  BUF(P14; N10FeedBack; 0,0,0,0);
 %END;
%MACEND;

%MACRO V8MAC(S0:%SF, XorFuse:%SF, FeedBack:%TEXT, LorOutput:%TEXT, InFuse:%FF,
             OutPin:%TEXT, TNode:%TEXT, EnableFuse:%SF, TLNode:%TEXT,
	     TSNode:%TEXT, NextPin:%TEXT, PrevPin:%TEXT);
 %CASE %SF2704,%SF2705,%S0
   2:
     LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,
         %InFuse+240,%InFuse+280;LorOutput);
     %IF %XorFuse=0 %THEN
      LINV(LorOutput;TLNode);
      DQFFC(TLNode, P1, IPL; TNode; 23,23,20,0,15,15,1,1,1,1,25,25,20,0,15,15,1,1,1,1);
     %ELSE
      DQFFC(LorOutput, P1, IPL; TNode; 23,23,20,0,15,15,1,1,1,1,25,25,20,0,15,15,1,1,1,1);
     %END;
     TSB(TNode, L17; OutPin; 18,18,18,18,20,20,20,20);
     BUF(TNode; FeedBack; 0,0,0,0);
  |3:
     LOR(%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,
         %InFuse+280;LorOutput);
     %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 23,23,25,25);
      %ELSE
       BUF(LorOutput; OutPin; 23,23,25,25);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 23,23,25,25);
      %ELSE
       BUF(LorOutput; TNode; 23,23,25,25);
      %END;
      TSB(TNode, %InFuse; OutPin; 23,23,23,23,25,25,25,25);
     %END;
     BUF(OutPin; FeedBack; 0,0,0,0);
  |4:
     LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,
         %InFuse+240,%InFuse+280;LorOutput);
     %IF %XorFuse = 0 %THEN
      INV(LorOutput; OutPin; 23,23,25,25);
     %ELSE
      BUF(LorOutput; OutPin; 23,23,25,25);
     %END;
     BUF(ZERO; FeedBack; 0,0,0,0);
  |5:
     TSB(TSNode, ZERO; OutPin; 18,18,18,18,20,20,20,20);
     BUF(NextPin; FeedBack; 0,0,0,0);
  |7:
   LOR(%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,
       %InFuse+280;LorOutput);
     %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 23,23,25,25);
      %ELSE
       BUF(LorOutput; OutPin; 23,23,25,25);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 23,23,25,25);
      %ELSE
       BUF(LorOutput; TNode; 23,23,25,25);
      %END;
      TSB(TNode, %InFuse; OutPin; 23,23,23,23,25,25,25,25);
     %END;
     BUF(PrevPin; FeedBack; 0,0,0,0);
 %END;
%MACEND;

FEEDBACK(N1, N10);

LINV(P13;L17);

V8MAC(%SF2632, %SF2560, N2, L1, %FF00, P22, N11, %SF00, L9, N17, P23, P23);
V8MAC(%SF2633, %SF2561, N3, L2, %FF320, P21, N12, %SF320, L10, N18, P22, P21);
V8MAC(%SF2634, %SF2562, N4, L3, %FF640, P20, N13, %SF640, L11, N19, P21, P20);
V8MAC(%SF2635, %SF2563, N5, L4, %FF960, P19, N14, %SF960, L12, N20, P20, P19);
V8MAC(%SF2636, %SF2564, N6, L5, %FF1280, P18, N15, %SF1280, L13, N21, P17, P18);
V8MAC(%SF2637, %SF2565, N7, L6, %FF1600, P17, N16, %SF1600, L14, N22, P16, P17);
V8MAC(%SF2638, %SF2566, N8, L7, %FF1920, P16, N17, %SF1920, L15, N23, P15, P16);
V8MAC(%SF2639, %SF2567, N9, L8, %FF2240, P15, N18, %SF2240, L16, N24, P14, P14);
%EndModel

%StartModel
%Manufacturer:National
%Type:20V8
%PartNumber:NATL'GAL20V8-30Q
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4 P6 ~P6
     N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 P10 ~P10 N9 ~N9
     P11 ~P11 N10 ~N10 *

%MACRO FEEDBACK(N1FeedBack: %TEXT, N10FeedBack: %TEXT);
 %IF %SF2704 = 1 %THEN
  BUF(P1; N1FeedBack; 0,0,0,0);
  BUF(P13; N10FeedBack; 0,0,0,0);
 %ELSE
  BUF(P23; N1FeedBack; 0,0,0,0);
  BUF(P14; N10FeedBack; 0,0,0,0);
 %END;
%MACEND;

%MACRO V8MAC(S0:%SF, XorFuse:%SF, FeedBack:%TEXT, LorOutput:%TEXT, InFuse:%FF,
             OutPin:%TEXT, TNode:%TEXT, EnableFuse:%SF, TLNode:%TEXT,
	     TSNode:%TEXT, NextPin:%TEXT, PrevPin:%TEXT);
 %CASE %SF2704,%SF2705,%S0
   2:
     LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,
         %InFuse+240,%InFuse+280;LorOutput);
     %IF %XorFuse=0 %THEN
      LINV(LorOutput;TLNode);
      DQFFC(TLNode, P1, IPL; TNode; 18,18,25,0,15,15,1,1,1,1,20,20,25,0,15,15,1,1,1,1);
     %ELSE
      DQFFC(LorOutput, P1, IPL; TNode; 18,18,25,0,15,15,1,1,1,1,20,20,25,0,15,15,1,1,1,1);
     %END;
     TSB(TNode, L17; OutPin; 23,23,23,23,25,25,25,25);
     BUF(TNode; FeedBack; 0,0,0,0);
  |3:
     LOR(%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,
         %InFuse+280;LorOutput);
     %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 28,28,30,30);
      %ELSE
       BUF(LorOutput; OutPin; 28,28,30,30);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 28,28,30,30);
      %ELSE
       BUF(LorOutput; TNode; 28,28,30,30);
      %END;
      TSB(TNode, %InFuse; OutPin; 28,28,28,28,30,30,30,30);
     %END;
     BUF(OutPin; FeedBack; 0,0,0,0);
  |4:
     LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,
         %InFuse+240,%InFuse+280;LorOutput);
     %IF %XorFuse = 0 %THEN
      INV(LorOutput; OutPin; 28,28,30,30);
     %ELSE
      BUF(LorOutput; OutPin; 28,28,30,30);
     %END;
     BUF(ZERO; FeedBack; 0,0,0,0);
  |5:
     TSB(TSNode, ZERO; OutPin; 23,23,23,23,25,25,25,25);
     BUF(NextPin; FeedBack; 0,0,0,0);
  |7:
   LOR(%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,
       %InFuse+280;LorOutput);
     %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 28,28,30,30);
      %ELSE
       BUF(LorOutput; OutPin; 28,28,30,30);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 28,28,30,30);
      %ELSE
       BUF(LorOutput; TNode; 28,28,30,30);
      %END;
      TSB(TNode, %InFuse; OutPin; 28,28,28,28,30,30,30,30);
     %END;
     BUF(PrevPin; FeedBack; 0,0,0,0);
 %END;
%MACEND;

FEEDBACK(N1, N10);

LINV(P13;L17);

V8MAC(%SF2632, %SF2560, N2, L1, %FF00, P22, N11, %SF00, L9, N17, P23, P23);
V8MAC(%SF2633, %SF2561, N3, L2, %FF320, P21, N12, %SF320, L10, N18, P22, P21);
V8MAC(%SF2634, %SF2562, N4, L3, %FF640, P20, N13, %SF640, L11, N19, P21, P20);
V8MAC(%SF2635, %SF2563, N5, L4, %FF960, P19, N14, %SF960, L12, N20, P20, P19);
V8MAC(%SF2636, %SF2564, N6, L5, %FF1280, P18, N15, %SF1280, L13, N21, P17, P18);
V8MAC(%SF2637, %SF2565, N7, L6, %FF1600, P17, N16, %SF1600, L14, N22, P16, P17);
V8MAC(%SF2638, %SF2566, N8, L7, %FF1920, P16, N17, %SF1920, L15, N23, P15, P16);
V8MAC(%SF2639, %SF2567, N9, L8, %FF2240, P15, N18, %SF2240, L16, N24, P14, P14);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
%StartModel
%Manufacturer:National
%Type:20X10
%PartNumber:NATL'PAL20X10
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 ~N1 N1 P3 ~P3 ~N2 N2 P4 ~P4 ~N3 N3 P5 ~P5 ~N4 N4
           P6 ~P6 ~N5 N5 P7 ~P7 ~N6 N6 P8 ~P8 ~N7 N7 P9 ~P9 ~N8 N8
           P10 ~P10 ~N9 N9 P11 ~P11 ~N10 N10 *


%MACRO XDFF(InFuse:%FF, TL1:%TEXT, TL2:%TEXT, TL3:%TEXT, TN1:%TEXT, OutPin:%TEXT);
LOR(%InFuse, %InFuse+40; TL1);
LOR(%InFuse+80, %InFuse+120; TL2);
LXOR(TL1, TL2; TL3);
DQFF(TL3, P1; TN1; 20,20,38,0,10,20,30,30,50,0,25,35);
ITSB(TN1, L1; OutPin; 20,20,20,20,35,35,35,35);
%MACEND;

LINV(P13; L1);

XDFF(%FF00, L2, L3, L4, N1, P23);
XDFF(%FF160, L5, L6, L7, N2, P22);
XDFF(%FF320, L8, L9, L10, N3, P21);
XDFF(%FF480, L11, L12, L13, N4, P20);
XDFF(%FF640, L14, L15, L16, N5, P19);
XDFF(%FF800, L17, L18, L19, N6, P18);
XDFF(%FF960, L20, L21, L22, N7, P17);
XDFF(%FF1120, L23, L24, L25, N8, P16);
XDFF(%FF1280, L26, L27, L28, N9, P15);
XDFF(%FF1440, L29, L30, L31, N10, P14);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
;The following device has power-up reset
%StartModel
%Manufacturer:National
%Type:20X10
%PartNumber:NATL'PAL20X10A
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 ~N1 N1 P3 ~P3 ~N2 N2 P4 ~P4 ~N3 N3 P5 ~P5 ~N4 N4
           P6 ~P6 ~N5 N5 P7 ~P7 ~N6 N6 P8 ~P8 ~N7 N7 P9 ~P9 ~N8 N8
           P10 ~P10 ~N9 N9 P11 ~P11 ~N10 N10 *


%MACRO XDFF(InFuse:%FF, TL1:%TEXT, TL2:%TEXT, TL3:%TEXT, TN1:%TEXT, OutPin:%TEXT);
LOR(%InFuse, %InFuse+40; TL1);
LOR(%InFuse+80, %InFuse+120; TL2);
LXOR(TL1, TL2; TL3);
DQFFC(TL3, P1, IPL; TN1; 10,10,20,0,7,15,1,1,1,1,15,15,30,0,15,25,1,1,1,1);
ITSB(TN1, L1; OutPin; 11,11,10,10,20,20,20,20);
%MACEND;

LINV(P13; L1);

XDFF(%FF00, L2, L3, L4, N1, P23);
XDFF(%FF160, L5, L6, L7, N2, P22);
XDFF(%FF320, L8, L9, L10, N3, P21);
XDFF(%FF480, L11, L12, L13, N4, P20);
XDFF(%FF640, L14, L15, L16, N5, P19);
XDFF(%FF800, L17, L18, L19, N6, P18);
XDFF(%FF960, L20, L21, L22, N7, P17);
XDFF(%FF1120, L23, L24, L25, N8, P16);
XDFF(%FF1280, L26, L27, L28, N9, P15);
XDFF(%FF1440, L29, L30, L31, N10, P14);
%EndModel

;Taken from 1989 National Programmable Logic
%StartModel
%Manufacturer:National
%Type:20X4
%PartNumber:NATL'PAL20X4
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23 P3 ~P3 P22 ~P22 P4 ~P4 P21 ~P21 P5 ~P5 ~N4 N4
           P6 ~P6 ~N5 N5 P7 ~P7 ~N6 N6 P8 ~P8 ~N7 N7 P9 ~P9 P16 ~P16
           P10 ~P10 P15 ~P15 P11 ~P11 P14 ~P14 *

%MACRO NOR3ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; OutPin; 35,35,50,50);
 %ELSE
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; TNode; 35,35,50,50);
  TSB(TNode, %InFuse; OutPin; 35,35,35,35,45,45,45,45);
 %END;
%MACEND;

%MACRO XDFF(InFuse:%FF, TL1:%TEXT, TL2:%TEXT, TL3:%TEXT, TN1:%TEXT, OutPin:%TEXT);
LOR(%InFuse, %InFuse+40; TL1);
LOR(%InFuse+80, %InFuse+120; TL2);
LXOR(TL1, TL2; TL3);
DQFF(TL3, P1; TN1; 20,20,38,0,10,20,30,30,50,0,25,35);
ITSB(TN1, L1; OutPin; 20,20,20,20,35,35,35,35);
%MACEND;

LINV(P13; L1);

NOR3ENABLE(%SF00, %FF00, P23, N1);
NOR3ENABLE(%SF160, %FF160, P22, N2);
NOR3ENABLE(%SF320, %FF320, P21, N3);
XDFF(%FF480, L2, L3, L4, N4, P20);
XDFF(%FF640, L5, L6, L7, N5, P19);
XDFF(%FF800, L8, L9, L10, N6, P18);
XDFF(%FF960, L11, L12, L13, N7, P17);
NOR3ENABLE(%SF1120, %FF1120, P16, N8);
NOR3ENABLE(%SF1280, %FF1280, P15, N9);
NOR3ENABLE(%SF1440, %FF1440, P14, N10);
%EndModel

;Taken from 1989 National Programmable Logic
;The following device has power-up reset
%StartModel
%Manufacturer:National
%Type:20X4
%PartNumber:NATL'PAL20X4A
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23 P3 ~P3 P22 ~P22 P4 ~P4 P21 ~P21 P5 ~P5 ~N4 N4
           P6 ~P6 ~N5 N5 P7 ~P7 ~N6 N6 P8 ~P8 ~N7 N7 P9 ~P9 P16 ~P16
           P10 ~P10 P15 ~P15 P11 ~P11 P14 ~P14 *

%MACRO NOR3ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; OutPin; 23,23,30,30);
 %ELSE
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; TNode; 23,23,30,30);
  TSB(TNode, %InFuse; OutPin; 19,19,15,15,30,30,30,30);
 %END;
%MACEND;

%MACRO XDFF(InFuse:%FF, TL1:%TEXT, TL2:%TEXT, TL3:%TEXT, TN1:%TEXT, OutPin:%TEXT);
LOR(%InFuse, %InFuse+40; TL1);
LOR(%InFuse+80, %InFuse+120; TL2);
LXOR(TL1, TL2; TL3);
DQFFC(TL3, P1, IPL; TN1; 10,10,20,0,7,15,1,1,1,1,15,15,30,0,15,25,1,1,1,1);
ITSB(TN1, L1; OutPin; 19,19,15,15,30,30,30,30);
%MACEND;

LINV(P13; L1);

NOR3ENABLE(%SF00, %FF00, P23, N1);
NOR3ENABLE(%SF160, %FF160, P22, N2);
NOR3ENABLE(%SF320, %FF320, P21, N3);
XDFF(%FF480, L2, L3, L4, N4, P20);
XDFF(%FF640, L5, L6, L7, N5, P19);
XDFF(%FF800, L8, L9, L10, N6, P18);
XDFF(%FF960, L11, L12, L13, N7, P17);
NOR3ENABLE(%SF1120, %FF1120, P16, N8);
NOR3ENABLE(%SF1280, %FF1280, P15, N9);
NOR3ENABLE(%SF1440, %FF1440, P14, N10);
%EndModel

;Taken from 1989 National Programmable Logic
%StartModel
%Manufacturer:National
%Type:20X8
%PartNumber:NATL'PAL20X8
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23 P3 ~P3 ~N2 N2 P4 ~P4 ~N3 N3 P5 ~P5 ~N4 N4
           P6 ~P6 ~N5 N5 P7 ~P7 ~N6 N6 P8 ~P8 ~N7 N7 P9 ~P9 ~N8 N8
           P10 ~P10 ~N9 N9 P11 ~P11 P14 ~P14 *

%MACRO NOR3ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; OutPin; 35,35,50,50);
 %ELSE
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; TNode; 35,35,50,50);
  TSB(TNode, %InFuse; OutPin; 35,35,35,35,45,45,45,45);
 %END;
%MACEND;

%MACRO XDFF(InFuse:%FF, TL1:%TEXT, TL2:%TEXT, TL3:%TEXT, TN1:%TEXT, OutPin:%TEXT);
LOR(%InFuse, %InFuse+40; TL1);
LOR(%InFuse+80, %InFuse+120; TL2);
LXOR(TL1, TL2; TL3);
DQFF(TL3, P1; TN1; 20,20,38,0,10,20,30,30,50,0,25,35);
ITSB(TN1, L1; OutPin; 20,20,20,20,35,35,35,35);
%MACEND;

LINV(P13; L1);

NOR3ENABLE(%SF00, %FF00, P23, N1);
XDFF(%FF160,  L2, L3, L4, N2, P22);
XDFF(%FF320,  L5, L6, L7, N3, P21);
XDFF(%FF480, L8, L9, L10, N4, P20);
XDFF(%FF640, L11, L12, L13, N5, P19);
XDFF(%FF800, L14, L15, L16, N6, P18);
XDFF(%FF960, L17, L18, L19, N7, P17);
XDFF(%FF1120,  L20, L21, L22, N8, P16);
XDFF(%FF1280,  L23, L24, L25, N9, P15);
NOR3ENABLE(%SF1440, %FF1440, P14, N10);
%EndModel

;Taken from 1989 National Programmable Logic
;The following device has power-up reset
%StartModel
%Manufacturer:National
%Type:20X8
%PartNumber:NATL'PAL20X8A
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23 P3 ~P3 ~N2 N2 P4 ~P4 ~N3 N3 P5 ~P5 ~N4 N4
           P6 ~P6 ~N5 N5 P7 ~P7 ~N6 N6 P8 ~P8 ~N7 N7 P9 ~P9 ~N8 N8
           P10 ~P10 ~N9 N9 P11 ~P11 P14 ~P14 *

%MACRO NOR3ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; OutPin; 23,23,30,30);
 %ELSE
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; TNode; 23,23,30,30);
  TSB(TNode, %InFuse; OutPin; 19,19,15,15,30,30,30,30);
 %END;
%MACEND;

%MACRO XDFF(InFuse:%FF, TL1:%TEXT, TL2:%TEXT, TL3:%TEXT, TN1:%TEXT, OutPin:%TEXT);
LOR(%InFuse, %InFuse+40; TL1);
LOR(%InFuse+80, %InFuse+120; TL2);
LXOR(TL1, TL2; TL3);
DQFFC(TL3, P1,IPL; TN1; 10,10,20,0,7,15,1,1,1,1,15,15,30,0,15,25,1,1,1,1);
ITSB(TN1, L1; OutPin; 11,11,10,10,20,20,20,20);
%MACEND;

LINV(P13; L1);

NOR3ENABLE(%SF00, %FF00, P23, N1);
XDFF(%FF160,  L2, L3, L4, N2, P22);
XDFF(%FF320,  L5, L6, L7, N3, P21);
XDFF(%FF480, L8, L9, L10, N4, P20);
XDFF(%FF640, L11, L12, L13, N5, P19);
XDFF(%FF800, L14, L15, L16, N6, P18);
XDFF(%FF960, L17, L18, L19, N7, P17);
XDFF(%FF1120,  L20, L21, L22, N8, P16);
XDFF(%FF1280,  L23, L24, L25, N9, P15);
NOR3ENABLE(%SF1440, %FF1440, P14, N10);
%EndModel

;DELAYS FOR THE 10012C4 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS
;
%StartModel
%Manufacturer:NATIONAL
%Type:EC12C4
%PartNumber:NATL'PAL10012C4
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P1 ~P1 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P16 ~P16 P9 ~P9 P15 ~P15
     P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

LOR(%FF512, %FF544, %FF576, %FF608, %FF640, %FF672, %FF704, %FF736; L1);
LOR(%FF768, %FF800, %FF832, %FF864, %FF896, %FF928, %FF960, %FF992; L2);
LOR(%FF1024, %FF1056, %FF1088, %FF1120, %FF1152, %FF1184, %FF1216, %FF1248; L3);
LOR(%FF1280, %FF1312, %FF1344, %FF1376, %FF1408, %FF1440, %FF1472, %FF1504; L4);
SET(RLOW);
BUF(L1;P20;40,40,40,40);
BUF(L2;P5;40,40,40,40);
BUF(L3;P18;40,40,40,40);
BUF(L4;P7;40,40,40,40);
INV(L1;P21;40,40,40,40);
INV(L2;P4;40,40,40,40);
INV(L3;P17;40,40,40,40);
INV(L4;P8;40,40,40,40);
%EndModel

;THE NATIONAL 16LD4 IS DIFFERENT THEN THE GENERIC 16LD4; THE FUSE AT THE
;XOR INPUT IS ATTACHED TO VCC RATHER THAN GND AS IN THE GENERIC.
;
;DELAYS FOR THE 10016LD4 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS.
;
%StartModel
%Manufacturer:NATIONAL
%Type:EC16LD4
%PartNumber:NATL'PAL10016LD4
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N2 ~N2 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 N1 ~N1 N4 ~N4 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N3 ~N3 *

%MACRO POR8(XorFuse:%SF, InFuse:%FF, OutPin:%TEXT);
 %IF %XorFuse=0 %THEN
  OR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
      %InFuse+192, %InFuse+224; OutPin; 60,60,60,60);
 %ELSE
  NOR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 60,60,60,60);
 %END;
%MACEND;

%MACRO POR8LATCH1(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,L2,ONE,L1;NodeInp;25,25,25,25,50,0,40,45,45,40,25,25,25,25,50,0,40,45,45,40);
 AND(NodeInp,L4;OutPin;10,10,10,10);
%MACEND;

%MACRO POR8LATCH2(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,L3,ONE,L1;NodeInp;25,25,25,25,50,0,40,45,45,40,25,25,25,25,50,0,40,45,45,40);
 AND(NodeInp,L4;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
LINV(P16;L2);
LINV(P9;L3);
LINV(P13;L4);
SET(RLOW);
POR8(%SF2048, %FF00, P21);
POR8(%SF2049, %FF256, P4);
POR8LATCH1(%SF2050, %FF512, N1, L5, P20);
POR8LATCH2(%SF2051, %FF768, N2, L6, P5);
POR8LATCH1(%SF2052, %FF1024, N3, L7, P18);
POR8LATCH2(%SF2053, %FF1280, N4, L8, P7);
POR8(%SF2054, %FF1536, P17);
POR8(%SF2055, %FF1792, P8);
%EndModel

;DELAYS FOR THE 10016LD8 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS.
;
%StartModel
%Manufacturer:National
%Type:EC16LD8N
%PartNumber:NATL'PAL10016LD8
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N4 ~N4 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 N1 ~N1 N2 ~N2 N7 ~N7
     N8 ~N8 N3 ~N3 N6 ~N6 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N5 ~N5 *

%MACRO POR8LATCH1(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,P16,ONE,L1;NodeInp;25,25,25,25,50,0,40,45,45,40,25,25,25,25,50,0,40,45,45,40);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

%MACRO POR8LATCH2(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,P9,ONE,L1;NodeInp;25,25,25,25,50,0,40,45,45,40,25,25,25,25,50,0,40,45,45,40);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
LINV(P13;L2);
SET(RLOW);
POR8LATCH1(%SF2048, %FF00, N1, L3, P21);
POR8LATCH2(%SF2049, %FF256, N2, L4, P4);
POR8LATCH1(%SF2050, %FF512, N3, L5, P20);
POR8LATCH2(%SF2051, %FF768, N4, L6, P5);
POR8LATCH1(%SF2052, %FF1024, N5, L7, P18);
POR8LATCH2(%SF2053, %FF1280, N6, L8, P7);
POR8LATCH1(%SF2054, %FF1536, N7, L9, P17);
POR8LATCH2(%SF2055, %FF1792, N8, L10, P8);
%EndModel

;DELAYS FOR THE 10016LM4A ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS
;
%StartModel
%Manufacturer:NATIONAL
%Type:EC16LM4
%PartNumber:NATL'PAL10016LM4A
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P5 ~P5 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 P20 ~P20 P7 ~P7 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 P18 ~P18 *

%MACRO POR8LATCH1(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,L2,ONE,L1;NodeInp;10,10,10,10,30,0,20,25,25,20,10,10,10,10,30,0,20,25,25,20);
 BUF(NodeInp;OutPin;10,10,10,10);
%MACEND;

%MACRO POR8LATCH2(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,L3,ONE,L1;NodeInp;10,10,10,10,30,0,20,25,25,20,10,10,10,10,30,0,20,25,25,20);
 BUF(NodeInp;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
LNOR(P16,P13;L2);
LNOR(P9,P13;L3);
SET(RLOW);
POR8LATCH1(%SF2050, %FF512, N1, L4, P20);
POR8LATCH2(%SF2051, %FF768, N2, L5, P5);
POR8LATCH1(%SF2052, %FF1024, N3, L6, P18);
POR8LATCH2(%SF2053, %FF1280, N4, L7, P7);
%EndModel

;DELAYS FOR THE 10016P4A ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS
;
%StartModel
%Manufacturer:National
%Type:EC16P4
%PartNumber:NATL'PAL10016P4A
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P1 ~P1 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 P16 ~P16 P9 ~P9 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

%MACRO POR(InFuse:%FF, XorFuse:%SF, OutPin:%TEXT);
 %IF %XorFuse=0 %THEN
  NOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224; OutPin;1,1,1,1);
 %ELSE
  OR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224; OutPin;1,1,1,1);
 %END;
%MACEND;

SET(RLOW);
POR(%FF512, %SF2050, P20);
POR(%FF768, %SF2051, P5);
POR(%FF1024, %SF2052, P18);
POR(%FF1280, %SF2053, P7);
%EndModel

;DELAYS FOR THE 10016P8 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS
;
%StartModel
%Manufacturer:National
%Type:EC16P8
%PartNumber:NATL'PAL10016P8
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P1 ~P1 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 P16 ~P16 P9 ~P9 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

%MACRO POR(InFuse:%FF, XorFuse:%SF, OutPin:%TEXT);
 %IF %XorFuse=0 %THEN
  NOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224; OutPin;1,1,1,1);
 %ELSE
  OR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224; OutPin;1,1,1,1);
 %END;
%MACEND;

SET(RLOW);
POR(%FF00, %SF2048, P21);
POR(%FF256, %SF2049, P4);
POR(%FF512, %SF2050, P20);
POR(%FF768, %SF2051, P5);
POR(%FF1024, %SF2052, P18);
POR(%FF1280, %SF2053, P7);
POR(%FF1536, %SF2054, P17);
POR(%FF1792, %SF2055, P8);
%EndModel

;DELAYS FOR THE 10016RC4 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS.
;REMOVAL TIME WAS NOT GIVEN; USED 0 ns.
;
%StartModel
%Manufacturer:National
%Type:EC16RC4N
%PartNumber:NATL'PAL10016RC4
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N3 ~N3 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4  P17 ~P17
     P8 ~P8 N2 ~N2 N5 ~N5 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N4 ~N4 *

%MACRO POR8(XorFuse:%SF, InFuse:%FF, OutPin:%TEXT);
 %IF %XorFuse=0 %THEN
  NOR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
      %InFuse+192, %InFuse+224; OutPin; 60,60,60,60);
 %ELSE
  OR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 60,60,60,60);
 %END;
%MACEND;

%MACRO POR8DFF(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,N1,L1;NodeInp;25,25,50,0,40,40,45,45,40,0,25,25,50,0,40,40,45,45,40,0);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
LINV(P13;L2);
OR(P9,P16;N1;0,0,0,0);
SET(RLOW);
POR8(%SF2048, %FF00, P21);
POR8(%SF2049, %FF256, P4);
POR8DFF(%SF2050, %FF512, N2, L3, P20);
POR8DFF(%SF2051, %FF768, N3, L4, P5);
POR8DFF(%SF2052, %FF1024, N4, L5, P18);
POR8DFF(%SF2053, %FF1280, N5, L6, P7);
POR8(%SF2054, %FF1536, P17);
POR8(%SF2055, %FF1792, P8);
%EndModel

;DELAYS FOR THE 10016RC8 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS.
;REMOVAL TIME WAS NOT GIVEN; USED 0 ns.
;
%StartModel
%Manufacturer:NATIONAL
%Type:EC16RC8N
%PartNumber:NATL'PAL10016RC8
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N5 ~N5 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 N2 ~N2 N3 ~N3 N8 ~N8
     N9 ~N9 N4 ~N4 N7 ~N7 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N6 ~N6 *

%MACRO POR8DFF(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,N1,L1;NodeInp;25,25,50,0,40,40,45,45,40,0,25,25,50,0,40,40,45,45,40,0);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
LINV(P13;L2);
OR(P9,P16;N1;0,0,0,0);
SET(RLOW);
POR8DFF(%SF2048, %FF00, N2, L3, P21);
POR8DFF(%SF2049, %FF256, N3, L4, P4);
POR8DFF(%SF2050, %FF512, N4, L5, P20);
POR8DFF(%SF2051, %FF768, N5, L6, P5);
POR8DFF(%SF2052, %FF1024, N6, L7, P18);
POR8DFF(%SF2053, %FF1280, N7, L8, P7);
POR8DFF(%SF2054, %FF1536, N8, L9, P17);
POR8DFF(%SF2055, %FF1792, N9, L10, P8);
%EndModel

;DELAYS FOR THE 10016RD4 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS.
;REMOVAL TIME WAS NOT GIVEN; USED 0 ns.
;
%StartModel
%Manufacturer:NATIONAL
%Type:EC16RD4N
%PartNumber:NATL'PAL10016RD4
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N2 ~N2 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 N1 ~N1 N4 ~N4 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N3 ~N3 *

%MACRO POR8(XorFuse:%SF, InFuse:%FF, OutPin:%TEXT);
 %IF %XorFuse=0 %THEN
  NOR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
      %InFuse+192, %InFuse+224; OutPin; 60,60,60,60);
 %ELSE
  OR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 60,60,60,60);
 %END;
%MACEND;

%MACRO POR8DFF1(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,P16,L1;NodeInp;25,25,50,0,40,40,45,45,40,0,25,25,50,0,40,40,45,45,40,0);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

%MACRO POR8DFF2(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,P9,L1;NodeInp;25,25,50,0,40,40,45,45,40,0,25,25,50,0,40,40,45,45,40,0);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
LINV(P13;L2);
SET(RLOW);
POR8(%SF2048, %FF00, P21);
POR8(%SF2049, %FF256, P4);
POR8DFF1(%SF2050, %FF512, N1, L3, P20);
POR8DFF2(%SF2051, %FF768, N2, L4, P5);
POR8DFF1(%SF2052, %FF1024, N3, L5, P18);
POR8DFF2(%SF2053, %FF1280, N4, L6, P7);
POR8(%SF2054, %FF1536, P17);
POR8(%SF2055, %FF1792, P8);
%EndModel

;DELAYS FOR THE 10016RD8 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS.
;REMOVAL TIME WAS NOT GIVEN; USED 0 ns.
;
%StartModel
%Manufacturer:NATIONAL
%Type:EC16RD8N
%PartNumber:NATL'PAL10016RD8
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N4 ~N4 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 N1 ~N1 N2 ~N2 N7 ~N7
     N8 ~N8 N3 ~N3 N6 ~N6 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N5 ~N5 *

%MACRO POR8DFF1(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,P16,L1;NodeInp;25,25,50,0,40,40,45,45,40,0,25,25,50,0,40,40,45,45,40,0);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

%MACRO POR8DFF2(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,P9,L1;NodeInp;25,25,50,0,40,40,45,45,40,0,25,25,50,0,40,40,45,45,40,0);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
LINV(P13;L2);

SET(RLOW);
POR8DFF1(%SF2048, %FF00, N1, L3, P21);
POR8DFF2(%SF2049, %FF256, N2, L4, P4);
POR8DFF1(%SF2050, %FF512, N3, L5, P20);
POR8DFF2(%SF2051, %FF768, N4, L6, P5);
POR8DFF1(%SF2052, %FF1024, N5, L7, P18);
POR8DFF2(%SF2053, %FF1280, N6, L8, P7);
POR8DFF1(%SF2054, %FF1536, N7, L9, P17);
POR8DFF2(%SF2055, %FF1792, N8, L10, P8);
%EndModel

;DELAYS FOR THE 10016RM4A ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS
;REMOVAL TIME WAS NOT GIVEN; USED 0 ns.
;
%StartModel
%Manufacturer:NATIONAL
%Type:EC16RM4
%PartNumber:NATL'PAL10016RM4A
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P5 ~P5 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 P20 ~P20 P7 ~P7 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 P18 ~P18 *

%MACRO POR8DFF1(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,N1,L1;NodeInp;10,10,30,0,20,20,25,25,20,0,10,10,30,0,20,20,25,25,20,0););
 BUF(NodeInp;OutPin;10,10,10,10);
%MACEND;

%MACRO POR8DFF2(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,N2,L1;NodeInp;10,10,30,0,20,20,25,25,20,0,10,10,30,0,20,20,25,25,20,0););
 BUF(NodeInp;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
OR(P16,P13;N1;0,0,0,0);
OR(P9,P13;N2;0,0,0,0);
SET(RLOW);
POR8DFF1(%SF2050, %FF512, N3, L2, P20);
POR8DFF2(%SF2051, %FF768, N4, L3, P5);
POR8DFF1(%SF2052, %FF1024, N5, L4, P18);
POR8DFF2(%SF2053, %FF1280, N6, L5, P7);
%EndModel

;DELAYS FOR THE 1012C4 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS
;
%StartModel
%Manufacturer:NATIONAL
%Type:EC12C4
%PartNumber:NATL'PAL1012C4
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P1 ~P1 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P16 ~P16 P9 ~P9 P15 ~P15
     P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

LOR(%FF512, %FF544, %FF576, %FF608, %FF640, %FF672, %FF704, %FF736; L1);
LOR(%FF768, %FF800, %FF832, %FF864, %FF896, %FF928, %FF960, %FF992; L2);
LOR(%FF1024, %FF1056, %FF1088, %FF1120, %FF1152, %FF1184, %FF1216, %FF1248; L3);
LOR(%FF1280, %FF1312, %FF1344, %FF1376, %FF1408, %FF1440, %FF1472, %FF1504; L4);
SET(RLOW);
BUF(L1;P20;40,40,40,40);
BUF(L2;P5;40,40,40,40);
BUF(L3;P18;40,40,40,40);
BUF(L4;P7;40,40,40,40);
INV(L1;P21;40,40,40,40);
INV(L2;P4;40,40,40,40);
INV(L3;P17;40,40,40,40);
INV(L4;P8;40,40,40,40);
%EndModel

;THE NATIONAL 16LD4 IS DIFFERENT THEN THE GENERIC 16LD4; THE FUSE AT THE
;XOR INPUT IS ATTACHED TO VCC RATHER THAN GND AS IN THE GENERIC.
;
;DELAYS FOR THE 1016LD4 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS.
;
%StartModel
%Manufacturer:NATIONAL
%Type:EC16LD4
%PartNumber:NATL'PAL1016LD4
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N2 ~N2 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 N1 ~N1 N4 ~N4 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N3 ~N3 *

%MACRO POR8(XorFuse:%SF, InFuse:%FF, OutPin:%TEXT);
 %IF %XorFuse=0 %THEN
  OR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
      %InFuse+192, %InFuse+224; OutPin; 60,60,60,60);
 %ELSE
  NOR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 60,60,60,60);
 %END;
%MACEND;

%MACRO POR8LATCH1(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,L2,ONE,L1;NodeInp;25,25,25,25,50,0,40,45,45,40,25,25,25,25,50,0,40,45,45,40);
 AND(NodeInp,L4;OutPin;10,10,10,10);
%MACEND;

%MACRO POR8LATCH2(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,L3,ONE,L1;NodeInp;25,25,25,25,50,0,40,45,45,40,25,25,25,25,50,0,40,45,45,40);
 AND(NodeInp,L4;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
LINV(P16;L2);
LINV(P9;L3);
LINV(P13;L4);
SET(RLOW);
POR8(%SF2048, %FF00, P21);
POR8(%SF2049, %FF256, P4);
POR8LATCH1(%SF2050, %FF512, N1, L5, P20);
POR8LATCH2(%SF2051, %FF768, N2, L6, P5);
POR8LATCH1(%SF2052, %FF1024, N3, L7, P18);
POR8LATCH2(%SF2053, %FF1280, N4, L8, P7);
POR8(%SF2054, %FF1536, P17);
POR8(%SF2055, %FF1792, P8);
%EndModel

;DELAYS FOR THE 1016LD8 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS.
;
%StartModel
%Manufacturer:National
%Type:EC16LD8N
%PartNumber:NATL'PAL1016LD8
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N4 ~N4 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 N1 ~N1 N2 ~N2 N7 ~N7
     N8 ~N8 N3 ~N3 N6 ~N6 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N5 ~N5 *

%MACRO POR8LATCH1(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,P16,ONE,L1;NodeInp;25,25,25,25,50,0,40,45,45,40,25,25,25,25,50,0,40,45,45,40);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

%MACRO POR8LATCH2(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,P9,ONE,L1;NodeInp;25,25,25,25,50,0,40,45,45,40,25,25,25,25,50,0,40,45,45,40);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
LINV(P13;L2);
SET(RLOW);
POR8LATCH1(%SF2048, %FF00, N1, L3, P21);
POR8LATCH2(%SF2049, %FF256, N2, L4, P4);
POR8LATCH1(%SF2050, %FF512, N3, L5, P20);
POR8LATCH2(%SF2051, %FF768, N4, L6, P5);
POR8LATCH1(%SF2052, %FF1024, N5, L7, P18);
POR8LATCH2(%SF2053, %FF1280, N6, L8, P7);
POR8LATCH1(%SF2054, %FF1536, N7, L9, P17);
POR8LATCH2(%SF2055, %FF1792, N8, L10, P8);
%EndModel

;DELAYS FOR THE 1016LM4A ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS
;
%StartModel
%Manufacturer:NATIONAL
%Type:EC16LM4
%PartNumber:NATL'PAL1016LM4A
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P5 ~P5 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 P20 ~P20 P7 ~P7 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 P18 ~P18 *

%MACRO POR8LATCH1(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,L2,ONE,L1;NodeInp;10,10,10,10,30,0,20,25,25,20,10,10,10,10,30,0,20,25,25,20);
 BUF(NodeInp;OutPin;10,10,10,10);
%MACEND;

%MACRO POR8LATCH2(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,L3,ONE,L1;NodeInp;10,10,10,10,30,0,20,25,25,20,10,10,10,10,30,0,20,25,25,20);
 BUF(NodeInp;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
LNOR(P16,P13;L2);
LNOR(P9,P13;L3);
SET(RLOW);
POR8LATCH1(%SF2050, %FF512, N1, L4, P20);
POR8LATCH2(%SF2051, %FF768, N2, L5, P5);
POR8LATCH1(%SF2052, %FF1024, N3, L6, P18);
POR8LATCH2(%SF2053, %FF1280, N4, L7, P7);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
;DELAYS FOR THE 1016P4A ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS
;
%StartModel
%Manufacturer:National
%Type:EC16P4
%PartNumber:NATL'PAL1016P4A
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P1 ~P1 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 P16 ~P16 P9 ~P9 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

%MACRO POR(InFuse:%FF, XorFuse:%SF, OutPin:%TEXT);
 %IF %XorFuse=0 %THEN
  NOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224; OutPin;1,1,1,1);
 %ELSE
  OR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224; OutPin;1,1,1,1);
 %End;
%MACEND;

SET(RLOW);
POR(%FF512, %SF2050, P20);
POR(%FF768, %SF2051, P5);
POR(%FF1024, %SF2052, P18);
POR(%FF1280, %SF2053, P7);
%EndModel

;Taken from 1989 National Programmable Logic Devices.
;DELAYS FOR THE 1016P8 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS
;
%StartModel
%Manufacturer:National
%Type:EC16P8
%PartNumber:NATL'PAL1016P8
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P1 ~P1 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 P16 ~P16 P9 ~P9 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 P13 ~P13 *

%MACRO POR(InFuse:%FF, XorFuse:%SF, OutPin:%TEXT);
 %IF %XorFuse=0 %THEN
  NOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224; OutPin;1,1,1,1);
 %ELSE
  OR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224; OutPin;1,1,1,1);
 %END;
%MACEND;

SET(RLOW);
POR(%FF00, %SF2048, P21);
POR(%FF256, %SF2049, P4);
POR(%FF512, %SF2050, P20);
POR(%FF768, %SF2051, P5);
POR(%FF1024, %SF2052, P18);
POR(%FF1280, %SF2053, P7);
POR(%FF1536, %SF2054, P17);
POR(%FF1792, %SF2055, P8);
%EndModel

;DELAYS FOR THE 1016RC4 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS.
;REMOVAL TIME WAS NOT GIVEN; USED 0 ns.
;
%StartModel
%Manufacturer:National
%Type:EC16RC4N
%PartNumber:NATL'PAL1016RC4
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N3 ~N3 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4  P17 ~P17 
     P8 ~P8 N2 ~N2 N5 ~N5 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N4 ~N4 *

%MACRO POR8(XorFuse:%SF, InFuse:%FF, OutPin:%TEXT);
 %IF %XorFuse=0 %THEN
  NOR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
      %InFuse+192, %InFuse+224; OutPin; 60,60,60,60);
 %ELSE
  OR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 60,60,60,60);
 %END;
%MACEND;

%MACRO POR8DFF(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,N1,L1;NodeInp;25,25,50,0,40,40,45,45,40,0,25,25,50,0,40,40,45,45,40,0);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
LINV(P13;L2);
OR(P9,P16;N1;0,0,0,0);
SET(RLOW);
POR8(%SF2048, %FF00, P21);
POR8(%SF2049, %FF256, P4);
POR8DFF(%SF2050, %FF512, N2, L3, P20);
POR8DFF(%SF2051, %FF768, N3, L4, P5);
POR8DFF(%SF2052, %FF1024, N4, L5, P18);
POR8DFF(%SF2053, %FF1280, N5, L6, P7);
POR8(%SF2054, %FF1536, P17);
POR8(%SF2055, %FF1792, P8);
%EndModel

;DELAYS FOR THE 1016RC8 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS.
;REMOVAL TIME WAS NOT GIVEN; USED 0 ns.
;
%StartModel
%Manufacturer:NATIONAL
%Type:EC16RC8N
%PartNumber:NATL'PAL1016RC8
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N5 ~N5 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 N2 ~N2 N3 ~N3 N8 ~N8 
     N9 ~N9 N4 ~N4 N7 ~N7 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N6 ~N6 *

%MACRO POR8DFF(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,N1,L1;NodeInp;25,25,50,0,40,40,45,45,40,0,25,25,50,0,40,40,45,45,40,0);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
LINV(P13;L2);
OR(P9,P16;N1;0,0,0,0);
SET(RLOW);
POR8DFF(%SF2048, %FF00, N2, L3, P21);
POR8DFF(%SF2049, %FF256, N3, L4, P4);
POR8DFF(%SF2050, %FF512, N4, L5, P20);
POR8DFF(%SF2051, %FF768, N5, L6, P5);
POR8DFF(%SF2052, %FF1024, N6, L7, P18);
POR8DFF(%SF2053, %FF1280, N7, L8, P7);
POR8DFF(%SF2054, %FF1536, N8, L9, P17);
POR8DFF(%SF2055, %FF1792, N9, L10, P8);
%EndModel

;DELAYS FOR THE 1016RD4 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS.
;REMOVAL TIME WAS NOT GIVEN; USED 0 ns.
;
%StartModel
%Manufacturer:NATIONAL
%Type:EC16RD4N
%PartNumber:NATL'PAL1016RD4
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N2 ~N2 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 N1 ~N1 N4 ~N4 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N3 ~N3 *

%MACRO POR8(XorFuse:%SF, InFuse:%FF, OutPin:%TEXT);
 %IF %XorFuse=0 %THEN
  NOR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
      %InFuse+192, %InFuse+224; OutPin; 60,60,60,60);
 %ELSE
  OR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 60,60,60,60);
 %END;
%MACEND;

%MACRO POR8DFF1(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,P16,L1;NodeInp;25,25,50,0,40,40,45,45,40,0,25,25,50,0,40,40,45,45,40,0);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

%MACRO POR8DFF2(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,P9,L1;NodeInp;25,25,50,0,40,40,45,45,40,0,25,25,50,0,40,40,45,45,40,0);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
LINV(P13;L2);
SET(RLOW);
POR8(%SF2048, %FF00, P21);
POR8(%SF2049, %FF256, P4);
POR8DFF1(%SF2050, %FF512, N1, L3, P20);
POR8DFF2(%SF2051, %FF768, N2, L4, P5);
POR8DFF1(%SF2052, %FF1024, N3, L5, P18);
POR8DFF2(%SF2053, %FF1280, N4, L6, P7);
POR8(%SF2054, %FF1536, P17);
POR8(%SF2055, %FF1792, P8);
%EndModel

;DELAYS FOR THE 1016RD8 ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS.
;REMOVAL TIME WAS NOT GIVEN; USED 0 ns.
;
%StartModel
%Manufacturer:NATIONAL
%Type:EC16RD8N
%PartNumber:NATL'PAL1016RD8
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N4 ~N4 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 N1 ~N1 N2 ~N2 N7 ~N7
     N8 ~N8 N3 ~N3 N6 ~N6 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N5 ~N5 *

%MACRO POR8DFF1(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,P16,L1;NodeInp;25,25,50,0,40,40,45,45,40,0,25,25,50,0,40,40,45,45,40,0);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

%MACRO POR8DFF2(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,P9,L1;NodeInp;25,25,50,0,40,40,45,45,40,0,25,25,50,0,40,40,45,45,40,0);
 AND(NodeInp,L2;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
LINV(P13;L2);

SET(RLOW);
POR8DFF1(%SF2048, %FF00, N1, L3, P21);
POR8DFF2(%SF2049, %FF256, N2, L4, P4);
POR8DFF1(%SF2050, %FF512, N3, L5, P20);
POR8DFF2(%SF2051, %FF768, N4, L6, P5);
POR8DFF1(%SF2052, %FF1024, N5, L7, P18);
POR8DFF2(%SF2053, %FF1280, N6, L8, P7);
POR8DFF1(%SF2054, %FF1536, N7, L9, P17);
POR8DFF2(%SF2055, %FF1792, N8, L10, P8);
%EndModel

;DELAYS FOR THE 1016RM4A ARE PRELIMINARY; MAX VALUES WERE USED FOR BOTH SETS
;OF DELAYS
;REMOVAL TIME WAS NOT GIVEN; USED 0 ns.
;
%StartModel
%Manufacturer:NATIONAL
%Type:EC16RM4
%PartNumber:NATL'PAL1016RM4A
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P5 ~P5 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 P20 ~P20 P7 ~P7 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 P18 ~P18 *

%MACRO POR8DFF1(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,N1,L1;NodeInp;10,10,30,0,20,20,25,25,20,0,10,10,30,0,20,20,25,25,20,0);
 BUF(NodeInp;OutPin;10,10,10,10);
%MACEND;

%MACRO POR8DFF2(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,N2,L1;NodeInp;10,10,30,0,20,20,25,25,20,0,10,10,30,0,20,20,25,25,20,0););
 BUF(NodeInp;OutPin;10,10,10,10);
%MACEND;

LINV(P1;L1);
OR(P16,P13;N1;0,0,0,0);
OR(P9,P13;N2;0,0,0,0);
SET(RLOW);
POR8DFF1(%SF2050, %FF512, N3, L2, P20);
POR8DFF2(%SF2051, %FF768, N4, L3, P5);
POR8DFF1(%SF2052, %FF1024, N5, L4, P18);
POR8DFF2(%SF2053, %FF1280, N6, L5, P7);
%EndModel
