(***************************************************************************)
(*                                                                         *)
(*                         Copyright (C) 1987-1990                         *)
(*                      by Gogesch Micro Systems, INC.                     *)
(*                                                                         *)
(*                           All rights reserved.                          *)
(*                                                                         *)
(***************************************************************************)

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:16R4
%PartNumber:UDI16R4
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 P18 ~P18 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 P13 ~P13 P9 ~P9 P12 ~P12 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 1,1,1,1);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 1,1,1,1);
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

LINV(P11;L1);
NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR7ENABLE(%SF256, %FF256, P18, N2);
NOR8DFF(%FF512, N3, L2, P17);
NOR8DFF(%FF768, N4, L3, P16);
NOR8DFF(%FF1024, N5, L4, P15);
NOR8DFF(%FF1280, N6, L5, P14);
NOR7ENABLE(%SF1536, %FF1536, P13, N7);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:16R6
%PartNumber:UDI16R6
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 P12 ~P12 *

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 1,1,1,1);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 1,1,1,1);
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

LINV(P11;L1);
NOR7ENABLE(%SF00, %FF00, P19, N1);
NOR8DFF(%FF256, N2, L2, P18);
NOR8DFF(%FF512, N3, L3, P17);
NOR8DFF(%FF768, N4, L4, P16);
NOR8DFF(%FF1024, N5, L5, P15);
NOR8DFF(%FF1280, N6, L6, P14);
NOR8DFF(%FF1536, N7, L7, P13);
NOR7ENABLE(%SF1792, %FF1792, P12, N8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:16R8
%PartNumber:UDI16R8
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

LINV(P11;L1);
NOR8DFF(%FF00, N1, L2, P19);
NOR8DFF(%FF256, N2, L3, P18);
NOR8DFF(%FF512, N3, L4, P17);
NOR8DFF(%FF768, N4, L5, P16);
NOR8DFF(%FF1024, N5, L6, P15);
NOR8DFF(%FF1280, N6, L7, P14);
NOR8DFF(%FF1536, N7, L8, P13);
NOR8DFF(%FF1792, N8, L9, P12);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:16RA8
%PartNumber:UDI16RA8
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 P18 ~P18 P4 ~P4 P17 ~P17 P5 ~P5 P16 ~P16
           P6 ~P6 P15 ~P15 P7 ~P7 P14 ~P14 P8 ~P8 P13 ~P13 P9 ~P9 P12 ~P12 *


%MACRO LOADMac(IO:%TEXT, IOBar:%TEXT, InFuse:%FF, TLNode1:%TEXT,
                   TLNode2:%TEXT, ResetLoadInput:%TEXT, TLNode3:%TEXT,
        	   SetLoadInput:%TEXT, XorFuse:%SF, TLNode:%TEXT, PClock:%TEXT,
                   RegOut:%TEXT, TLSet:%TEXT);

  LINV(IO; IOBar);
  LAND(P1, %InFuse+64; TLNode1);
  LAND(L1, IOBar; TLNode2);
  LNOR(TLNode1, TLNode2, IPH; ResetLoadInput);
  LINV(%InFuse+96; TLSet);
  LAND(P1, TLSet; TLNode3);
  LOR(TLNode2, TLNode3; SetLoadInput);

 %IF %XorFuse=1 %THEN
  LOR(%InFuse+128, %InFuse+160, %InFuse+192, %InFuse+224; TLNode);
 %ELSE
  LNOR(%InFuse+128, %InFuse+160, %InFuse+192, %InFuse+224; TLNode);
 %END;
  AND(%InFuse+32; PClock; 0,0,0,0);
  DQFFPC(TLNode, PClock, SetLoadInput, ResetLoadInput; RegOut; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
%MACEND;


%MACRO OUTPUTMac(InFuse:%FF, TLNode:%TEXT, RegOutput:%TEXT, TsbEnable:%TEXT,
                 IO:%TEXT, EnableFuse:%SF, SETFuse:%SF, RESETFuse:%SF);

%IF %SETFuse..%SETFuse+31 = 1 %THEN
 %IF %RESETFuse..%RESETFuse+31 = 1 %THEN

   %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
     ITSB(TLNode, L2; IO; 1,1,1,1,1,1,1,1);
   %ELSE
     LAND(%InFuse, L2; Tsbnable);
     ITSB(TLNode, Tsbnable; IO; 1,1,1,1,1,1,1,1);
   %END;

 %ELSE

   %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
     ITSB(RegOutput, L2; IO; 1,1,1,1,1,1,1,1);
   %ELSE
     LAND(%InFuse, L2; Tsbnable);
     ITSB(RegOutput, Tsbnable; IO; 1,1,1,1,1,1,1,1);
   %END;
 %END;
%ELSE
 %IF %RESETFuse..%RESETFuse+31 = 1 %THEN

   %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
     ITSB(RegOutput, L2; IO; 1,1,1,1,1,1,1,1);
   %ELSE
     LAND(%InFuse, L2; TsbEnable);
     ITSB(RegOutput, TsbEnable; IO; 1,1,1,1,1,1,1,1);
   %END;

 %ELSE

   %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
     ITSB(RegOutput, L2; IO; 1,1,1,1,1,1,1,1);
   %ELSE
     LAND(%InFuse, L2; TsbEnable);
     ITSB(RegOutput, TsbEnable; IO; 1,1,1,1,1,1,1,1);
   %END;
 %END;
%END;
%MACEND;

LINV(P1; L1);
LINV(P11; L2);

LOADMac(P19, L3, %FF00, L4, L5, L6, L7, L8, %SF2048, L9, N1, N2, L59);
LOADMac(P18, L10, %FF256, L11, L12, L13, L14, L15, %SF2049, L16, N3, N4, L60);
LOADMac(P17, L17, %FF512, L18, L19 ,L20, L21, L22, %SF2050, L23, N5, N6, L61);
LOADMac(P16, L24, %FF768, L25, L26, L27, L28, L29, %SF2051, L30, N7, N8, L62);
LOADMac(P15, L31, %FF1024, L32, L33, L34, L35, L36, %SF2052, L37, N9, N10, L63);
LOADMac(P14, L38, %FF1280, L39, L40, L41, L42, L43, %SF2053, L44, N11, N12, L64);
LOADMac(P13, L45, %FF1536, L46, L47, L48, L49, L50, %SF2054, L51, N13, N14, L65);
LOADMac(P12, L52, %FF1792, L53, L54, L55, L56, L57, %SF2055, L58, N15, N16, L66);

OUTPUTMac(%FF00, L9, N2, L67, P19, %SF00, %SF96, %SF64);
OUTPUTMac(%FF256, L16, N4, L68, P18, %SF256, %SF352, %SF320);
OUTPUTMac(%FF512, L23, N6, L69, P17, %SF512, %SF608, %SF576);
OUTPUTMac(%FF768, L30, N8, L70, P16, %SF768, %SF864, %SF832);
OUTPUTMac(%FF1024, L37, N10, L71, P15, %SF1024, %SF1120, %SF1088);
OUTPUTMac(%FF1280, L44, N12, L72, P14, %SF1280, %SF1376, %SF1344);
OUTPUTMac(%FF1536, L51, N14, L73, P13, %SF1536, %SF1632, %SF1600);
OUTPUTMac(%FF1792, L58, N16, L74, P12, %SF1792, %SF1888, %SF1856);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:16RP4
%PartNumber:UDI16RP4
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 P18 ~P18 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 P13 ~P13 P9 ~P9 P12 ~P12 *

%MACRO POR7ENABLE(EnableFuse:%SF, XorFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
      %InFuse+192, %InFuse+224; OutPin; 1,1,1,1);
  %ELSE
   OR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 1,1,1,1);
  %END;
 %ELSE
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
      %InFuse+192, %InFuse+224; TNode; 1,1,1,1);
  %ELSE
   OR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 1,1,1,1);
  %END;
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO POR8DFF(InFuse:%FF, XorFuse:%SF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

LINV(P11;L1);
POR7ENABLE(%SF00, %SF2048, %FF00, P19, N1);
POR7ENABLE(%SF256, %SF2049, %FF256, P18, N2);
POR8DFF(%FF512, %SF2050, N3, L2, P17);
POR8DFF(%FF768, %SF2051, N4, L3, P16);
POR8DFF(%FF1024, %SF2052, N5, L4, P15);
POR8DFF(%FF1280, %SF2053, N6, L5, P14);
POR7ENABLE(%SF1536, %SF2054, %FF1536, P13, N7);
POR7ENABLE(%SF1792, %SF2055, %FF1792, P12, N8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:16RP6
%PartNumber:UDI16RP6
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 P12 ~P12 *

%MACRO POR7ENABLE(EnableFuse:%SF, XorFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
      %InFuse+192, %InFuse+224; OutPin; 1,1,1,1);
  %ELSE
   OR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 1,1,1,1);
  %END;
 %ELSE
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
      %InFuse+192, %InFuse+224; TNode; 1,1,1,1);
  %ELSE
   OR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 1,1,1,1);
  %END;
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO POR8DFF(InFuse:%FF, XorFuse:%SF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

LINV(P11;L1);
POR7ENABLE(%SF00, %SF2048, %FF00, P19, N1);
POR8DFF(%FF256, %SF2049, N2, L2, P18);
POR8DFF(%FF512, %SF2050, N3, L3, P17);
POR8DFF(%FF768, %SF2051, N4, L4, P16);
POR8DFF(%FF1024, %SF2052, N5, L5, P15);
POR8DFF(%FF1280, %SF2053, N6, L6, P14);
POR8DFF(%FF1536, %SF2054, N7, L7, P13);
POR7ENABLE(%SF1792, %SF2055, %FF1792, P12, N8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:16RP8
%PartNumber:UDI16RP8
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4
     P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 *

%MACRO POR8DFF(InFuse:%FF, XorFuse:%SF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

LINV(P11; L1);
POR8DFF(%FF00, %SF2048, N1, L2, P19);
POR8DFF(%FF256, %SF2049, N2, L3, P18);
POR8DFF(%FF512, %SF2050, N3, L4, P17);
POR8DFF(%FF768, %SF2051, N4, L5, P16);
POR8DFF(%FF1024, %SF2052, N5, L6, P15);
POR8DFF(%FF1280, %SF2053, N6, L7, P14);
POR8DFF(%FF1536, %SF2054, N7, L8, P13);
POR8DFF(%FF1792, %SF2055, N8, L9, P12);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:16V8
%PartNumber:UDI16V8
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4 P6 ~P6
     N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 *

%MACRO V8MAC(S0:%SF, XorFuse:%SF, FeedBack:%TEXT, LorOutput:%TEXT, InFuse:%FF,
             OutPin:%TEXT, TNode:%TEXT, EnableFuse:%SF, TLNode:%TEXT,
	     TSNode:%TEXT, NextPin:%TEXT, PrevPin:%TEXT);

 %CASE %SF2192,%SF2193,%S0
   2:
     LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %XorFuse=0 %THEN
      LINV(LorOutput;TLNode);
      DQFFC(TLNode, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     %ELSE
      DQFFC(LorOutput, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     %END;
     TSB(TNode, L17; OutPin; 1,1,1,1,1,1,1,1);
     BUF(TNode; FeedBack; 1,1,1,1);
  |3:
     LOR(%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 1,1,1,1);
      %ELSE
       BUF(LorOutput; OutPin; 1,1,1,1);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 1,1,1,1);
      %ELSE
       BUF(LorOutput; TNode; 1,1,1,1);
      %END;
      TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
     %END;
     BUF(OutPin; FeedBack; 1,1,1,1);
  |4:
     LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %XorFuse = 0 %THEN
      INV(LorOutput; OutPin; 1,1,1,1);
     %ELSE
      BUF(LorOutput; OutPin; 1,1,1,1);
     %END;
     BUF(ZERO; FeedBack; 1,1,1,1);
  |5:
     TSB(TSNode, ZERO; OutPin; 1,1,1,1,1,1,1,1);
     BUF(NextPin; FeedBack; 1,1,1,1);
  |7:
     LOR(%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 1,1,1,1);
      %ELSE
       BUF(LorOutput; OutPin; 1,1,1,1);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 1,1,1,1);
      %ELSE
       BUF(LorOutput; TNode; 1,1,1,1);
      %END;
      TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
     %END;
     BUF(PrevPin; FeedBack; 1,1,1,1);
 %END;
%MACEND;

LINV(P11;L17);

V8MAC(%SF2120, %SF2048, N1, L1, %FF00, P19, N9, %SF00, L9, N17, P1, P1);
V8MAC(%SF2121, %SF2049, N2, L2, %FF256, P18, N10, %SF256, L10, N18, P19, P18);
V8MAC(%SF2122, %SF2050, N3, L3, %FF512, P17, N11, %SF512, L11, N19, P18, P17);
V8MAC(%SF2123, %SF2051, N4, L4, %FF768, P16, N12, %SF768, L12, N20, P17, P16);
V8MAC(%SF2124, %SF2052, N5, L5, %FF1024, P15, N13, %SF1024, L13, N21, P14, P15);
V8MAC(%SF2125, %SF2053, N6, L6, %FF1280, P14, N14, %SF1280, L14, N22, P13, P14);
V8MAC(%SF2126, %SF2054, N7, L7, %FF1536, P13, N15, %SF1536, L15, N23, P12, P13);
V8MAC(%SF2127, %SF2055, N8, L8, %FF1792, P12, N16, %SF1792, L16, N24, P11, P11);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:16V8A
%PartNumber:UDI16V8A
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4 P6 ~P6
     N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 *

%MACRO V8MAC(S0:%SF, XorFuse:%SF, FeedBack:%TEXT, LorOutput:%TEXT, InFuse:%FF,
             OutPin:%TEXT, TNode:%TEXT, EnableFuse:%SF, TLNode:%TEXT,
	     TSNode:%TEXT, NextPin:%TEXT, PrevPin:%TEXT);

 %CASE %SF2192,%SF2193,%S0
   2:
     LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %XorFuse=0 %THEN
      LINV(LorOutput;TLNode);
      DQFFC(TLNode, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     %ELSE
      DQFFC(LorOutput, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     %END;
     TSB(TNode, L17; OutPin; 1,1,1,1,1,1,1,1);
     BUF(TNode; FeedBack; 1,1,1,1);
  |3:
     LOR(%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 1,1,1,1);
      %ELSE
       BUF(LorOutput; OutPin; 1,1,1,1);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 1,1,1,1);
      %ELSE
       BUF(LorOutput; TNode; 1,1,1,1);
      %END;
      TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
     %END;
     BUF(OutPin; FeedBack; 1,1,1,1);
  |4:
     LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %XorFuse = 0 %THEN
      INV(LorOutput; OutPin; 1,1,1,1);
     %ELSE
      BUF(LorOutput; OutPin; 1,1,1,1);
     %END;
     BUF(NextPin; FeedBack; 1,1,1,1);
  |5:
     TSB(TSNode, ZERO; OutPin; 1,1,1,1,1,1,1,1);
     BUF(NextPin; FeedBack; 1,1,1,1);
  |7:
     LOR(%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 1,1,1,1);
      %ELSE
       BUF(LorOutput; OutPin; 1,1,1,1);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 1,1,1,1);
      %ELSE
       BUF(LorOutput; TNode; 1,1,1,1);
      %END;
      TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
     %END;
     BUF(PrevPin; FeedBack; 1,1,1,1);
 %END;
%MACEND;

LINV(P11;L17);

V8MAC(%SF2120, %SF2048, N1, L1, %FF00, P19, N9, %SF00, L9, N17, P1, P1);
V8MAC(%SF2121, %SF2049, N2, L2, %FF256, P18, N10, %SF256, L10, N18, P19, P18);
V8MAC(%SF2122, %SF2050, N3, L3, %FF512, P17, N11, %SF512, L11, N19, P18, P17);
V8MAC(%SF2123, %SF2051, N4, L4, %FF768, P16, N12, %SF768, L12, N20, P17, P16);
V8MAC(%SF2124, %SF2052, N5, L5, %FF1024, P15, N13, %SF1024, L13, N21, P14, P15);
V8MAC(%SF2125, %SF2053, N6, L6, %FF1280, P14, N14, %SF1280, L14, N22, P13, P14);
V8MAC(%SF2126, %SF2054, N7, L7, %FF1536, P13, N15, %SF1536, L15, N23, P12, P13);
V8MAC(%SF2127, %SF2055, N8, L8, %FF1792, P12, N16, %SF1792, L16, N24, P11, P11);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:16X4
%PartNumber:UDI16X4
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 P19 ~P19 P3 ~P3 P18 ~P18 N5 N6 N7 N8 N9 N10 N11 N12 N13 N14
           N15 N16 N17 N18 N19 N20 P8 ~P8 P13 ~P13  P9 ~P9 P12 ~P12 *

%MACRO INPUT(InPin:%TEXT, OutNode:%TEXT, OutLNode:%TEXT, OrInput:%TEXT,
             OrOutput1:%TEXT, OrOutput2:%TEXT, OrOutput3:%TEXT, OrOutput4:%TEXT);

  LINV(InPin; OutLNode);
  LINV(OutNode; OrInput);
  OR(InPin, OrInput; OrOutput1;0,0,0,0);
  OR(OutLNode, OrInput; OrOutput2;0,0,0,0);
  OR(InPin, OutNode; OrOutput3;0,0,0,0);
  OR(OutLNode, OutNode; OrOutput4;0,0,0,0);
%MACEND;

%MACRO NOR7ENABLE(EnableFuse:%SF,InFuse:%FF,OutPin:%TEXT,TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 1,1,1,1);
 %ELSE
  NOR(%InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; TNode; 1,1,1,1);
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO LXNOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode1:%TEXT, TLNode2:%TEXT,
               LXorNode:%TEXT, OutPin:%TEXT);
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96;TLNode1);
  LOR(%InFuse+128,%InFuse+160,%InFuse+192,%InFuse+224;TLNode2);
  LXNOR(TLNode1,TLNode2;LXorNode);
  DQFFC(LXorNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
  TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

LINV(P11;L1);
INPUT(P4, N1, L2, L3, N5, N6, N7, N8);
INPUT(P5, N2, L4, L5, N9, N10, N11, N12);
INPUT(P6, N3, L6, L7, N13, N14, N15, N16);
INPUT(P7, N4, L8, L9, N17, N18, N19, N20);
NOR7ENABLE(%SF00, %FF00, P19, N21);
NOR7ENABLE(%SF256, %FF256, P18, N22);
LXNOR8DFF(%FF512, N1, L10, L14, L18, P17);
LXNOR8DFF(%FF768, N2, L11, L15, L19, P16);
LXNOR8DFF(%FF1024, N3, L12, L16, L20, P15);
LXNOR8DFF(%FF1280, N4, L13, L17, L21, P14);
NOR7ENABLE(%SF1536, %FF1536, P13, N23);
NOR7ENABLE(%SF1792, %FF1792, P12, N24);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:16Z8
%PartNumber:UDI16Z8
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P3 ~P3 N1 ~N1 P4 ~P4 N2 ~N2 P5 ~P5 N3 ~N3 P6 ~P6 N4 ~N4 P7 ~P7
     N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 N7 ~N7 P10 ~P10 N8 ~N8 *

%MACRO Z8MAC(S0:%SF, XorFuse:%SF, FeedBack:%TEXT, LorOutput:%TEXT, InFuse:%FF,
             OutPin:%TEXT, TNode:%TEXT, EnableFuse:%SF, TLNode:%TEXT,
	     TSNode:%TEXT, NextPin:%TEXT, PrevPin:%TEXT);

 %CASE %SF2192,%SF2193,%S0
   2:
     LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %XorFuse=0 %THEN
      LINV(LorOutput;TLNode);
      DQFFC(TLNode, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     %ELSE
      DQFFC(LorOutput, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     %END;
     TSB(TNode, L17; OutPin; 1,1,1,1,1,1,1,1);
     BUF(TNode; FeedBack; 1,1,1,1);
  |3:
     LOR(%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 1,1,1,1);
      %ELSE
       BUF(LorOutput; OutPin; 1,1,1,1);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 1,1,1,1);
      %ELSE
       BUF(LorOutput; TNode; 1,1,1,1);
      %END;
      TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
     %END;
     BUF(OutPin; FeedBack; 1,1,1,1);
  |4:
     LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %XorFuse = 0 %THEN
      INV(LorOutput; OutPin; 1,1,1,1);
     %ELSE
      BUF(LorOutput; OutPin; 1,1,1,1);
     %END;
     BUF(ZERO; FeedBack; 1,1,1,1);
  |5:
     TSB(TSNode, ZERO; OutPin; 1,1,1,1,1,1,1,1);
     BUF(NextPin; FeedBack; 1,1,1,1);
  |7:
     LOR(%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 1,1,1,1);
      %ELSE
       BUF(LorOutput; OutPin; 1,1,1,1);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 1,1,1,1);
      %ELSE
       BUF(LorOutput; TNode; 1,1,1,1);
      %END;
      TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
     %END;
     BUF(PrevPin; FeedBack; 1,1,1,1);
 %END;
%MACEND;

LINV(P13;L17);

Z8MAC(%SF2120, %SF2048, N1, L1, %FF00, P22, N9, %SF00, L9, N17, P1, P1);
Z8MAC(%SF2121, %SF2049, N2, L2, %FF256, P21, N10, %SF256, L10, N18, P22, P21);
Z8MAC(%SF2122, %SF2050, N3, L3, %FF512, P20, N11, %SF512, L11, N19, P21, P20);
Z8MAC(%SF2123, %SF2051, N4, L4, %FF768, P19, N12, %SF768, L12, N20, P20, P19);
Z8MAC(%SF2124, %SF2052, N5, L5, %FF1024, P18, N13, %SF1024, L13, N21, P17, P18);
Z8MAC(%SF2125, %SF2053, N6, L6, %FF1280, P17, N14, %SF1280, L14, N22, P16, P17);
Z8MAC(%SF2126, %SF2054, N7, L7, %FF1536, P16, N15, %SF1536, L15, N23, P15, P16);
Z8MAC(%SF2127, %SF2055, N8, L8, %FF1792, P15, N16, %SF1792, L16, N24, P13, P13);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:16Z8A
%PartNumber:UDI16Z8A
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P3 ~P3 N1 ~N1 P4 ~P4 N2 ~N2 P5 ~P5 N3 ~N3 P6 ~P6 N4 ~N4 P7 ~P7
     N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 N7 ~N7 P10 ~P10 N8 ~N8 *

%MACRO Z8MAC(S0:%SF, XorFuse:%SF, FeedBack:%TEXT, LorOutput:%TEXT, InFuse:%FF,
             OutPin:%TEXT, TNode:%TEXT, EnableFuse:%SF, TLNode:%TEXT,
	     TSNode:%TEXT, NextPin:%TEXT, PrevPin:%TEXT);

 %CASE %SF2192,%SF2193,%S0
   2:
     LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %XorFuse=0 %THEN
      LINV(LorOutput;TLNode);
      DQFFC(TLNode, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     %ELSE
      DQFFC(LorOutput, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     %END;
     TSB(TNode, L17; OutPin; 1,1,1,1,1,1,1,1);
     BUF(TNode; FeedBack; 1,1,1,1);
  |3:
     LOR(%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 1,1,1,1);
      %ELSE
       BUF(LorOutput; OutPin; 1,1,1,1);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 1,1,1,1);
      %ELSE
       BUF(LorOutput; TNode; 1,1,1,1);
      %END;
      TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
     %END;
     BUF(OutPin; FeedBack; 1,1,1,1);
  |4:
     LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %XorFuse = 0 %THEN
      INV(LorOutput; OutPin; 1,1,1,1);
     %ELSE
      BUF(LorOutput; OutPin; 1,1,1,1);
     %END;
     BUF(NextPin; FeedBack; 1,1,1,1);
  |5:
     TSB(TSNode, ZERO; OutPin; 1,1,1,1,1,1,1,1);
     BUF(NextPin; FeedBack; 1,1,1,1);
  |7:
     LOR(%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
         %InFuse+192,%InFuse+224;LorOutput);
     %IF %EnableFuse..%EnableFuse+31 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 1,1,1,1);
      %ELSE
       BUF(LorOutput; OutPin; 1,1,1,1);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 1,1,1,1);
      %ELSE
       BUF(LorOutput; TNode; 1,1,1,1);
      %END;
      TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
     %END;
     BUF(PrevPin; FeedBack; 1,1,1,1);
 %END;
%MACEND;

LINV(P13;L17);

Z8MAC(%SF2120, %SF2048, N1, L1, %FF00, P22, N9, %SF00, L9, N17, P1, P1);
Z8MAC(%SF2121, %SF2049, N2, L2, %FF256, P21, N10, %SF256, L10, N18, P22, P21);
Z8MAC(%SF2122, %SF2050, N3, L3, %FF512, P20, N11, %SF512, L11, N19, P21, P20);
Z8MAC(%SF2123, %SF2051, N4, L4, %FF768, P19, N12, %SF768, L12, N20, P20, P19);
Z8MAC(%SF2124, %SF2052, N5, L5, %FF1024, P18, N13, %SF1024, L13, N21, P17, P18);
Z8MAC(%SF2125, %SF2053, N6, L6, %FF1280, P17, N14, %SF1280, L14, N22, P16, P17);
Z8MAC(%SF2126, %SF2054, N7, L7, %FF1536, P16, N15, %SF1536, L15, N23, P15, P16);
Z8MAC(%SF2127, %SF2055, N8, L8, %FF1792, P15, N16, %SF1792, L16, N24, P13, P13);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:18CV8
%PartNumber:UDI18CV8
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P1 ~P1 P11 ~P11 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5
     N4 ~N4 P6 ~P6 N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8*

%MACRO CV8MAC(InFuse:%FF, S0:%SF, LorOutput:%TEXT, TLNode:%TEXT, TNode:%TEXT,
       EnableFuse:%SF, TSBEnable:%FF, PolarityFuse:%SF, OutPin:%TEXT,
       FeedBack:%TEXT);

    LOR(%InFuse, %InFuse+36, %InFuse+72, %InFuse+108, %InFuse+144, %InFuse+180,
        %InFuse+216, %InFuse+252; LorOutput);
 %CASE %S0, %S0+1, %S0+2
   0:
     LOR(LorOutput, L1; TLNode);
     DQFFC(TLNode, P1, L2; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse.. %EnableFuse+35 = 1 %THEN
     %IF %PolarityFuse = 0 %THEN
      BUF(LorOutput;OutPin; 1,1,1,1);
     %ELSE
      INV(LorOutput; OutPin; 1,1,1,1);
     %END;
    %ELSE
     %IF %PolarityFuse = 0 %THEN
      TSB(LorOutput, TSBEnable; OutPin; 1,1,1,1,1,1,1,1);
     %ELSE
      ITSB(LorOutput, TSBEnable; OutPin; 1,1,1,1,1,1,1,1);
     %END;
    %END;
    BUF(TNode; FeedBack; 1,1,1,1);
  |2:
     %IF %EnableFuse..%EnableFuse+35 = 1 %THEN
      %IF %PolarityFuse = 0 %THEN
       BUF(LorOutput; OutPin; 1,1,1,1);
      %ELSE
       INV(LorOutput; OutPin; 1,1,1,1);
      %END;
     %ELSE
      %IF %PolarityFuse = 0 %THEN
       TSB(LorOutput, TSBEnable; OutPin; 1,1,1,1,1,1,1,1);
      %ELSE
       ITSB(LorOutput, TSBEnable; OutPin; 1,1,1,1,1,1,1,1);
      %END;
     %END;
     BUF(LorOutput; FeedBack; 1,1,1,1);
  |3:
    %IF %EnableFuse.. %EnableFuse+35 = 1 %THEN
     %IF %PolarityFuse = 0 %THEN
      BUF(LorOutput;OutPin; 1,1,1,1);
     %ELSE
      INV(LorOutput; OutPin; 1,1,1,1);
     %END;
    %ELSE
     %IF %PolarityFuse = 0 %THEN
      TSB(LorOutput, TSBEnable; OutPin; 1,1,1,1,1,1,1,1);
     %ELSE
      ITSB(LorOutput, TSBEnable; OutPin; 1,1,1,1,1,1,1,1);
     %END;
    %END;
    BUF(OutPin; FeedBack; 1,1,1,1);
  |4:
     LOR(LorOutput, L1; TLNode);
     DQFFC(TLNode, P1, L2; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse.. %EnableFuse+35 = 1 %THEN
     %IF %PolarityFuse = 0 %THEN
      BUF(TNode;OutPin; 1,1,1,1);
     %ELSE
      INV(TNode; OutPin; 1,1,1,1);
     %END;
    %ELSE
     %IF %PolarityFuse = 0 %THEN
      TSB(TNode, TSBEnable; OutPin; 1,1,1,1,1,1,1,1);
     %ELSE
      ITSB(TNode, TSBEnable; OutPin; 1,1,1,1,1,1,1,1);
     %END;
    %END;
    BUF(TNode; FeedBack; 1,1,1,1);
  |6:
     LOR(LorOutput, L1; TLNode);
     DQFFC(TLNode, P1, L2; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse.. %EnableFuse+35 = 1 %THEN
     %IF %PolarityFuse = 0 %THEN
      BUF(TNode;OutPin; 1,1,1,1);
     %ELSE
      INV(TNode; OutPin; 1,1,1,1);
     %END;
    %ELSE
     %IF %PolarityFuse = 0 %THEN
      TSB(TNode, TSBEnable; OutPin; 1,1,1,1,1,1,1,1);
     %ELSE
      ITSB(TNode, TSBEnable; OutPin; 1,1,1,1,1,1,1,1);
     %END;
    %END;
    BUF(LorOutput; FeedBack; 1,1,1,1);
  |7:
     LOR(LorOutput, L1; TLNode);
     DQFFC(TLNode, P1, L2; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse.. %EnableFuse+35 = 1 %THEN
     %IF %PolarityFuse = 0 %THEN
      BUF(TNode;OutPin; 1,1,1,1);
     %ELSE
      INV(TNode; OutPin; 1,1,1,1);
     %END;
    %ELSE
     %IF %PolarityFuse = 0 %THEN
      TSB(TNode, TSBEnable; OutPin; 1,1,1,1,1,1,1,1);
     %ELSE
      ITSB(TNode, TSBEnable; OutPin; 1,1,1,1,1,1,1,1);
     %END;
    %END;
    BUF(OutPin; FeedBack; 1,1,1,1);
 %END;
%MACEND;

LAND(%FF2592; L1);
LNOR(%FF2628, IPH; L2);

CV8MAC(%FF00, %SF2665, L3, L4, N9, %SF2304, %FF2304, %SF2664, P19, N1);
CV8MAC(%FF288, %SF2669, L5, L6, N10, %SF2340, %FF2340, %SF2668, P18, N2);
CV8MAC(%FF576, %SF2673, L7, L8, N11, %SF2376, %FF2376, %SF2672, P17, N3);
CV8MAC(%FF864, %SF2677, L9, L10, N12, %SF2412, %FF2412, %SF2676, P16, N4);
CV8MAC(%FF1152, %SF2681, L11, L12, N13, %SF2448, %FF2448, %SF2680, P15, N5);
CV8MAC(%FF1440, %SF2685, L13, L14, N14, %SF2484, %FF2484, %SF2684, P14, N6);
CV8MAC(%FF1728, %SF2689, L15, L16, N15, %SF2520, %FF2520, %SF2688, P13, N7);
CV8MAC(%FF2016, %SF2693, L17, L18, N16, %SF2556, %FF2556, %SF2692, P12, N8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:18U8
%PartNumber:UDI18U8
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4 P6 ~P6
     N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 P1 ~P1 P11 ~P11 *


%MACRO 18U8(S2:%SF, RegIn:%TEXT, Output:%TEXT, FeedBack:%TEXT,
            InFuse:%FF, OutPin:%TEXT, EnableFuse:%SF, TNode:%TEXT);

  %IF %S2=0 %THEN
    LOR(%InFuse+36, %InFuse+72, %InFuse+108, %InFuse+144, %InFuse+180,
        %InFuse+216, %InFuse+252, %InFuse+288, L2; RegIn);
    DQFFC(RegIn, P1, L3; Output; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    INV(Output; FeedBack; 1,1,1,1);
  %ELSE
    OR(%InFuse+36, %InFuse+72, %InFuse+108, %InFuse+144, %InFuse+180,
       %InFuse+216, %InFuse+252, %InFuse+288; Output; 1,1,1,1);
    BUF(OutPin; FeedBack; 1,1,1,1);
  %END;

  %CASE %S2+8, %S2+16

  0:
    %IF %EnableFuse..%EnableFuse+35 = 1 %THEN
       INV(Output; OutPin; 1,1,1,1);
    %ELSE
       INV(Output; TNode; 1,1,1,1);
       TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
 |1:
       INV(Output; TNode; 1,1,1,1);
       TSB(TNode, L4; OutPin; 1,1,1,1,1,1,1,1);
 |2:
     %IF %EnableFuse..%EnableFuse+35 = 1 %THEN
       BUF(Output; OutPin; 1,1,1,1);
     %ELSE
       BUF(Output; TNode; 1,1,1,1);
       TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
     %END;
 |3:
       BUF(Output; TNode; 1,1,1,1);
       TSB(TNode, L4; OutPin; 1,1,1,1,1,1,1,1);
  %END;
%MACEND;


LAND(%FF2592; L1);
LAND(%FF2628; L2);
LNOR(L1, IPH; L3);
LINV(P11; L4);

18U8(%SF2664, L5, N9, N1, %FF00, P19, %SF00, N17);
18U8(%SF2665, L6, N10, N2, %FF324, P18, %SF324, N18);
18U8(%SF2666, L7, N11, N3, %FF648, P17, %SF648, N19);
18U8(%SF2667, L8, N12, N4, %FF972, P16, %SF972, N20);
18U8(%SF2668, L9, N13, N5, %FF1296, P15, %SF1296, N21);
18U8(%SF2669, L10, N14, N6, %FF1620, P14, %SF1620, N22);
18U8(%SF2670, L11, N15, N7, %FF1944, P13, %SF1944, N23);
18U8(%SF2671, L12, N16, N8, %FF2268, P12, %SF2268, N24);

%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:18V10
%PartNumber:UDI18V10
%LastNode ? ?
%NumPins: 20
%FDF AND 0 P1 ~P1 N1 ~N1 P2 ~P2 N2 ~N2 P3 ~P3 N3 ~N3 P4 ~P4 N4 ~N4 P5 ~P5
         N5 ~N5 P6 ~P6 N6 ~N6 P7 ~P7 N7 ~N7 P8 ~P8 N8 ~N8 N9 ~N9 N10 ~N10 *

%MACRO LOR10(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+36,%InFuse+72,%InFuse+108,%InFuse+144,%InFuse+180,
     %InFuse+216,%InFuse+252,%InFuse+288,%InFuse+324; OutLNode);
%MACEND;

%MACRO LOR8(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+36,%InFuse+72,%InFuse+108,%InFuse+144,%InFuse+180,
     %InFuse+216,%InFuse+252; OutLNode);
%MACEND;

%MACRO V10Mac(S1:%SF, S0:%SF, FeedBack:%TEXT, OrOutput:%TEXT, TNode:%TEXT,
              OutPin:%TEXT, InFuse:%FF, EnableFuse:%SF, TLNode:%TEXT);
 %CASE %S1,%S0
   0:
     LOR(OrOutput, L21; TLNode);
     DQFFC(TLNode, P1, L22; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+35 = 1 %THEN
     INV(TNode; OutPin; 0,0,0,0);
    %ELSE
     ITSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    INV(TNode; FeedBack; 0,0,0,0);
  |1:
     LOR(OrOutput, L21; TLNode);
     DQFFC(TLNode, P1, L22; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+35 = 1 %THEN
     BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    INV(TNode; FeedBack; 0,0,0,0);
  |2:
    %IF %EnableFuse..%EnableFuse+35 = 1 %THEN
     INV(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     INV(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(OutPin; FeedBack; 0,0,0,0);
  |3:
    %IF %EnableFuse..%EnableFuse+35 = 1 %THEN
     BUF(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     BUF(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(OutPin; FeedBack; 0,0,0,0);
  %END;
%MACEND;

LAND(%FF3420; L21);
LNOR(%FF00, IPH; L22);

LOR8(%FF72, L1);
LOR8(%FF396, L2);
LOR8(%FF720, L3);
LOR8(%FF1044, L4);
LOR10(%FF1368, L5);
LOR10(%FF1764, L6);
LOR8(%FF2160, L7);
LOR8(%FF2484, L8);
LOR8(%FF2808, L9);
LOR8(%FF3132, L10);

V10Mac(%SF3457, %SF3456, N1, L1, N11, P19, %FF36, %SF36, L11);
V10Mac(%SF3459, %SF3458, N2, L2, N12, P18, %FF360, %SF360, L12);
V10Mac(%SF3461, %SF3460, N3, L3, N13, P17, %FF684, %SF684, L13);
V10Mac(%SF3463, %SF3462, N4, L4, N14, P16, %FF1008, %SF1008, L14);
V10Mac(%SF3465, %SF3464, N5, L5, N15, P15, %FF1332, %SF1332, L15);
V10Mac(%SF3467, %SF3466, N6, L6, N16, P14, %FF1728, %SF1728, L16);
V10Mac(%SF3469, %SF3468, N7, L7, N17, P13, %FF2124, %SF2124, L17);
V10Mac(%SF3471, %SF3470, N8, L8, N18, P12, %FF2448, %SF2448, L18);
V10Mac(%SF3473, %SF3472, N9, L9, N19, P11, %FF2772, %SF2772, L19);
V10Mac(%SF3475, %SF3474, N10, L10, N20, P9, %FF3096, %SF3096, L20);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:19L8L
%PartNumber:UDI19L8L
%LastNode ? ?
%NumPins:24
%FDF AND 0 N1 ~N1 N2 ~N2 N3 ~N3 P1 ~P1 N4 ~N4 P21 ~P21 N5 ~N5 P20 ~P20
     N6 ~N6 P19 ~P19 N7 ~N7 P18 ~P18 N8 ~N8 P17 ~P17 N9 ~N9 P16 ~P16
     N10 ~N10 P13 ~P13 N11 ~N11 *

%MACRO INMAC(InPin:%TEXT, SelFuse:%SF, OutNode:%TEXT);
 %IF %SelFuse=0 %THEN
  DLATCHPC(InPin, L1, ONE, IPL; OutNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 %ELSE
  BUF(InPin; OutNode; 1,1,1,1);
 %END;
%MACEND;

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+37 = 1 %THEN
  NOR(%InFuse+38, %InFuse+76, %InFuse+114, %InFuse+152, %InFuse+190,
     %InFuse+228, %InFuse+266; OutPin; 1,1,1,1);
 %ELSE
  NOR(%InFuse+38, %InFuse+76, %InFuse+114, %InFuse+152, %InFuse+190,
     %InFuse+228, %InFuse+266; TNode; 1,1,1,1);
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

LINV(P14; L1);

INMAC(P2, %SF2433, N1);
INMAC(P23, %SF2432, N2);
INMAC(P3, %SF2434, N3);
INMAC(P4, %SF2435, N4);
INMAC(P5, %SF2436, N5);
INMAC(P6, %SF2437, N6);
INMAC(P7, %SF2438, N7);
INMAC(P8, %SF2439, N8);
INMAC(P9, %SF2440, N9);
INMAC(P10, %SF2441, N10);
INMAC(P11, %SF2442, N11);

NOR7ENABLE(%SF00, %FF00, P22, N12);
NOR7ENABLE(%SF304, %FF304, P21, N13);
NOR7ENABLE(%SF608, %FF608, P20, N14);
NOR7ENABLE(%SF912, %FF912, P19, N15);
NOR7ENABLE(%SF1216, %FF1216, P18, N16);
NOR7ENABLE(%SF1520, %FF1520, P17, N17);
NOR7ENABLE(%SF1824, %FF1824, P16, N18);
NOR7ENABLE(%SF2128, %FF2128, P15, N19);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:19L8R
%PartNumber:UDI19L8R
%LastNode ? ?
%NumPins:24
%FDF AND 0 N1 ~N1 N2 ~N2 N3 ~N3 P1 ~P1 N4 ~N4 P21 ~P21 N5 ~N5 P20 ~P20
     N6 ~N6 P19 ~P19 N7 ~N7 P18 ~P18 N8 ~N8 P17 ~P17 N9 ~N9 P16 ~P16
     N10 ~N10 P13 ~P13 N11 ~N11 *

%MACRO INMAC(InPin:%TEXT, SelFuse:%SF, OutNode:%TEXT);
 %IF %SelFuse=0 %THEN
  DQFFC(InPin, P14, IPL; OutNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 %ELSE
  BUF(InPin; OutNode; 1,1,1,1);
 %END;
%MACEND;

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+37 = 1 %THEN
  NOR(%InFuse+38, %InFuse+76, %InFuse+114, %InFuse+152, %InFuse+190,
     %InFuse+228, %InFuse+266; OutPin; 1,1,1,1);
 %ELSE
  NOR(%InFuse+38, %InFuse+76, %InFuse+114, %InFuse+152, %InFuse+190,
     %InFuse+228, %InFuse+266; TNode; 1,1,1,1);
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

INMAC(P2, %SF2433, N1);
INMAC(P23, %SF2432, N2);
INMAC(P3, %SF2434, N3);
INMAC(P4, %SF2435, N4);
INMAC(P5, %SF2436, N5);
INMAC(P6, %SF2437, N6);
INMAC(P7, %SF2438, N7);
INMAC(P8, %SF2439, N8);
INMAC(P9, %SF2440, N9);
INMAC(P10, %SF2441, N10);
INMAC(P11, %SF2442, N11);

NOR7ENABLE(%SF00, %FF00, P22, N12);
NOR7ENABLE(%SF304, %FF304, P21, N13);
NOR7ENABLE(%SF608, %FF608, P20, N14);
NOR7ENABLE(%SF912, %FF912, P19, N15);
NOR7ENABLE(%SF1216, %FF1216, P18, N16);
NOR7ENABLE(%SF1520, %FF1520, P17, N17);
NOR7ENABLE(%SF1824, %FF1824, P16, N18);
NOR7ENABLE(%SF2128, %FF2128, P15, N19);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:19R4L
%PartNumber:UDI19R4L
%LastNode ? ?
%NumPins:24
%FDF AND 0 N1 ~N1 N2 ~N2 N3 ~N3 P22 ~P22 N4 ~N4 P21 ~P21 N5 ~N5 N12 ~N12
     N6 ~N6 N13 ~N13 N7 ~N7 N14 ~N14 N8 ~N8 N15 ~N15 N9 ~N9 P16 ~P16
     N10 ~N10 P15 ~P15 N11 ~N11 *

%MACRO INMAC(InPin:%TEXT, SelFuse:%SF, OutNode:%TEXT);
 %IF %SelFuse=0 %THEN
  DLATCHPC(InPin, L2, ONE, IPL; OutNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 %ELSE
  BUF(InPin; OutNode; 1,1,1,1);
 %END;
%MACEND;

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+37 = 1 %THEN
  NOR(%InFuse+38, %InFuse+76, %InFuse+114, %InFuse+152, %InFuse+190,
     %InFuse+228, %InFuse+266; OutPin; 1,1,1,1);
 %ELSE
  NOR(%InFuse+38, %InFuse+76, %InFuse+114, %InFuse+152, %InFuse+190,
     %InFuse+228, %InFuse+266; TNode; 1,1,1,1);
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+38,%InFuse+76,%InFuse+114,%InFuse+152,%InFuse+190,%InFuse+228,%InFuse+266; TLNode);
 DQFFC(TLNode, P1, IPL; NodeInp; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp, L1; OutPin; 1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);
LINV(P14; L2);

INMAC(P2, %SF2433, N1);
INMAC(P23, %SF2432, N2);
INMAC(P3, %SF2434, N3);
INMAC(P4, %SF2435, N4);
INMAC(P5, %SF2436, N5);
INMAC(P6, %SF2437, N6);
INMAC(P7, %SF2438, N7);
INMAC(P8, %SF2439, N8);
INMAC(P9, %SF2440, N9);
INMAC(P10, %SF2441, N10);
INMAC(P11, %SF2442, N11);

NOR7ENABLE(%SF00, %FF00, P22, N16);
NOR7ENABLE(%SF304, %FF304, P21, N17);
NOR8DFF(%FF608, N12, L3, P20);
NOR8DFF(%FF912, N13, L4, P19);
NOR8DFF(%FF1216, N14, L5, P18);
NOR8DFF(%FF1520, N15, L6, P17);
NOR7ENABLE(%SF1824, %FF1824, P16, N18);
NOR7ENABLE(%SF2128, %FF2128, P15, N19);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:19R4R
%PartNumber:UDI19R4R
%LastNode ? ?
%NumPins:24
%FDF AND 0 N1 ~N1 N2 ~N2 N3 ~N3 P22 ~P22 N4 ~N4 P21 ~P21 N5 ~N5 N12 ~N12
     N6 ~N6 N13 ~N13 N7 ~N7 N14 ~N14 N8 ~N8 N15 ~N15 N9 ~N9 P16 ~P16
     N10 ~N10 P15 ~P15 N11 ~N11 *

%MACRO INMAC(InPin:%TEXT, SelFuse:%SF, OutNode:%TEXT);
 %IF %SelFuse=0 %THEN
  DQFFC(InPin, P14, IPL; OutNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 %ELSE
  BUF(InPin; OutNode; 1,1,1,1);
 %END;
%MACEND;

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+37 = 1 %THEN
  NOR(%InFuse+38, %InFuse+76, %InFuse+114, %InFuse+152, %InFuse+190,
     %InFuse+228, %InFuse+266; OutPin; 1,1,1,1);
 %ELSE
  NOR(%InFuse+38, %InFuse+76, %InFuse+114, %InFuse+152, %InFuse+190,
     %InFuse+228, %InFuse+266; TNode; 1,1,1,1);
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+38,%InFuse+76,%InFuse+114,%InFuse+152,%InFuse+190,%InFuse+228,%InFuse+266; TLNode);
 DQFFC(TLNode, P1, IPL; NodeInp; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp, L1; OutPin; 1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);

INMAC(P2, %SF2433, N1);
INMAC(P23, %SF2432, N2);
INMAC(P3, %SF2434, N3);
INMAC(P4, %SF2435, N4);
INMAC(P5, %SF2436, N5);
INMAC(P6, %SF2437, N6);
INMAC(P7, %SF2438, N7);
INMAC(P8, %SF2439, N8);
INMAC(P9, %SF2440, N9);
INMAC(P10, %SF2441, N10);
INMAC(P11, %SF2442, N11);

NOR7ENABLE(%SF00, %FF00, P22, N16);
NOR7ENABLE(%SF304, %FF304, P21, N17);
NOR8DFF(%FF608, N12, L2, P20);
NOR8DFF(%FF912, N13, L3, P19);
NOR8DFF(%FF1216, N14, L4, P18);
NOR8DFF(%FF1520, N15, L5, P17);
NOR7ENABLE(%SF1824, %FF1824, P16, N18);
NOR7ENABLE(%SF2128, %FF2128, P15, N19);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:19R6L
%PartNumber:UDI19R6L
%LastNode ? ?
%NumPins:24
%FDF AND 0 N1 ~N1 N2 ~N2 N3 ~N3 P22 ~P22 N4 ~N4 N12 ~N12 N5 ~N5 N13 ~N13
     N6 ~N6 N14 ~N14 N7 ~N7 N15 ~N15 N8 ~N8 N16 ~N16 N9 ~N9 N17 ~N17
     N10 ~N10 P15 ~P15 N11 ~N11 *

%MACRO INMAC(InPin:%TEXT, SelFuse:%SF, OutNode:%TEXT);
 %IF %SelFuse=0 %THEN
  DLATCHPC(InPin, L2, ONE, IPL; OutNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 %ELSE
  BUF(InPin; OutNode; 1,1,1,1);
 %END;
%MACEND;

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+37 = 1 %THEN
  NOR(%InFuse+38, %InFuse+76, %InFuse+114, %InFuse+152, %InFuse+190,
     %InFuse+228, %InFuse+266; OutPin; 1,1,1,1);
 %ELSE
  NOR(%InFuse+38, %InFuse+76, %InFuse+114, %InFuse+152, %InFuse+190,
     %InFuse+228, %InFuse+266; TNode; 1,1,1,1);
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+38,%InFuse+76,%InFuse+114,%InFuse+152,%InFuse+190,%InFuse+228,%InFuse+266; TLNode);
 DQFFC(TLNode, P1, IPL; NodeInp; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp, L1; OutPin; 1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);
LINV(P14; L2);

INMAC(P2, %SF2433, N1);
INMAC(P23, %SF2432, N2);
INMAC(P3, %SF2434, N3);
INMAC(P4, %SF2435, N4);
INMAC(P5, %SF2436, N5);
INMAC(P6, %SF2437, N6);
INMAC(P7, %SF2438, N7);
INMAC(P8, %SF2439, N8);
INMAC(P9, %SF2440, N9);
INMAC(P10, %SF2441, N10);
INMAC(P11, %SF2442, N11);

NOR7ENABLE(%SF00, %FF00, P22, N18);
NOR8DFF(%FF304, N12, L3, P21);
NOR8DFF(%FF608, N13, L4, P20);
NOR8DFF(%FF912, N14, L5, P19);
NOR8DFF(%FF1216, N15, L6, P18);
NOR8DFF(%FF1520, N16, L7, P17);
NOR8DFF(%FF1824, N17, L8, P16);
NOR7ENABLE(%SF2128, %FF2128, P15, N19);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:19R6R
%PartNumber:UDI19R6R
%LastNode ? ?
%NumPins:24
%FDF AND 0 N1 ~N1 N2 ~N2 N3 ~N3 P22 ~P22 N4 ~N4 N12 ~N12 N5 ~N5 N13 ~N13
     N6 ~N6 N14 ~N14 N7 ~N7 N15 ~N15 N8 ~N8 N16 ~N16 N9 ~N9 N17 ~N17
     N10 ~N10 P15 ~P15 N11 ~N11 *

%MACRO INMAC(InPin:%TEXT, SelFuse:%SF, OutNode:%TEXT);
 %IF %SelFuse=0 %THEN
  DQFFC(InPin, P14, IPL; OutNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 %ELSE
  BUF(InPin; OutNode; 1,1,1,1);
 %END;
%MACEND;

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+37 = 1 %THEN
  NOR(%InFuse+38, %InFuse+76, %InFuse+114, %InFuse+152, %InFuse+190,
     %InFuse+228, %InFuse+266; OutPin; 1,1,1,1);
 %ELSE
  NOR(%InFuse+38, %InFuse+76, %InFuse+114, %InFuse+152, %InFuse+190,
     %InFuse+228, %InFuse+266; TNode; 1,1,1,1);
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+38,%InFuse+76,%InFuse+114,%InFuse+152,%InFuse+190,%InFuse+228,%InFuse+266; TLNode);
 DQFFC(TLNode, P1, IPL; NodeInp; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp, L1; OutPin; 1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);

INMAC(P2, %SF2433, N1);
INMAC(P23, %SF2432, N2);
INMAC(P3, %SF2434, N3);
INMAC(P4, %SF2435, N4);
INMAC(P5, %SF2436, N5);
INMAC(P6, %SF2437, N6);
INMAC(P7, %SF2438, N7);
INMAC(P8, %SF2439, N8);
INMAC(P9, %SF2440, N9);
INMAC(P10, %SF2441, N10);
INMAC(P11, %SF2442, N11);

NOR7ENABLE(%SF00, %FF00, P22, N18);
NOR8DFF(%FF304, N12, L2, P21);
NOR8DFF(%FF608, N13, L3, P20);
NOR8DFF(%FF912, N14, L4, P19);
NOR8DFF(%FF1216, N15, L5, P18);
NOR8DFF(%FF1520, N16, L6, P17);
NOR8DFF(%FF1824, N17, L7, P16);
NOR7ENABLE(%SF2128, %FF2128, P15, N19);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:19R8L
%PartNumber:UDI19R8L
%LastNode ? ?
%NumPins:24
%FDF AND 0 N1 ~N1 N2 ~N2 N3 ~N3 N12 ~N12 N4 ~N4 N13 ~N13 N5 ~N5 N14 ~N14
     N6 ~N6 N15 ~N15 N7 ~N7 N16 ~N16 N8 ~N8 N17 ~N17 N9 ~N9 N18 ~N18
     N10 ~N10 N19 ~N19 N11 ~N11 *

%MACRO INMAC(InPin:%TEXT, SelFuse:%SF, OutNode:%TEXT);
 %IF %SelFuse=0 %THEN
  DLATCHPC(InPin, L2, ONE, IPL; OutNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 %ELSE
  BUF(InPin; OutNode; 1,1,1,1);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+38,%InFuse+76,%InFuse+114,%InFuse+152,%InFuse+190,%InFuse+228,%InFuse+266; TLNode);
 DQFFC(TLNode, P1, IPL; NodeInp; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp, L1; OutPin; 1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);
LINV(P14; L2);

INMAC(P2, %SF2433, N1);
INMAC(P23, %SF2432, N2);
INMAC(P3, %SF2434, N3);
INMAC(P4, %SF2435, N4);
INMAC(P5, %SF2436, N5);
INMAC(P6, %SF2437, N6);
INMAC(P7, %SF2438, N7);
INMAC(P8, %SF2439, N8);
INMAC(P9, %SF2440, N9);
INMAC(P10, %SF2441, N10);
INMAC(P11, %SF2442, N11);

NOR8DFF(%FF00, N12, L3, P22);
NOR8DFF(%FF304, N13, L4, P21);
NOR8DFF(%FF608, N14, L5, P20);
NOR8DFF(%FF912, N15, L6, P19);
NOR8DFF(%FF1216, N16, L7, P18);
NOR8DFF(%FF1520, N17, L8, P17);
NOR8DFF(%FF1824, N18, L9, P16);
NOR8DFF(%FF2128, N19, L10, P15);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:19R8R
%PartNumber:UDI19R8R
%LastNode ? ?
%NumPins:24
%FDF AND 0 N1 ~N1 N2 ~N2 N3 ~N3 N12 ~N12 N4 ~N4 N13 ~N13 N5 ~N5 N14 ~N14
     N6 ~N6 N15 ~N15 N7 ~N7 N16 ~N16 N8 ~N8 N17 ~N17 N9 ~N9 N18 ~N18
     N10 ~N10 N19 ~N19 N11 ~N11 *

%MACRO INMAC(InPin:%TEXT, SelFuse:%SF, OutNode:%TEXT);
 %IF %SelFuse=0 %THEN
  DQFFC(InPin, P14, IPL; OutNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 %ELSE
  BUF(InPin; OutNode; 1,1,1,1);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 LNOR(%InFuse,%InFuse+38,%InFuse+76,%InFuse+114,%InFuse+152,%InFuse+190,%InFuse+228,%InFuse+266; TLNode);
 DQFFC(TLNode, P1, IPL; NodeInp; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp, L1; OutPin; 1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);

INMAC(P2, %SF2433, N1);
INMAC(P23, %SF2432, N2);
INMAC(P3, %SF2434, N3);
INMAC(P4, %SF2435, N4);
INMAC(P5, %SF2436, N5);
INMAC(P6, %SF2437, N6);
INMAC(P7, %SF2438, N7);
INMAC(P8, %SF2439, N8);
INMAC(P9, %SF2440, N9);
INMAC(P10, %SF2441, N10);
INMAC(P11, %SF2442, N11);

NOR8DFF(%FF00, N12, L2, P22);
NOR8DFF(%FF304, N13, L3, P21);
NOR8DFF(%FF608, N14, L4, P20);
NOR8DFF(%FF912, N15, L5, P19);
NOR8DFF(%FF1216, N16, L6, P18);
NOR8DFF(%FF1520, N17, L7, P17);
NOR8DFF(%FF1824, N18, L8, P16);
NOR8DFF(%FF2128, N19, L9, P15);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20ARP10
%PartNumber:UDI20ARP10
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4 P6 ~P6
   N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 P10 ~P10 N9 ~N9
   P11 ~P11 N10 ~N10 *

%MACRO POR8DFF(InFuse:%FF, XorFuse:%SF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %END;
 DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);
POR8DFF(%FF00, %SF3200, N1, L2, P23);
POR8DFF(%FF320, %SF3201, N2, L3, P22);
POR8DFF(%FF640, %SF3202, N3, L4, P21);
POR8DFF(%FF960, %SF3203, N4, L5, P20);
POR8DFF(%FF1280, %SF3204, N5, L6, P19);
POR8DFF(%FF1600, %SF3205, N6, L7, P18);
POR8DFF(%FF1920, %SF3206, N7, L8, P17);
POR8DFF(%FF2240, %SF3207, N8, L9, P16);
POR8DFF(%FF2560, %SF3208, N9, L10, P15);
POR8DFF(%FF2880, %SF3209, N10, L11, P14);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20ARP4
%PartNumber:UDI20ARP4
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 P22 ~P22 P4 ~P4 P21 ~P21 P5 ~P5 N4 ~N4 P6 ~P6
   N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 P16 ~P16 P10 ~P10 P15 ~P15
   P11 ~P11 P14 ~P14 *

%MACRO POR8DFF(InFuse:%FF, XorFuse:%SF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %END;
 DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

%MACRO POR8ENABLE(EnableFuse:%SF, InFuse:%FF, XorFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280, %InFuse+320; OutPin; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280, %InFuse+320; OutPin; 1,1,1,1);
  %END;
 %ELSE
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280, %InFuse+320; TNode; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280, %InFuse+320; TNode; 1,1,1,1);
  %END;
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

LINV(P13; L1);
POR8ENABLE(%SF00, %FF00, %SF3440, P23, N1);
POR8ENABLE(%SF360, %FF360, %SF3441, P22, N2);
POR8ENABLE(%SF720, %FF720, %SF3442, P21, N3);
POR8DFF(%FF1080, %SF3443, N4, L2, P20);
POR8DFF(%FF1400, %SF3444, N5, L3, P19);
POR8DFF(%FF1720, %SF3445, N6, L4, P18);
POR8DFF(%FF2040, %SF3446, N7, L5, P17);
POR8ENABLE(%SF2360, %FF2360, %SF3447, P16, N8);
POR8ENABLE(%SF2720, %FF2720, %SF3448, P15, N9);
POR8ENABLE(%SF3080, %FF3080, %SF3449, P14, N10);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20ARP6
%PartNumber:UDI20ARP6
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 P22 ~P22 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4 P6 ~P6
   N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 P10 ~P10 P15 ~P15
   P11 ~P11 P14 ~P14 *

%MACRO POR8DFF(InFuse:%FF, XorFuse:%SF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %END;
 DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

%MACRO POR8ENABLE(EnableFuse:%SF, InFuse:%FF, XorFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280, %InFuse+320; OutPin; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280, %InFuse+320; OutPin; 1,1,1,1);
  %END;
 %ELSE
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280, %InFuse+320; TNode; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280, %InFuse+320; TNode; 1,1,1,1);
  %END;
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

LINV(P13; L1);
POR8ENABLE(%SF00, %FF00, %SF3360, P23, N1);
POR8ENABLE(%SF360, %FF360, %SF3361, P22, N2);
POR8DFF(%FF720, %SF3362, N3, L2, P21);
POR8DFF(%FF1040, %SF3363, N4, L3, P20);
POR8DFF(%FF1360, %SF3364, N5, L4, P19);
POR8DFF(%FF1680, %SF3365, N6, L5, P18);
POR8DFF(%FF2000, %SF3366, N7, L6, P17);
POR8DFF(%FF2320, %SF3367, N8, L7, P16);
POR8ENABLE(%SF2640, %FF2640, %SF3368, P15, N9);
POR8ENABLE(%SF3000, %FF3000, %SF3369, P14, N10);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20ARP8
%PartNumber:UDI20ARP8
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4 P6 ~P6
   N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 P10 ~P10 N9 ~N9
   P11 ~P11 P14 ~P14 *

%MACRO POR8DFF(InFuse:%FF, XorFuse:%SF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %END;
 DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

%MACRO POR8ENABLE(EnableFuse:%SF, InFuse:%FF, XorFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280, %InFuse+320; OutPin; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280, %InFuse+320; OutPin; 1,1,1,1);
  %END;
 %ELSE
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280, %InFuse+320; TNode; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280, %InFuse+320; TNode; 1,1,1,1);
  %END;
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

LINV(P13; L1);
POR8ENABLE(%SF00, %FF00, %SF3280, P23, N1);
POR8DFF(%FF360, %SF3281, N2, L2, P22);
POR8DFF(%FF680, %SF3282, N3, L3, P21);
POR8DFF(%FF1000, %SF3283, N4, L4, P20);
POR8DFF(%FF1320, %SF3284, N5, L5, P19);
POR8DFF(%FF1640, %SF3285, N6, L6, P18);
POR8DFF(%FF1960, %SF3286, N7, L7, P17);
POR8DFF(%FF2280, %SF3287, N8, L8, P16);
POR8DFF(%FF2600, %SF3288, N9, L9, P15);
POR8ENABLE(%SF2920, %FF2920, %SF3289, P14, N10);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20G10
%PartNumber:UDI20G10
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P1 ~P1 N1 ~N1 P2 ~P2 N2 ~N2 P3 ~P3 N3 ~N3 P4 ~P4 N4 ~N4 P5 ~P5
     N5 ~N5 P6 ~P6 N6 ~N6 P7 ~P7 N7 ~N7 P8 ~P8 N8 ~N8 P9 ~P9 N9 ~N9
     P10 ~P10 N10 ~N10 P11 ~P11 P13 ~P13 *

%MACRO LOR8(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308; OutLNode);
%MACEND;

%MACRO G10Mac(S2:%SF, FeedBack:%TEXT, OrOutput:%TEXT, TNode:%TEXT,
              OutPin:%TEXT, InFuse:%FF, EnableFuse:%SF);
 %CASE %S2,%S2+1,%S2+2
   0:
     DQFFC(OrOutput, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     INV(TNode; OutPin; 1,1,1,1);
    %ELSE
     ITSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    INV(TNode; FeedBack; 1,1,1,1);
  |1:
     DQFFC(OrOutput, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     BUF(TNode; OutPin; 1,1,1,1);
    %ELSE
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    INV(TNode; FeedBack; 1,1,1,1);
  |2:
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     INV(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     INV(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(OutPin; FeedBack; 1,1,1,1);
  |3:
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     BUF(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     BUF(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(OutPin; FeedBack; 1,1,1,1);
  |4:
     DQFFC(OrOutput, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     ITSB(TNode, L11; OutPin; 1,1,1,1,1,1,1,1);
     INV(TNode; FeedBack; 1,1,1,1);
  |5:
     DQFFC(OrOutput, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     TSB(TNode, L11; OutPin; 1,1,1,1,1,1,1,1);
     INV(TNode; FeedBack; 1,1,1,1);
  |6:
     INV(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, L11; OutPin; 1,1,1,1,1,1,1,1);
     BUF(OutPin; FeedBack; 1,1,1,1);
  |7:
     BUF(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, L11; OutPin; 1,1,1,1,1,1,1,1);
     BUF(OutPin; FeedBack; 1,1,1,1);
 %END;
%MACEND;

LINV(P13;L11);

LOR8(%FF44, L1);
LOR8(%FF440, L2);
LOR8(%FF836, L3);
LOR8(%FF1232, L4);
LOR8(%FF1628, L5);
LOR8(%FF2024, L6);
LOR8(%FF2420, L7);
LOR8(%FF2816, L8);
LOR8(%FF3212, L9);
LOR8(%FF3608, L10);


G10Mac(%SF3960, N1, L1, N11, P23, %FF00, %SF00);
G10Mac(%SF3963, N2, L2, N12, P22, %FF396, %SF396);
G10Mac(%SF3966, N3, L3, N13, P21, %FF792, %SF792);
G10Mac(%SF3969, N4, L4, N14, P20, %FF1188, %SF1188);
G10Mac(%SF3972, N5, L5, N15, P19, %FF1584, %SF1584);
G10Mac(%SF3975, N6, L6, N16, P18, %FF1980, %SF1980);
G10Mac(%SF3978, N7, L7, N17, P17, %FF2376, %SF2376);
G10Mac(%SF3981, N8, L8, N18, P16, %FF2772, %SF2772);
G10Mac(%SF3984, N9, L9, N19, P15, %FF3168, %SF3168);
G10Mac(%SF3987, N10, L10, N20, P14, %FF3564, %SF3564);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20R4
%PartNumber:UDI20R4
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 P22 ~P22 P4 ~P4 P21 ~P21 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 P16 ~P16 P10 ~P10 P15 ~P15
   P11 ~P11 P14 ~P14 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
  DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
  TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

%MACRO NOR7ENABLE(InFuse:%FF, EnableFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; OutPin; 1,1,1,1);
 %ELSE
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; TNode; 1,1,1,1);
   TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

LINV(P13; L1);
NOR7ENABLE(%FF00, %SF00, P22, N1);
NOR7ENABLE(%FF320, %SF320, P21, N2);
NOR8DFF(%FF640, N3, L2, P20);
NOR8DFF(%FF960, N4, L3, P19);
NOR8DFF(%FF1280, N5, L4, P18);
NOR8DFF(%FF1600, N6, L5, P17);
NOR7ENABLE(%FF1920, %SF1920, P16, N7);
NOR7ENABLE(%FF2240, %SF2240, P15, N8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20R6
%PartNumber:UDI20R6
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 P22 ~P22 P4 ~P4 N2 ~N2 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 N7 ~N7 P10 ~P10 P15 ~P15
   P11 ~P11 P14 ~P14 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
  DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
  TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

%MACRO NOR7ENABLE(InFuse:%FF, EnableFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; OutPin; 1,1,1,1);
 %ELSE
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; TNode; 1,1,1,1);
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

LINV(P13; L1);
NOR7ENABLE(%FF00, %SF00, P22, N1);
NOR8DFF(%FF320, N2, L2, P21);
NOR8DFF(%FF640, N3, L3, P20);
NOR8DFF(%FF960, N4, L4, P19);
NOR8DFF(%FF1280, N5, L5, P18);
NOR8DFF(%FF1600, N6, L6, P17);
NOR8DFF(%FF1920, N7, L7, P16);
NOR7ENABLE(%FF2240, %SF2240, P15, N8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20R8
%PartNumber:UDI20R8
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 N1 ~N1 P4 ~P4 N2 ~N2 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 N7 ~N7 P10 ~P10 N8 ~N8
   P11 ~P11 P14 ~P14 *

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
  DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
  TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);
NOR8DFF(%FF00, N1, L2, P22);
NOR8DFF(%FF320, N2, L3, P21);
NOR8DFF(%FF640, N3, L4, P20);
NOR8DFF(%FF960, N4, L5, P19);
NOR8DFF(%FF1280, N5, L6, P18);
NOR8DFF(%FF1600, N6, L7, P17);
NOR8DFF(%FF1920, N7, L8, P16);
NOR8DFF(%FF2240, N8, L9, P15);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20RA10
%PartNumber:UDI20RA10
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 P23 ~P23 P3 ~P3 P22 ~P22 P4 ~P4 P21 ~P21 P5 ~P5 P20 ~P20 P6 ~P6
           P19 ~P19 P7 ~P7 P18 ~P18 P8 ~P8 P17 ~P17  P9 ~P9 P16 ~P16 P10 ~P10  P15 ~P15
           P11 ~P11 P14 ~P14 *


%MACRO LOADMac(IO:%TEXT, IOBar:%TEXT, InFuse:%FF, TLNode1:%TEXT,
                   TLNode2:%TEXT, ResetLoadInput:%TEXT, TLNode3:%TEXT,
        	   SetLoadInput:%TEXT, XorFuse:%SF, TLNode:%TEXT, PClock:%TEXT,
                   RegOut:%TEXT, TLSet:%TEXT);

  LINV(IO; IOBar);
  LAND(P1, %InFuse+80; TLNode1);
  LAND(L1, IOBar; TLNode2);
  LNOR(TLNode1, TLNode2, IPH; ResetLoadInput);
  LINV(%InFuse+120; TLSet);
  LAND(P1, TLSet; TLNode3);
  LOR(TLNode2, TLNode3; SetLoadInput);

 %IF %XorFuse=1 %THEN
  LOR(%InFuse+160, %InFuse+200, %InFuse+240, %InFuse+280; TLNode);
 %ELSE
  LNOR(%InFuse+160, %InFuse+200, %InFuse+240, %InFuse+280; TLNode);
 %END;
  AND(%InFuse+40; PClock; 0,0,0,0);
  DQFFPC(TLNode, PClock, SetLoadInput, ResetLoadInput; RegOut; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
%MACEND;

%MACRO OUTPUTMac(InFuse:%FF, TLNode:%TEXT, RegOutput:%TEXT, TsbEnable:%TEXT,
                 IO:%TEXT, EnableFuse:%SF, SETFuse:%SF, RESETFuse:%SF);

%IF %SETFuse..%SETFuse+39 = 1 %THEN
 %IF %RESETFuse..%RESETFuse+39 = 1 %THEN

   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
     ITSB(TLNode, L2; IO; 1,1,1,1,1,1,1,1);
   %ELSE
     LAND(%InFuse, L2; TsbEnable);
     ITSB(TLNode, TsbEnable; IO; 1,1,1,1,1,1,1,1);
   %END;

 %ELSE

   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
     ITSB(RegOutput, L2; IO; 1,1,1,1,1,1,1,1);
   %ELSE
     LAND(%InFuse, L2; TsbEnable);
     ITSB(RegOutput, TsbEnable; IO; 1,1,1,1,1,1,1,1);
   %END;
 %END;
%ELSE
 %IF %RESETFuse..%RESETFuse+39 = 1 %THEN

   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
     ITSB(RegOutput, L2; IO; 1,1,1,1,1,1,1,1);
   %ELSE
     LAND(%InFuse, L2; TsbEnable);
     ITSB(RegOutput, TsbEnable; IO; 1,1,1,1,1,1,1,1);
   %END;

 %ELSE

   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
     ITSB(RegOutput, L2; IO; 1,1,1,1,1,1,1,1);
   %ELSE
     LAND(%InFuse, L2; TsbEnable);
     ITSB(RegOutput, TsbEnable; IO; 1,1,1,1,1,1,1,1);
   %END;
 %END;
%END;
%MACEND;

LINV(P1;L1);
LINV(P13;L2);

LOADMac(P23, L3, %FF00, L4, L5, L6, L7, L8, %SF3200, L9, N1, N2, L73);
LOADMac(P22, L10, %FF320, L11, L12, L13, L14, L15, %SF3201, L16, N3, N4, L74);
LOADMac(P21, L17, %FF640, L18, L19, L20, L21, L22, %SF3202, L23, N5, N6, L75);
LOADMac(P20, L24, %FF960, L25, L26, L27, L28, L29, %SF3203, L30, N7, N8, L76);
LOADMac(P19, L31, %FF1280, L32, L33, L34, L35, L36, %SF3204, L37, N9, N10, L77);
LOADMac(P18, L38, %FF1600, L39, L40, L41, L42, L43, %SF3205, L44, N11, N12, L78);
LOADMac(P17, L45, %FF1920, L46, L47, L48, L49, L50, %SF3206, L51, N13, N14, L79);
LOADMac(P16, L52, %FF2240, L53, L54, L55, L56, L57, %SF3207, L58, N15, N16, L80);
LOADMac(P15, L59, %FF2560, L60, L61, L62, L63, L64, %SF3208, L65, N17, N18, L81);
LOADMac(P14, L66, %FF2880, L67, L68, L69, L70, L71, %SF3209, L72, N19, N20, L82);

OUTPUTMac(%FF00, L9, N2, L83, P23, %SF00, %SF120, %SF80);
OUTPUTMac(%FF320,L16, N4, L84, P22, %SF320, %SF440, %SF400);
OUTPUTMac(%FF640, L23, N6, L85, P21, %SF640, %SF760, %SF720);
OUTPUTMac(%FF960, L30, N8, L86, P20, %SF960, %SF1080, %SF1040);
OUTPUTMac(%FF1280, L37, N10, L87, P19, %SF1280, %SF1400, %SF1360);
OUTPUTMac(%FF1600, L44, N12, L88, P18, %SF1600, %SF1720, %SF1680);
OUTPUTMac(%FF1920, L51, N14, L89, P17, %SF1920, %SF2040, %SF2000);
OUTPUTMac(%FF2240, L58, N16, L90, P16, %SF2240, %SF2360, %SF2320);
OUTPUTMac(%FF2560, L65, N18, L91, P15, %SF2560, %SF2680, %SF2640);
OUTPUTMac(%FF2880, L72, N20, L92 P14, %SF2880, %SF3000, %SF2960);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20RP4
%PartNumber:UDI20RP4
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 P22 ~P22 P4 ~P4 P21 ~P21 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 P16 ~P16 P10 ~P10 P15 ~P15
   P11 ~P11 P14 ~P14 *

%MACRO POR8DFF(InFuse:%FF, XorFuse:%SF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %END;
 DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

%MACRO POR7ENABLE(InFuse:%FF, EnableFuse:%SF, XorFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; OutPin; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280; OutPin; 1,1,1,1);
  %END;
 %ELSE
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; TNode; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280; TNode; 1,1,1,1);
  %END;
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

LINV(P13; L1);
POR7ENABLE(%FF00, %SF00, %SF2560, P22, N1);
POR7ENABLE(%FF320, %SF320, %SF2561, P21, N2);
POR8DFF(%FF640, %SF2562, N3, L2, P20);
POR8DFF(%FF960, %SF2563, N4, L3, P19);
POR8DFF(%FF1280, %SF2564, N5, L4, P18);
POR8DFF(%FF1600, %SF2565, N6, L5, P17);
POR7ENABLE(%FF1920, %SF1920, %SF2566, P16, N7);
POR7ENABLE(%FF2240, %SF2240, %SF2567, P15, N8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20RP6
%PartNumber:UDI20RP6
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 P22 ~P22 P4 ~P4 N2 ~N2 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 N7 ~N7 P10 ~P10 P15 ~P15
   P11 ~P11 P14 ~P14 *

%MACRO POR8DFF(InFuse:%FF, XorFuse:%SF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %END;
 DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

%MACRO POR7ENABLE(InFuse:%FF, EnableFuse:%SF, XorFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; OutPin; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280; OutPin; 1,1,1,1);
  %END;
 %ELSE
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; TNode; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280; TNode; 1,1,1,1);
  %END;
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

LINV(P13; L1);
POR7ENABLE(%FF00, %SF00, %SF2560, P22, N1);
POR8DFF(%FF320, %SF2561, N2, L2, P21);
POR8DFF(%FF640, %SF2562, N3, L3, P20);
POR8DFF(%FF960, %SF2563, N4, L4, P19);
POR8DFF(%FF1280, %SF2564, N5, L5, P18);
POR8DFF(%FF1600, %SF2565, N6, L6, P17);
POR8DFF(%FF1920, %SF2566, N7, L7, P16);
POR7ENABLE(%FF2240, %SF2240, %SF2567, P15, N8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20RP8
%PartNumber:UDI20RP8
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 P23 ~P23  P3 ~P3 N1 ~N1 P4 ~P4 N2 ~N2 P5 ~P5 N3 ~N3 P6 ~P6
   N4 ~N4 P7 ~P7 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 N7 ~N7 P10 ~P10 N8 ~N8
   P11 ~P11 P14 ~P14 *

%MACRO POR8DFF(InFuse:%FF, XorFuse:%SF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,%InFuse+280;TLNode);
 %END;
 DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);
POR8DFF(%FF00, %SF2560, N1, L2, P22);
POR8DFF(%FF320, %SF2561, N2, L3, P21);
POR8DFF(%FF640, %SF2562, N3, L4, P20);
POR8DFF(%FF960, %SF2563, N4, L5, P19);
POR8DFF(%FF1280, %SF2564, N5, L6, P18);
POR8DFF(%FF1600, %SF2565, N6, L7, P17);
POR8DFF(%FF1920, %SF2566, N7, L8, P16);
POR8DFF(%FF2240, %SF2567, N8, L9, P15);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20V8
%PartNumber:UDI20V8
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4 P6 ~P6
     N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 P10 ~P10 N9 ~N9
     P11 ~P11 N10 ~N10 *

%MACRO FEEDBACK(N1FeedBack: %TEXT, N10FeedBack: %TEXT);
 %IF %SF2704 = 1 %THEN
  BUF(P1; N1FeedBack; 1,1,1,1);
  BUF(P13; N10FeedBack; 1,1,1,1);
 %ELSE
  BUF(P23; N1FeedBack; 1,1,1,1);
  BUF(P14; N10FeedBack; 1,1,1,1);
 %END;
%MACEND;

%MACRO V8MAC(S0:%SF, XorFuse:%SF, FeedBack:%TEXT, LorOutput:%TEXT, InFuse:%FF,
             OutPin:%TEXT, TNode:%TEXT, EnableFuse:%SF, TLNode:%TEXT,
	     TSNode:%TEXT, NextPin:%TEXT, PrevPin:%TEXT);
 %CASE %SF2704,%SF2705,%S0
   2:
     LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,
         %InFuse+240,%InFuse+280;LorOutput);
     %IF %XorFuse=0 %THEN
      LINV(LorOutput;TLNode);
      DQFFC(TLNode, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     %ELSE
      DQFFC(LorOutput, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     %END;
     TSB(TNode, L17; OutPin; 1,1,1,1,1,1,1,1);
     BUF(TNode; FeedBack; 1,1,1,1);
  |3:
     LOR(%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,
         %InFuse+280;LorOutput);
     %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 1,1,1,1);
      %ELSE
       BUF(LorOutput; OutPin; 1,1,1,1);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 1,1,1,1);
      %ELSE
       BUF(LorOutput; TNode; 1,1,1,1);
      %END;
      TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
     %END;
     BUF(OutPin; FeedBack; 1,1,1,1);
  |4:
     LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,
         %InFuse+240,%InFuse+280;LorOutput);
     %IF %XorFuse = 0 %THEN
      INV(LorOutput; OutPin; 1,1,1,1);
     %ELSE
      BUF(LorOutput; OutPin; 1,1,1,1);
     %END;
     BUF(ZERO; FeedBack; 1,1,1,1);
  |5:
     TSB(TSNode, ZERO; OutPin; 1,1,1,1,1,1,1,1);
     BUF(NextPin; FeedBack; 1,1,1,1);
  |7:
   LOR(%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,
       %InFuse+280;LorOutput);
     %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 1,1,1,1);
      %ELSE
       BUF(LorOutput; OutPin; 1,1,1,1);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 1,1,1,1);
      %ELSE
       BUF(LorOutput; TNode; 1,1,1,1);
      %END;
      TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
     %END;
     BUF(PrevPin; FeedBack; 1,1,1,1);
 %END;
%MACEND;

FEEDBACK(N1, N10);

LINV(P13;L17);

V8MAC(%SF2632, %SF2560, N2, L1, %FF00, P22, N11, %SF00, L9, N17, P23, P23);
V8MAC(%SF2633, %SF2561, N3, L2, %FF320, P21, N12, %SF320, L10, N18, P22, P21);
V8MAC(%SF2634, %SF2562, N4, L3, %FF640, P20, N13, %SF640, L11, N19, P21, P20);
V8MAC(%SF2635, %SF2563, N5, L4, %FF960, P19, N14, %SF960, L12, N20, P20, P19);
V8MAC(%SF2636, %SF2564, N6, L5, %FF1280, P18, N15, %SF1280, L13, N21, P17, P18);
V8MAC(%SF2637, %SF2565, N7, L6, %FF1600, P17, N16, %SF1600, L14, N22, P16, P17);
V8MAC(%SF2638, %SF2566, N8, L7, %FF1920, P16, N17, %SF1920, L15, N23, P15, P16);
V8MAC(%SF2639, %SF2567, N9, L8, %FF2240, P15, N18, %SF2240, L16, N24, P14, P14);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20V8A
%PartNumber:UDI20V8A
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5 N4 ~N4 P6 ~P6
     N5 ~N5 P7 ~P7 N6 ~N6 P8 ~P8 N7 ~N7 P9 ~P9 N8 ~N8 P10 ~P10 N9 ~N9
     P11 ~P11 N10 ~N10 *

%MACRO FEEDBACK(N1FeedBack: %TEXT, N10FeedBack: %TEXT);
 %IF %SF2704 = 1 %THEN
  BUF(P1; N1FeedBack; 1,1,1,1);
  BUF(P13; N10FeedBack; 1,1,1,1);
 %ELSE
  BUF(P23; N1FeedBack; 1,1,1,1);
  BUF(P14; N10FeedBack; 1,1,1,1);
 %END;
%MACEND;

%MACRO V8MAC(S0:%SF, XorFuse:%SF, FeedBack:%TEXT, LorOutput:%TEXT, InFuse:%FF,
             OutPin:%TEXT, TNode:%TEXT, EnableFuse:%SF, TLNode:%TEXT,
	     TSNode:%TEXT, NextPin:%TEXT, PrevPin:%TEXT);
 %CASE %SF2704,%SF2705,%S0
   2:
     LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,
         %InFuse+240,%InFuse+280;LorOutput);
     %IF %XorFuse=0 %THEN
      LINV(LorOutput;TLNode);
      DQFFC(TLNode, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     %ELSE
      DQFFC(LorOutput, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     %END;
     TSB(TNode, L17; OutPin; 1,1,1,1,1,1,1,1);
     BUF(TNode; FeedBack; 1,1,1,1);
  |3:
     LOR(%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,
         %InFuse+280;LorOutput);
     %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 1,1,1,1);
      %ELSE
       BUF(LorOutput; OutPin; 1,1,1,1);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 1,1,1,1);
      %ELSE
       BUF(LorOutput; TNode; 1,1,1,1);
      %END;
      TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
     %END;
     BUF(OutPin; FeedBack; 1,1,1,1);
  |4:
     LOR(%InFuse,%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,
         %InFuse+240,%InFuse+280;LorOutput);
     %IF %XorFuse = 0 %THEN
      INV(LorOutput; OutPin; 1,1,1,1);
     %ELSE
      BUF(LorOutput; OutPin; 1,1,1,1);
     %END;
     BUF(NextPin; FeedBack; 1,1,1,1);
  |5:
     TSB(TSNode, ZERO; OutPin; 1,1,1,1,1,1,1,1);
     BUF(NextPin; FeedBack; 1,1,1,1);
  |7:
   LOR(%InFuse+40,%InFuse+80,%InFuse+120,%InFuse+160,%InFuse+200,%InFuse+240,
       %InFuse+280;LorOutput);
     %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 1,1,1,1);
      %ELSE
       BUF(LorOutput; OutPin; 1,1,1,1);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 1,1,1,1);
      %ELSE
       BUF(LorOutput; TNode; 1,1,1,1);
      %END;
      TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
     %END;
     BUF(PrevPin; FeedBack; 1,1,1,1);
 %END;
%MACEND;

FEEDBACK(N1, N10);

LINV(P13;L17);

V8MAC(%SF2632, %SF2560, N2, L1, %FF00, P22, N11, %SF00, L9, N17, P23, P23);
V8MAC(%SF2633, %SF2561, N3, L2, %FF320, P21, N12, %SF320, L10, N18, P22, P21);
V8MAC(%SF2634, %SF2562, N4, L3, %FF640, P20, N13, %SF640, L11, N19, P21, P20);
V8MAC(%SF2635, %SF2563, N5, L4, %FF960, P19, N14, %SF960, L12, N20, P20, P19);
V8MAC(%SF2636, %SF2564, N6, L5, %FF1280, P18, N15, %SF1280, L13, N21, P17, P18);
V8MAC(%SF2637, %SF2565, N7, L6, %FF1600, P17, N16, %SF1600, L14, N22, P16, P17);
V8MAC(%SF2638, %SF2566, N8, L7, %FF1920, P16, N17, %SF1920, L15, N23, P15, P16);
V8MAC(%SF2639, %SF2567, N9, L8, %FF2240, P15, N18, %SF2240, L16, N24, P14, P14);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20X10
%PartNumber:UDI20X10
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 ~N1 N1 P3 ~P3 ~N2 N2 P4 ~P4 ~N3 N3 P5 ~P5 ~N4 N4
           P6 ~P6 ~N5 N5 P7 ~P7 ~N6 N6 P8 ~P8 ~N7 N7 P9 ~P9 ~N8 N8
           P10 ~P10 ~N9 N9 P11 ~P11 ~N10 N10 *


%MACRO XDFF(InFuse:%FF, TL1:%TEXT, TL2:%TEXT, TL3:%TEXT, TN1:%TEXT, OutPin:%TEXT);
LOR(%InFuse, %InFuse+40; TL1);
LOR(%InFuse+80, %InFuse+120; TL2);
LXOR(TL1, TL2; TL3);
DQFFC(TL3, P1, IPL; TN1; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
ITSB(TN1, L1; OutPin; 1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);

XDFF(%FF00, L2, L3, L4, N1, P23);
XDFF(%FF160, L5, L6, L7, N2, P22);
XDFF(%FF320, L8, L9, L10, N3, P21);
XDFF(%FF480, L11, L12, L13, N4, P20);
XDFF(%FF640, L14, L15, L16, N5, P19);
XDFF(%FF800, L17, L18, L19, N6, P18);
XDFF(%FF960, L20, L21, L22, N7, P17);
XDFF(%FF1120, L23, L24, L25, N8, P16);
XDFF(%FF1280, L26, L27, L28, N9, P15);
XDFF(%FF1440, L29, L30, L31, N10, P14);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20X4
%PartNumber:UDI20X4
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23 P3 ~P3 P22 ~P22 P4 ~P4 P21 ~P21 P5 ~P5 ~N4 N4
           P6 ~P6 ~N5 N5 P7 ~P7 ~N6 N6 P8 ~P8 ~N7 N7 P9 ~P9 P16 ~P16
           P10 ~P10 P15 ~P15 P11 ~P11 P14 ~P14 *

%MACRO NOR3ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; OutPin; 1,1,1,1);
 %ELSE
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; TNode; 1,1,1,1);
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO XDFF(InFuse:%FF, TL1:%TEXT, TL2:%TEXT, TL3:%TEXT, TN1:%TEXT, OutPin:%TEXT);
LOR(%InFuse, %InFuse+40; TL1);
LOR(%InFuse+80, %InFuse+120; TL2);
LXOR(TL1, TL2; TL3);
DQFFC(TL3, P1, IPL; TN1; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
ITSB(TN1, L1; OutPin; 1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);

NOR3ENABLE(%SF00, %FF00, P23, N1);
NOR3ENABLE(%SF160, %FF160, P22, N2);
NOR3ENABLE(%SF320, %FF320, P21, N3);
XDFF(%FF480, L2, L3, L4, N4, P20);
XDFF(%FF640, L5, L6, L7, N5, P19);
XDFF(%FF800, L8, L9, L10, N6, P18);
XDFF(%FF960, L11, L12, L13, N7, P17);
NOR3ENABLE(%SF1120, %FF1120, P16, N8);
NOR3ENABLE(%SF1280, %FF1280, P15, N9);
NOR3ENABLE(%SF1440, %FF1440, P14, N10);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20X8
%PartNumber:UDI20X8
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23 P3 ~P3 ~N2 N2 P4 ~P4 ~N3 N3 P5 ~P5 ~N4 N4
           P6 ~P6 ~N5 N5 P7 ~P7 ~N6 N6 P8 ~P8 ~N7 N7 P9 ~P9 ~N8 N8
           P10 ~P10 ~N9 N9 P11 ~P11 P14 ~P14 *

%MACRO NOR3ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; OutPin; 1,1,1,1);
 %ELSE
  NOR(%InFuse+40, %InFuse+80, %InFuse+120; TNode; 1,1,1,1);
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO XDFF(InFuse:%FF, TL1:%TEXT, TL2:%TEXT, TL3:%TEXT, TN1:%TEXT, OutPin:%TEXT);
LOR(%InFuse, %InFuse+40; TL1);
LOR(%InFuse+80, %InFuse+120; TL2);
LXOR(TL1, TL2; TL3);
DQFFC(TL3, P1, IPL; TN1; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
ITSB(TN1, L1; OutPin; 1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);

NOR3ENABLE(%SF00, %FF00, P23, N1);
XDFF(%FF160,  L2, L3, L4, N2, P22);
XDFF(%FF320,  L5, L6, L7, N3, P21);
XDFF(%FF480, L8, L9, L10, N4, P20);
XDFF(%FF640, L11, L12, L13, N5, P19);
XDFF(%FF800, L14, L15, L16, N6, P18);
XDFF(%FF960, L17, L18, L19, N7, P17);
XDFF(%FF1120,  L20, L21, L22, N8, P16);
XDFF(%FF1280,  L23, L24, L25, N9, P15);
NOR3ENABLE(%SF1440, %FF1440, P14, N10);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20XRP10
%PartNumber:UDI20XRP10
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 ~N1 N1 P3 ~P3 ~N2 N2 P4 ~P4 ~N3 N3 P5 ~P5 ~N4 N4
           P6 ~P6 ~N5 N5 P7 ~P7 ~N6 N6 P8 ~P8 ~N7 N7 P9 ~P9 ~N8 N8
           P10 ~P10 ~N9 N9 P11 ~P11 ~N10 N10 *


%MACRO PXDFF(XorFuse:%SF, InFuse:%FF, TL1:%TEXT, TL2:%TEXT, TL3:%TEXT, TN1:%TEXT, OutPin:%TEXT);
  LOR(%InFuse, %InFuse+40; TL1);
  LOR(%InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200, %InFuse+240, %InFuse+280; TL2);
  %IF %XorFuse=0 %THEN
   LXOR(TL1, TL2; TL3);
  %ELSE
   LXNOR(TL1, TL2; TL3);
  %END;
  DQFFC(TL3, P1, IPL; TN1; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
  ITSB(TN1, L1; OutPin; 1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);

PXDFF(%SF3200, %FF00, L2, L3, L4, N1, P23);
PXDFF(%SF3201, %FF320, L5, L6, L7, N2, P22);
PXDFF(%SF3202, %FF640, L8, L9, L10, N3, P21);
PXDFF(%SF3203, %FF960, L11, L12, L13, N4, P20);
PXDFF(%SF3204, %FF1280, L14, L15, L16, N5, P19);
PXDFF(%SF3205, %FF1600, L17, L18, L19, N6, P18);
PXDFF(%SF3206, %FF1920, L20, L21, L22, N7, P17);
PXDFF(%SF3207, %FF2240, L23, L24, L25, N8, P16);
PXDFF(%SF3208, %FF2560, L26, L27, L28, N9, P15);
PXDFF(%SF3209, %FF2880, L29, L30, L31, N10, P14);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20XRP4
%PartNumber:UDI20XRP4
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23 P3 ~P3 P22 ~P22 P4 ~P4 P21 ~P21 P5 ~P5 ~N4 N4
           P6 ~P6 ~N5 N5 P7 ~P7 ~N6 N6 P8 ~P8 ~N7 N7 P9 ~P9 P16 ~P16
           P10 ~P10 P15 ~P15 P11 ~P11 P14 ~P14 *


%MACRO POR8ENABLE(EnableFuse:%SF, InFuse:%FF, XorFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280, %InFuse+320; OutPin; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280, %InFuse+320; OutPin; 1,1,1,1);
  %END;
 %ELSE
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280, %InFuse+320; TNode; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280, %InFuse+320; TNode; 1,1,1,1);
  %END;
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO PXDFF(XorFuse:%SF, InFuse:%FF, TL1:%TEXT, TL2:%TEXT, TL3:%TEXT, TN1:%TEXT, OutPin:%TEXT);
  LOR(%InFuse, %InFuse+40; TL1);
  LOR(%InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200, %InFuse+240, %InFuse+280; TL2);
  %IF %XorFuse=0 %THEN
   LXOR(TL1, TL2; TL3);
  %ELSE
   LXNOR(TL1, TL2; TL3);
  %END;
  DQFFC(TL3, P1, IPL; TN1; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
  ITSB(TN1, L1; OutPin; 1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);

POR8ENABLE(%SF00, %FF00, %SF3440, P23, N1);
POR8ENABLE(%SF360, %FF360, %SF3441, P22, N2);
POR8ENABLE(%SF720, %FF720, %SF3442, P21, N3);
PXDFF(%SF3443, %FF1080, L2, L3, L4, N4, P20);
PXDFF(%SF3444, %FF1400, L5, L6, L7, N5, P19);
PXDFF(%SF3445, %FF1720, L8, L9, L10, N6, P18);
PXDFF(%SF3446, %FF2040, L11, L12, L13, N7, P17);
POR8ENABLE(%SF2360, %FF2360, %SF3447, P16, N8);
POR8ENABLE(%SF2720, %FF2720, %SF3448, P15, N9);
POR8ENABLE(%SF3080, %FF3080, %SF3449, P14, N10);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20XRP6
%PartNumber:UDI20XRP6
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23 P3 ~P3 P22 ~P22 P4 ~P4 ~N3 N3 P5 ~P5 ~N4 N4
           P6 ~P6 ~N5 N5 P7 ~P7 ~N6 N6 P8 ~P8 ~N7 N7 P9 ~P9 ~N8 N8
           P10 ~P10 P15 ~P15 P11 ~P11 P14 ~P14 *


%MACRO POR8ENABLE(EnableFuse:%SF, InFuse:%FF, XorFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280, %InFuse+320; OutPin; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280, %InFuse+320; OutPin; 1,1,1,1);
  %END;
 %ELSE
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280, %InFuse+320; TNode; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280, %InFuse+320; TNode; 1,1,1,1);
  %END;
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO PXDFF(XorFuse:%SF, InFuse:%FF, TL1:%TEXT, TL2:%TEXT, TL3:%TEXT, TN1:%TEXT, OutPin:%TEXT);
  LOR(%InFuse, %InFuse+40; TL1);
  LOR(%InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200, %InFuse+240, %InFuse+280; TL2);
  %IF %XorFuse=0 %THEN
   LXOR(TL1, TL2; TL3);
  %ELSE
   LXNOR(TL1, TL2; TL3);
  %END;
  DQFFC(TL3, P1, IPL; TN1; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
  ITSB(TN1, L1; OutPin; 1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);

POR8ENABLE(%SF00, %FF00, %SF3360, P23, N1);
POR8ENABLE(%SF360, %FF360, %SF3361, P22, N2);
PXDFF(%SF3362, %FF720,  L2, L3, L4, N3, P21);
PXDFF(%SF3363, %FF1040, L5, L6, L7, N4, P20);
PXDFF(%SF3364, %FF1360, L8, L9, L10, N5, P19);
PXDFF(%SF3365, %FF1680, L11, L12, L13, N6, P18);
PXDFF(%SF3366, %FF2000, L14, L15, L16, N7, P17);
PXDFF(%SF3367, %FF2320, L17, L18, L19, N8, P16);
POR8ENABLE(%SF2640, %FF2640, %SF3368, P15, N9);
POR8ENABLE(%SF3000, %FF3000, %SF3369, P14, N10);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:20XRP8
%PartNumber:UDI20XRP8
%LastNode ? ?
%NumPins:24
%FDF AND 0 P2 ~P2 P23 ~P23 P3 ~P3 ~N2 N2 P4 ~P4 ~N3 N3 P5 ~P5 ~N4 N4
           P6 ~P6 ~N5 N5 P7 ~P7 ~N6 N6 P8 ~P8 ~N7 N7 P9 ~P9 ~N8 N8
           P10 ~P10 ~N9 N9 P11 ~P11 P14 ~P14 *


%MACRO POR8ENABLE(EnableFuse:%SF, InFuse:%FF, XorFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280, %InFuse+320; OutPin; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280, %InFuse+320; OutPin; 1,1,1,1);
  %END;
 %ELSE
  %IF %XorFuse = 0 %THEN
   NOR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280, %InFuse+320; TNode; 1,1,1,1);
  %ELSE
   OR(%InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
     %InFuse+240, %InFuse+280, %InFuse+320; TNode; 1,1,1,1);
  %END;
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO PXDFF(XorFuse:%SF, InFuse:%FF, TL1:%TEXT, TL2:%TEXT, TL3:%TEXT, TN1:%TEXT, OutPin:%TEXT);
  LOR(%InFuse, %InFuse+40; TL1);
  LOR(%InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200, %InFuse+240, %InFuse+280; TL2);
  %IF %XorFuse=0 %THEN
   LXOR(TL1, TL2; TL3);
  %ELSE
   LXNOR(TL1, TL2; TL3);
  %END;
  DQFFC(TL3, P1, IPL; TN1; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
  ITSB(TN1, L1; OutPin; 1,1,1,1,1,1,1,1);
%MACEND;

LINV(P13; L1);

POR8ENABLE(%SF00, %FF00, %SF3280, P23, N1);
PXDFF(%SF3281, %FF360, L2, L3, L4, N2, P22);
PXDFF(%SF3282, %FF680,  L5, L6, L7, N3, P21);
PXDFF(%SF3283, %FF1000, L8, L9, L10, N4, P20);
PXDFF(%SF3284, %FF1320, L11, L12, L13, N5, P19);
PXDFF(%SF3285, %FF1640, L14, L15, L16, N6, P18);
PXDFF(%SF3286, %FF1960, L17, L18, L19, N7, P17);
PXDFF(%SF3287, %FF2280, L20, L21, L22, N8, P16);
PXDFF(%SF3288, %FF2600, L23, L24, L25, N9, P15);
POR8ENABLE(%SF2920, %FF2920, %SF3289, P14, N10);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:22CV10
%PartNumber:UDI22CV10
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P1 ~P1 N1 ~N1 P2 ~P2 N2 ~N2 P3 ~P3 N3 ~N3 P4 ~P4 N4 ~N4 P5 ~P5
     N5 ~N5 P6 ~P6 N6 ~N6 P7 ~P7 N7 ~N7 P8 ~P8 N8 ~N8 P9 ~P9 N9 ~N9
     P10 ~P10 N10 ~N10 P11 ~P11 P13 ~P13 *

%MACRO LOR16(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308,%InFuse+352,%InFuse+396,%InFuse+440,%InFuse+484,
     %InFuse+528,%InFuse+572,%InFuse+616,%InFuse+660; OutLNode);
%MACEND;

%MACRO LOR14(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308,%InFuse+352,%InFuse+396,%InFuse+440,%InFuse+484,
     %InFuse+528,%InFuse+572; OutLNode);
%MACEND;

%MACRO LOR12(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308,%InFuse+352,%InFuse+396,%InFuse+440,
     %InFuse+484; OutLNode);
%MACEND;

%MACRO LOR10(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308,%InFuse+352,%InFuse+396; OutLNode);
%MACEND;

%MACRO LOR8(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308; OutLNode);
%MACEND;

%MACRO V10Mac(S1:%SF, S0:%SF, FeedBack:%TEXT, OrOutput:%TEXT, TNode:%TEXT,
              OutPin:%TEXT, InFuse:%FF, EnableFuse:%SF, TLNode:%TEXT);
 %CASE %S1,%S0
   0:
     LOR(OrOutput, L21; TLNode);
     DQFFC(TLNode, P1, L22; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     INV(TNode; OutPin; 0,0,0,0);
    %ELSE
     ITSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    INV(TNode; FeedBack; 0,0,0,0);
  |1:
     LOR(OrOutput, L21; TLNode);
     DQFFC(TLNode, P1, L22; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    INV(TNode; FeedBack; 0,0,0,0);
  |2:
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     INV(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     INV(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(OutPin; FeedBack; 0,0,0,0);
  |3:
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     BUF(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     BUF(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(OutPin; FeedBack; 0,0,0,0);
  %END;
%MACEND;

LAND(%FF5764; L21);
LNOR(%FF00, IPH; L22);

LOR8(%FF88, L1);
LOR10(%FF484, L2);
LOR12(%FF968, L3);
LOR14(%FF1540, L4);
LOR16(%FF2200, L5);
LOR16(%FF2948, L6);
LOR14(%FF3696, L7);
LOR12(%FF4356, L8);
LOR10(%FF4928, L9);
LOR8(%FF5412, L10);

V10Mac(%SF5809, %SF5808, N1, L1, N11, P23, %FF44, %SF44, L11);
V10Mac(%SF5811, %SF5810, N2, L2, N12, P22, %FF440, %SF440, L12);
V10Mac(%SF5813, %SF5812, N3, L3, N13, P21, %FF924, %SF924, L13);
V10Mac(%SF5815, %SF5814, N4, L4, N14, P20, %FF1496, %SF1496, L14);
V10Mac(%SF5817, %SF5816, N5, L5, N15, P19, %FF2156, %SF2156, L15);
V10Mac(%SF5819, %SF5818, N6, L6, N16, P18, %FF2904, %SF2904, L16);
V10Mac(%SF5821, %SF5820, N7, L7, N17, P17, %FF3652, %SF3652, L17);
V10Mac(%SF5823, %SF5822, N8, L8, N18, P16, %FF4312, %SF4312, L18);
V10Mac(%SF5825, %SF5824, N9, L9, N19, P15, %FF4884, %SF4884, L19);
V10Mac(%SF5827, %SF5826, N10, L10, N20, P14, %FF5368, %SF5368, L20);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:22V10
%PartNumber:UDI22V10
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P1 ~P1 N1 ~N1 P2 ~P2 N2 ~N2 P3 ~P3 N3 ~N3 P4 ~P4 N4 ~N4 P5 ~P5
     N5 ~N5 P6 ~P6 N6 ~N6 P7 ~P7 N7 ~N7 P8 ~P8 N8 ~N8 P9 ~P9 N9 ~N9
     P10 ~P10 N10 ~N10 P11 ~P11 P13 ~P13 *

%MACRO LOR16(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308,%InFuse+352,%InFuse+396,%InFuse+440,%InFuse+484,
     %InFuse+528,%InFuse+572,%InFuse+616,%InFuse+660; OutLNode);
%MACEND;

%MACRO LOR14(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308,%InFuse+352,%InFuse+396,%InFuse+440,%InFuse+484,
     %InFuse+528,%InFuse+572; OutLNode);
%MACEND;

%MACRO LOR12(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308,%InFuse+352,%InFuse+396,%InFuse+440,
     %InFuse+484; OutLNode);
%MACEND;

%MACRO LOR10(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308,%InFuse+352,%InFuse+396; OutLNode);
%MACEND;

%MACRO LOR8(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308; OutLNode);
%MACEND;

%MACRO V10Mac(S1:%SF, S0:%SF, FeedBack:%TEXT, OrOutput:%TEXT, TNode:%TEXT,
              OutPin:%TEXT, InFuse:%FF, EnableFuse:%SF, TLNode:%TEXT);
 %CASE %S1,%S0
   0:
     LOR(OrOutput, L21; TLNode);
     DQFFC(TLNode, P1, L22; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     INV(TNode; OutPin; 0,0,0,0);
    %ELSE
     ITSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    INV(TNode; FeedBack; 0,0,0,0);
  |1:
     LOR(OrOutput, L21; TLNode);
     DQFFC(TLNode, P1, L22; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    INV(TNode; FeedBack; 0,0,0,0);
  |2:
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     INV(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     INV(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(OutPin; FeedBack; 0,0,0,0);
  |3:
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     BUF(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     BUF(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(OutPin; FeedBack; 0,0,0,0);
  %END;
%MACEND;

LAND(%FF5764; L21);
LNOR(%FF00, IPH; L22);

LOR8(%FF88, L1);
LOR10(%FF484, L2);
LOR12(%FF968, L3);
LOR14(%FF1540, L4);
LOR16(%FF2200, L5);
LOR16(%FF2948, L6);
LOR14(%FF3696, L7);
LOR12(%FF4356, L8);
LOR10(%FF4928, L9);
LOR8(%FF5412, L10);

V10Mac(%SF5809, %SF5808, N1, L1, N11, P23, %FF44, %SF44, L11);
V10Mac(%SF5811, %SF5810, N2, L2, N12, P22, %FF440, %SF440, L12);
V10Mac(%SF5813, %SF5812, N3, L3, N13, P21, %FF924, %SF924, L13);
V10Mac(%SF5815, %SF5814, N4, L4, N14, P20, %FF1496, %SF1496, L14);
V10Mac(%SF5817, %SF5816, N5, L5, N15, P19, %FF2156, %SF2156, L15);
V10Mac(%SF5819, %SF5818, N6, L6, N16, P18, %FF2904, %SF2904, L16);
V10Mac(%SF5821, %SF5820, N7, L7, N17, P17, %FF3652, %SF3652, L17);
V10Mac(%SF5823, %SF5822, N8, L8, N18, P16, %FF4312, %SF4312, L18);
V10Mac(%SF5825, %SF5824, N9, L9, N19, P15, %FF4884, %SF4884, L19);
V10Mac(%SF5827, %SF5826, N10, L10, N20, P14, %FF5368, %SF5368, L20);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:22VP10
%PartNumber:UDI22VP10
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P1 ~P1 N1 ~N1 P2 ~P2 N2 ~N2 P3 ~P3 N3 ~N3 P4 ~P4 N4 ~N4 P5 ~P5
     N5 ~N5 P6 ~P6 N6 ~N6 P7 ~P7 N7 ~N7 P8 ~P8 N8 ~N8 P9 ~P9 N9 ~N9
     P10 ~P10 N10 ~N10 P11 ~P11 P13 ~P13 *

%MACRO LOR16(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308,%InFuse+352,%InFuse+396,%InFuse+440,%InFuse+484,
     %InFuse+528,%InFuse+572,%InFuse+616,%InFuse+660; OutLNode);
%MACEND;

%MACRO LOR14(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308,%InFuse+352,%InFuse+396,%InFuse+440,%InFuse+484,
     %InFuse+528,%InFuse+572; OutLNode);
%MACEND;

%MACRO LOR12(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308,%InFuse+352,%InFuse+396,%InFuse+440,
     %InFuse+484; OutLNode);
%MACEND;

%MACRO LOR10(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308,%InFuse+352,%InFuse+396; OutLNode);
%MACEND;

%MACRO LOR8(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+44,%InFuse+88,%InFuse+132,%InFuse+176,%InFuse+220,
     %InFuse+264,%InFuse+308; OutLNode);
%MACEND;

%MACRO REGISTERMac(S2:%SF, S1:%SF, S0:%SF, FeedBack:%TEXT, OrOutput:%TEXT, TNode:%TEXT,
              OutPin:%TEXT, InFuse:%FF, EnableFuse:%SF, TLNode:%TEXT);
 %CASE %S2,%S1,%S0
   0:
     LOR(OrOutput, L21; TLNode);
     DQFFC(TLNode, P1, L22; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     INV(TNode; OutPin; 0,0,0,0);
    %ELSE
     ITSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    INV(TNode; FeedBack; 0,0,0,0);
  |1:
     LOR(OrOutput, L21; TLNode);
     DQFFC(TLNode, P1, L22; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    INV(TNode; FeedBack; 0,0,0,0);
|2,6:
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     INV(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     INV(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(OutPin; FeedBack; 0,0,0,0);
|3,7:
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     BUF(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     BUF(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(OutPin; FeedBack; 0,0,0,0);
  |4:
    LOR(OrOutput, L21; TLNode);
    DQFFC(TLNode, P1, L22; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     INV(TNode; OutPin; 0,0,0,0);
    %ELSE
     ITSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(OutPin; FeedBack; 0,0,0,0);
  |5:
    LOR(OrOutput, L21; TLNode);
    DQFFC(TLNode, P1, L22; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+43 = 1 %THEN
     BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(OutPin; FeedBack; 0,0,0,0);
  %END;
%MACEND;

LAND(%FF5764; L21);
LNOR(%FF00, IPH; L22);

LOR8(%FF88, L1);
LOR10(%FF484, L2);
LOR12(%FF968, L3);
LOR14(%FF1540, L4);
LOR16(%FF2200, L5);
LOR16(%FF2948, L6);
LOR14(%FF3696, L7);
LOR12(%FF4356, L8);
LOR10(%FF4928, L9);
LOR8(%FF5412, L10);

REGISTERMac(%SF5828, %SF5809, %SF5808, N1, L1, N11, P23, %FF44, %SF44, L11);
REGISTERMac(%SF5829, %SF5811, %SF5810, N2, L2, N12, P22, %FF440, %SF440, L12);
REGISTERMac(%SF5830, %SF5813, %SF5812, N3, L3, N13, P21, %FF924, %SF924, L13);
REGISTERMac(%SF5831, %SF5815, %SF5814, N4, L4, N14, P20, %FF1496, %SF1496, L14);
REGISTERMac(%SF5832, %SF5817, %SF5816, N5, L5, N15, P19, %FF2156, %SF2156, L15);
REGISTERMac(%SF5833, %SF5819, %SF5818, N6, L6, N16, P18, %FF2904, %SF2904, L16);
REGISTERMac(%SF5834, %SF5821, %SF5820, N7, L7, N17, P17, %FF3652, %SF3652, L17);
REGISTERMac(%SF5835, %SF5823, %SF5822, N8, L8, N18, P16, %FF4312, %SF4312, L18);
REGISTERMac(%SF5836, %SF5825, %SF5824, N9, L9, N19, P15, %FF4884, %SF4884, L19);
REGISTERMac(%SF5837, %SF5827, %SF5826, N10, L10, N20, P14, %FF5368, %SF5368, L20);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:24L10
%PartNumber:UDI24L10
%LastNode ? ?
%NumPins:28
%FDF AND 0 P2 ~P2 P28 ~P28 P3 ~P3 P27 ~P27 P4 ~P4 P1 ~P1 P5 ~P5 P25 ~P25
     P6 ~P6 P24 ~P24 P8 ~P8 P23 ~P23 P9 ~P9 P22 ~P22 P10 ~P10 P20 ~P20
     P11 ~P11 P19 ~P19 P12 ~P12 P18 ~P18 P13 ~P13 P17 ~P17 P14 ~P14
     P15 ~P15*

%MACRO NOR7ENABLE(EnableFuse:%SF, InFuse:%FF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+47 = 1 %THEN
  NOR(%InFuse+48, %InFuse+96, %InFuse+144, %InFuse+192, %InFuse+240,
      %InFuse+288, %InFuse+336; OutPin; 1,1,1,1);
 %ELSE
  NOR(%InFuse+48, %InFuse+96, %InFuse+144, %InFuse+192, %InFuse+240,
      %InFuse+288, %InFuse+336; OutPin; 1,1,1,1);
  TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

NOR7ENABLE(%SF00, %FF00, P26, N1);
NOR7ENABLE(%SF384, %FF384, P25, N2);
NOR7ENABLE(%SF768, %FF768, P24, N3);
NOR7ENABLE(%SF1152, %FF1152, P23, N4);
NOR7ENABLE(%SF1536, %FF1536, P22, N5);
NOR7ENABLE(%SF1920, %FF1920, P20, N6);
NOR7ENABLE(%SF2304, %FF2304, P19, N7);
NOR7ENABLE(%SF2688, %FF2688, P18, N8);
NOR7ENABLE(%SF3072, %FF3072, P17, N9);
NOR7ENABLE(%SF3456, %FF3456, P16, N10);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:24R10
%PartNumber:UDI24R10
%LastNode ? ?
%NumPins:28
%FDF AND 0 P2 ~P2 P28 ~P28 P3 ~P3 P27 ~P27 P4 ~P4 N1 ~N1 P5 ~P5 N2 ~N2
   P6 ~P6 N3 ~N3 P8 ~P8 N4 ~N4 P9 ~P9 N5 ~N5 P10 ~P10 N6 ~N6 P11 ~P11
   N7 ~N7 P12 ~P12 N8 ~N8 P13 ~P13 N9 ~N9 P14 ~P14 N10 ~N10*

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
  LNOR(%InFuse, %InFuse+48, %InFuse+96, %InFuse+144, %InFuse+192, %InFuse+240,
       %InFuse+288, %InFuse+336;TLNode);
  DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
  TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

LINV(P15; L1);
NOR8DFF(%FF00, N1, L2, P26);
NOR8DFF(%FF384, N2, L3, P25);
NOR8DFF(%FF768, N3, L4, P24);
NOR8DFF(%FF1152, N4, L5, P23);
NOR8DFF(%FF1536, N5, L6, P22);
NOR8DFF(%FF1920, N6, L7, P20);
NOR8DFF(%FF2304, N7, L8, P19);
NOR8DFF(%FF2688, N8, L10, P18);
NOR8DFF(%FF3072, N9, L11, P17);
NOR8DFF(%FF3456, N10, L12, P16);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:24R4
%PartNumber:UDI24R4
%LastNode ? ?
%NumPins:28
%FDF AND 0 P2 ~P2 P28 ~P28 P3 ~P3 P27 ~P27 P4 ~P4 P26 ~P26 P5 ~P5 P25 P6 ~P6
   P24 ~P24 P8 ~P8 N1 ~N1 P9 ~P9 N2 ~N2 P10 ~P10 N3 ~N3 P11 ~P11 N4 ~N4
   P12 ~P12 P18 ~P18 P13 ~P13 P17 ~P17 P14 ~P14 P16 ~P16*

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
  LNOR(%InFuse, %InFuse+48, %InFuse+96, %InFuse+144, %InFuse+192, %InFuse+240,
      %InFuse+288, %InFuse+336; TLNode);
  DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
  TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

%MACRO NOR7ENABLE(InFuse:%FF, EnableFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+47 = 1 %THEN
   NOR(%InFuse+48, %InFuse+96, %InFuse+144, %InFuse+192, %InFuse+240,
      %InFuse+288, %InFuse+336; OutPin; 1,1,1,1);
 %ELSE
   NOR(%InFuse+48, %InFuse+96, %InFuse+144, %InFuse+192, %InFuse+240,
      %InFuse+288, %InFuse+336; OutPin; 1,1,1,1);
   TSB(TNode, %InFuse; OutPin;1,1,1,1,1,1,1,1);
 %END;
%MACEND;

LINV(P15; L1);
NOR7ENABLE(%FF00, %SF00, P26, N5);
NOR7ENABLE(%FF384, %SF384, P25, N6);
NOR7ENABLE(%FF768, %SF768, P24, N7);
NOR8DFF(%FF1152, N1, L2, P23);
NOR8DFF(%FF1536, N2, L3, P22);
NOR8DFF(%FF1920, N3, L4, P20);
NOR8DFF(%FF2304, N4, L5, P19);
NOR7ENABLE(%FF2688, %SF2688, P18, N8);
NOR7ENABLE(%FF3072, %SF3072, P17, N9);
NOR7ENABLE(%FF3456, %SF3456, P16, N10);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:24R8
%PartNumber:UDI24R8
%LastNode ? ?
%NumPins:28
%FDF AND 0 P2 ~P2 P28 ~P28 P3 ~P3 P27 ~P27 P4 ~P4 P26 ~P26 P5 ~P5 N1 ~N1
   P6 ~P6 N2 ~N2 P8 ~P8 N3 ~N3 P9 ~P9 N4 ~N4 P10 ~P10 N5 ~N5 P11 ~P11
   N6 ~N6 P12 ~P12 N7 ~N7 P13 ~P13 N8 ~N8 P14 ~P14 P16 ~P16 *

%MACRO NOR7ENABLE(InFuse:%FF, EnableFuse:%SF, OutPin:%TEXT, TNode:%TEXT);
 %IF %EnableFuse..%EnableFuse+47 = 1 %THEN
   NOR(%InFuse+48, %InFuse+96, %InFuse+144, %InFuse+192, %InFuse+240,
      %InFuse+288, %InFuse+336; OutPin; 1,1,1,1);
 %ELSE
   NOR(%InFuse+48, %InFuse+96, %InFuse+144, %InFuse+192, %InFuse+240,
      %InFuse+288, %InFuse+336; TNode; 1,1,1,1);
   TSB(TNode, %InFuse; OutPin;1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO NOR8DFF(InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
  LNOR(%InFuse, %InFuse+48, %InFuse+96, %InFuse+144, %InFuse+192, %InFuse+240,
      %InFuse+288, %InFuse+336; TLNode);
  DQFFC(TLNode,P1,IPL;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
  TSB(NodeInp,L1;OutPin;1,1,1,1,1,1,1,1);
%MACEND;

LINV(P15; L1);

NOR7ENABLE(%FF00, %SF00, P26, N9);
NOR8DFF(%FF384, N1, L2, P25);
NOR8DFF(%FF768, N2, L3, P24);
NOR8DFF(%FF1152, N3, L4, P23);
NOR8DFF(%FF1536, N4, L5, P22);
NOR8DFF(%FF1920, N5, L6, P20);
NOR8DFF(%FF2304, N6, L7, P19);
NOR8DFF(%FF2688, N7, L8, P18);
NOR8DFF(%FF3072, N8, L9, P17);
NOR7ENABLE(%FF3456, %SF3456, P16, N10);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:24V10
%PartNumber:UDI24V10
%LastNode ? ?
%NumPins: 28
%FDF AND 0 P2 ~P2 P28 ~P28 P3 ~P3 P27 ~P27 P4 ~P4 N1 ~N1 P5 ~P5 N2 ~N2 P6 ~P6
     N3 ~N3 P8 ~P8 N4 ~N4 P9 ~P9 N5 ~N5 P10 ~P10 N6 ~N6 P11 ~P11 N7 ~N7 P12 ~P12
     N8 ~N8 P13 ~P13 N9 ~N9 P14 ~P14 N10 ~N10 *

%MACRO 24V10MAC(S0:%SF, XorFuse:%SF, FeedBack:%TEXT, LorOutput:%TEXT, InFuse:%FF,
             OutPin:%TEXT, TNode:%TEXT, EnableFuse:%SF, TLNode:%TEXT,
	     TSNode:%TEXT, NextPin:%TEXT);

%CASE %SF3860,%SF3861,%S0
   2:
     LOR(%InFuse,%InFuse+48,%InFuse+96,%InFuse+144,%InFuse+192,%InFuse+240,
         %InFuse+288,%InFuse+336;LorOutput);
     %IF %XorFuse=0 %THEN
      LINV(LorOutput;TLNode);
      DQFFC(TLNode, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     %ELSE
      DQFFC(LorOutput, P1, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     %END;
     TSB(TNode, L21; OutPin; 1,1,1,1,1,1,1,1);
     BUF(TNode; FeedBack; 0,0,0,0);
  |3:
     LOR(%InFuse+48,%InFuse+96,%InFuse+144,%InFuse+192,%InFuse+240,
         %InFuse+288,%InFuse+336;LorOutput);
     %IF %EnableFuse..%EnableFuse+47 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 1,1,1,1);
      %ELSE
       BUF(LorOutput; OutPin; 1,1,1,1);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 1,1,1,1);
      %ELSE
       BUF(LorOutput; TNode; 1,1,1,1);
      %END;
      TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
     %END;
     BUF(OutPin; FeedBack; 0,0,0,0);
  |4:
     LOR(%InFuse,%InFuse+48,%InFuse+96,%InFuse+144,%InFuse+192,%InFuse+240,
         %InFuse+288,%InFuse+336;LorOutput);
     %IF %XorFuse = 0 %THEN
      INV(LorOutput; OutPin; 1,1,1,1);
     %ELSE
      BUF(LorOutput; OutPin; 1,1,1,1);
     %END;
     BUF(ZERO; FeedBack; 0,0,0,0);
  |5:
     TSB(TSNode, ZERO; OutPin; 1,1,1,1,1,1,1,1);
     BUF(NextPin; FeedBack; 0,0,0,0);
  |7:
     LOR(%InFuse+48,%InFuse+96,%InFuse+144,%InFuse+192,%InFuse+240,
         %InFuse+288,%InFuse+336;LorOutput);
     %IF %EnableFuse..%EnableFuse+47 = 1 %THEN
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; OutPin; 1,1,1,1);
      %ELSE
       BUF(LorOutput; OutPin; 1,1,1,1);
      %END;
     %ELSE
      %IF %XorFuse = 0 %THEN
       INV(LorOutput; TNode; 1,1,1,1);
      %ELSE
       BUF(LorOutput; TNode; 1,1,1,1);
      %END;
      TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
     %END;
     BUF(NextPin; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LINV(P15;L21);

24V10MAC(%SF3850, %SF3840, N1, L1, %FF00, P26, N11, %SF00, L11, N21, P1);
24V10MAC(%SF3851, %SF3841, N2, L2, %FF384, P25, N12, %SF384, L12, N22, P25);
24V10MAC(%SF3852, %SF3842, N3, L3, %FF768, P24, N13, %SF768, L13, N23, P24);
24V10MAC(%SF3853, %SF3843, N4, L4, %FF1152, P23, N14, %SF1152, L14, N24, P23);
24V10MAC(%SF3854, %SF3844, N5, L5, %FF1536, P22, N15, %SF1536, L15, N25, P22);
24V10MAC(%SF3855, %SF3845, N6, L6, %FF1920, P20, N16, %SF1920, L16, N26, P20);
24V10MAC(%SF3856, %SF3846, N7, L7, %FF2304, P19, N17, %SF2304, L17, N27, P19);
24V10MAC(%SF3857, %SF3847, N8, L8, %FF2688, P18, N18, %SF2688, L18, N28, P18);
24V10MAC(%SF3858, %SF3848, N9, L9, %FF3072, P17, N19, %SF3072, L19, N29, P17);
24V10MAC(%SF3859, %SF3849, N10, L10, %FF3456, P16, N20, %SF3456, L20, N30, P15);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:26CV12
%PartNumber:UDI26CV12
%LastNode ? ?
%NumPins: 28
%FDF AND 0 P1 ~P1 P28 ~P28 P2 ~P2 N1 ~N1 P3 ~P3 N2 ~N2 P4 ~P4 N3 ~N3 P5 ~P5
     N4 ~N4 P6 ~P6 N5 ~N5 P8 ~P8 N6 ~N6 P9 ~P9 N7 ~N7 P10 ~P10 N8 ~N8
     P11 ~P11 N9 ~N9 P12 ~P12 N10 ~N10 P13 ~P13 N11 ~N11 P14 ~P14 N12 ~N12 *

%MACRO LOR12(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+52,%InFuse+104,%InFuse+156,%InFuse+208,%InFuse+260,
     %InFuse+312,%InFuse+364,%InFuse+416,%InFuse+468,%InFuse+520,
     %InFuse+572; OutLNode);
%MACEND;

%MACRO LOR10(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+52,%InFuse+104,%InFuse+156,%InFuse+208,%InFuse+260,
     %InFuse+312,%InFuse+364,%InFuse+416,%InFuse+468; OutLNode);
%MACEND;

%MACRO LOR8(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+52,%InFuse+104,%InFuse+156,%InFuse+208,%InFuse+260,
     %InFuse+312,%InFuse+364; OutLNode);
%MACEND;

%MACRO V12Mac(S1:%SF, S0:%SF, FeedBack:%TEXT, OrOutput:%TEXT, TNode:%TEXT,
              OutPin:%TEXT, InFuse:%FF, EnableFuse:%SF, TLNode:%TEXT);
 %CASE %S1,%S0
   0:
     LOR(OrOutput, L25; TLNode);
     DQFFC(TLNode, P1, L26; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+51 = 1 %THEN
     INV(TNode; OutPin; 0,0,0,0);
    %ELSE
     ITSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    INV(TNode; FeedBack; 0,0,0,0);
  |1:
     LOR(OrOutput, L25; TLNode);
     DQFFC(TLNode, P1, L26; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+51 = 1 %THEN
     BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    INV(TNode; FeedBack; 0,0,0,0);
  |2:
    %IF %EnableFuse..%EnableFuse+51 = 1 %THEN
     INV(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     INV(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(OutPin; FeedBack; 0,0,0,0);
  |3:
    %IF %EnableFuse..%EnableFuse+51 = 1 %THEN
     BUF(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     BUF(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(OutPin; FeedBack; 0,0,0,0);
  %END;
%MACEND;

LAND(%FF6292; L25);
LNOR(%FF00, IPH; L26);

LOR8(%FF104, L1);
LOR8(%FF572, L2);
LOR8(%FF1040, L3);
LOR8(%FF1508, L4);
LOR10(%FF1976, L5);
LOR12(%FF2548, L6);
LOR12(%FF3224, L7);
LOR10(%FF3900, L8);
LOR8(%FF4472, L9);
LOR8(%FF4940, L10);
LOR8(%FF5408,L11);
LOR8(%FF5876,L12);

V12Mac(%SF6345, %SF6344, N1, L1, N13, P27, %FF52, %SF52, L13);
V12Mac(%SF6347, %SF6346, N2, L2, N14, P26, %FF520, %SF520, L14);
V12Mac(%SF6349, %SF6348, N3, L3, N15, P25, %FF988, %SF988, L15);
V12Mac(%SF6351, %SF6350, N4, L4, N16, P24, %FF1456, %SF1456, L16);
V12Mac(%SF6353, %SF6352, N5, L5, N17, P23, %FF1924, %SF1924, L17);
V12Mac(%SF6355, %SF6354, N6, L6, N18, P22, %FF2496, %SF2496, L18);
V12Mac(%SF6357, %SF6356, N7, L7, N19, P20, %FF3172, %SF3172, L19);
V12Mac(%SF6359, %SF6358, N8, L8, N20, P19, %FF3848, %SF3848, L20);
V12Mac(%SF6361, %SF6360, N9, L9, N21, P18, %FF4420, %SF4420, L21);
V12Mac(%SF6363, %SF6362, N10, L10, N22, P17, %FF4888, %SF4888, L22);
V12Mac(%SF6365, %SF6364, N11, L11, N23, P16, %FF5356, %SF5356, L23);
V12Mac(%SF6367, %SF6366, N12, L12, N24, P15, %FF5824, %SF5824, L24);

%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:ATV750
%PartNumber:UDIATV750
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P13 P13 ~P11 P11 N19 ~N19 N20 ~N20 ~P14 P14 ~P10 P10 N17 ~N17
     N18 ~N18 ~P15 P15 ~P9 P9 N15 ~N15 N16 ~N16 ~P16 P16 ~P8 P8 N13 ~N13
     N14 ~N14 ~P17 P17 ~P7 P7 N11 ~N11 N12 ~N12 ~P18 P18 ~P6 P6 N9 ~N9
     N10 ~N10 ~P19 P19 ~P5 P5 N7 ~N7 N8 ~N8 ~P20 P20 ~P4 P4 N5 ~N5 N6 ~N6
     ~P21 P21 ~P3 P3 N3 ~N3 N4 ~N4 ~P22 P22 ~P2 P2 N1 ~N1 N2 ~N2 ~P23 P23
     ~P1 P1*

%MACRO LOR8(InFuse:%FF, OrOutput1:%TEXT, OrOutput2:%TEXT);
 LOR(%InFuse,%InFuse+84,%InFuse+168,%InFuse+252,%InFuse+336,%InFuse+420,
     %InFuse+504,%InFuse+588; OrOutput1);
 LOR(%InFuse+672,%InFuse+756,%InFuse+840,%InFuse+924,%InFuse+1008,%InFuse+1092,
     %InFuse+1176,%InFuse+1260; OrOutput2);
%MACEND;

%MACRO LOR7(InFuse:%FF, OrOutput1:%TEXT, OrOutput2:%TEXT);
 LOR(%InFuse,%InFuse+84,%InFuse+168,%InFuse+252,%InFuse+336,%InFuse+420,
     %InFuse+504; OrOutput1);
 LOR(%InFuse+588,%InFuse+672,%InFuse+756,%InFuse+840,%InFuse+924,%InFuse+1008,
     %InFuse+1092; OrOutput2);
%MACEND;

%MACRO LOR6(InFuse:%FF, OrOutput1:%TEXT, OrOutput2:%TEXT);
 LOR(%InFuse,%InFuse+84,%InFuse+168,%InFuse+252,%InFuse+336,%InFuse+420;
     OrOutput1);
 LOR(%InFuse+504,%InFuse+588,%InFuse+672,%InFuse+756,%InFuse+840,%InFuse+924;
     OrOutput2);
%MACEND;

%MACRO LOR5(InFuse:%FF, OrOutput1:%TEXT, OrOutput2:%TEXT);
 LOR(%InFuse,%InFuse+84,%InFuse+168,%InFuse+252,%InFuse+336; OrOutput1);
 LOR(%InFuse+420,%InFuse+504,%InFuse+588,%InFuse+672,%InFuse+756; OrOutput2);
%MACEND;

%MACRO LOR4(InFuse:%FF, OrOutput1:%TEXT, OrOutput2:%TEXT);
 LOR(%InFuse,%InFuse+84,%InFuse+168,%InFuse+252; OrOutput1);
 LOR(%InFuse+336,%InFuse+420,%InFuse+504,%InFuse+588; OrOutput2);
%MACEND;

%MACRO RegisterFeedBack(Reg1Clock:%FF, Reg2Clock:%FF, Clock1:%TEXT,
       Clock2:%TEXT, ARFuse1:%FF, ARFuse2:%FF, Reset1:%TEXT, Reset2:%TEXT,
       OrNode:%TEXT, OrOutput2:%TEXT, TRegNode1:%TEXT, TRegNode2:%TEXT,
       FeedBack1:%TEXT, FeedBack2:%TEXT);

     AND(Reg1Clock; Clock1; 0,0,0,0);
     AND(Reg2Clock; Clock2; 0,0,0,0);
     LNOR(ARFuse1, IPH; Reset1);
     LNOR(ARFuse2, IPH; Reset2);

     DQFFC(OrNode, Clock1, Reset1; TRegNode1; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     DQFFC(OrOutput2, Clock2, Reset2; TRegNode2; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
     BUF(TRegNode1; FeedBack1; 0,0,0,0);
     BUF(TRegNode2; FeedBack2; 0,0,0,0);
%MACEND;

%MACRO ATV750(OrOutput1:%TEXT, OrOutput2:%TEXT, OrNode:%TEXT, EnableFuse:%SF,
       TRegNode1:%TEXT, OutPin:%TEXT, InFuse:%FF, TNode:%TEXT, S0:%SF);
%CASE %S0+2, %S0+1, %S0
   0:
     OR(OrOutput1, OrOutput2, L41; OrNode; 0,0,0,0);
    %IF %EnableFuse..%EnableFuse+83 = 1 %THEN
     INV(TRegNode1; OutPin; 0,0,0,0);
    %ELSE
     ITSB(TRegNode1, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
  |1:
     OR(OrOutput1, OrOutput2, L41; OrNode; 0,0,0,0);
    %IF %EnableFuse..%EnableFuse+83 = 1 %THEN
     NOR(OrOutput1, OrOutput2; OutPin; 1,1,1,1);
    %ELSE
     NOR(OrOutput1, OrOutput2; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
  |2:
    OR(OrOutput1, L41; OrNode; 0,0,0,0);
    %IF %EnableFuse..%EnableFuse+83 = 1 %THEN
     INV(TRegNode1; OutPin; 0,0,0,0);
    %ELSE
     ITSB(TRegNode1, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
  |3:
    OR(OrOutput1, L41; OrNode; 0,0,0,0);
    %IF %EnableFuse..%EnableFuse+83 = 1 %THEN
     INV(OrOutput1; OutPin; 1,1,1,1);
    %ELSE
     INV(OrOutput1; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
  |4:
     OR(OrOutput1, OrOutput2, L41; OrNode; 0,0,0,0);
    %IF %EnableFuse..%EnableFuse+83 = 1 %THEN
     BUF(TRegNode1; OutPin; 0,0,0,0);
    %ELSE
     TSB(TRegNode1, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
  |5:
     OR(OrOutput1, OrOutput2, L41; OrNode; 0,0,0,0);
    %IF %EnableFuse..%EnableFuse+83 = 1 %THEN
     OR(OrOutput1, OrOutput2; OutPin; 1,1,1,1);
    %ELSE
     OR(OrOutput1, OrOutput2; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
  |6:
    OR(OrOutput1, L41; OrNode; 0,0,0,0);
    %IF %EnableFuse..%EnableFuse+83 = 1 %THEN
     BUF(TRegNode1; OutPin; 0,0,0,0);
    %ELSE
     TSB(TRegNode1, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
  |7:
    OR(OrOutput1, L41; OrNode; 0,0,0,0);
    %IF %EnableFuse..%EnableFuse+83 = 1 %THEN
     BUF(OrOutput1; OutPin; 1,1,1,1);
    %ELSE
     BUF(OrOutput1; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
  %END;
%MACEND;

LAND(%FF14280; L41);

LOR4(%FF00,L1, L11);
LOR5(%FF1092,L2, L12);
LOR6(%FF2352,L3, L13);
LOR7(%FF3780,L4, L14);
LOR8(%FF5376,L5, L15);
LOR8(%FF7140,L6, L16);
LOR7(%FF8904,L7, L17);
LOR6(%FF10500,L8, L18);
LOR5(%FF11928,L9, L19);
LOR4(%FF13188,L10, L20);

RegisterFeedBack(%FF756, %FF840, N21, N31, %FF672, %FF924, L21, L31, N41,
L11, N51, N61, N2, N1);
RegisterFeedBack(%FF2016, %FF2100, N22, N32, %FF1932, %FF2184, L22, L32, N42,
L12, N52, N62, N4, N3);
RegisterFeedBack(%FF3444, %FF3528, N23, N33, %FF3380, %FF3812, L23, L33, N43,
L13, N53, N63, N6, N5);
RegisterFeedBack(%FF5040, %FF5124, N24, N34, %FF4956, %FF5208, L24, L34, N44,
L14, N54, N64, N8, N7);
RegisterFeedBack(%FF6804, %FF6888, N25, N35, %FF6720, %FF6972, L25, L35, N45,
L15, N55, N65, N10, N9);
RegisterFeedBack(%FF8588, %FF8652, N26, N36, %FF8484, %FF8736, L26, L36, N46,
L16, N56, N66, N12, N11);
RegisterFeedBack(%FF10164, %FF10248, N27, N37, %FF10080, %FF10332, L27, L37, N47,
L17, N57, N67, N14, N13);
RegisterFeedBack(%FF11592, %FF11676, N28, N38, %FF11508, %FF11760, L28, L38, N48,
L18, N58, N68, N16, N15);
RegisterFeedBack(%FF12852, %FF12936, N29, N39, %FF12768, %FF13020, L29, L39, N49,
L19, N59, N69, N18, N17);
RegisterFeedBack(%FF13944, %FF14028, N30, N40, %FF13860, %FF14112, L30, L40, N50,
L20, N60, N70, N20, N19);

ATV750(L1, L11, N41, %SF1008, N51, P23, %FF1008, N71, %SF14364);
ATV750(L2, L12, N42, %SF2268, N52, P22, %FF2268, N72, %SF14367);
ATV750(L3, L13, N43, %SF3696, N53, P21, %FF3696, N73, %SF14370);
ATV750(L4, L14, N44, %SF5292, N54, P20, %FF5292, N74, %SF14373);
ATV750(L5, L15, N45, %SF7056, N55, P19, %FF7056, N75, %SF14376);
ATV750(L6, L16, N46, %SF8820, N56, P18, %FF8820, N76, %SF14379);
ATV750(L7, L17, N47, %SF10416, N57, P17, %FF10416, N77, %SF14382);
ATV750(L8, L18, N48, %SF11844, N58, P16, %FF11844, N78, %SF14385);
ATV750(L9, L19, N49, %SF13104, N59, P15, %FF13104, N79, %SF14388);
ATV750(L10, L20, N50, %SF14196, N60, P14, %FF14196, N80, %SF14391);

%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:CY7C330
%PartNumber:UDICY7C330
%LastNode ? ?
%NumPins: 28
%FDF AND 0 N23 ~N23 N24 ~N24 N25 ~N25 N26 ~N26 N27 ~N27 N28 ~N28 N29 ~N29
           N30 ~N30 N31 ~N31 N32 ~N32 N33 ~N33 ~N1 N1 ~N13 N13 ~N2 N2 ~N3 N3
	   ~N14 N14 ~N4 N4 ~N5 N5 ~N15 N15 ~N6 N6 ~N19 N19 ~N20 N20 ~N7 N7
	   ~N16 N16 ~N8 N8 ~N21 N21 ~N22 N22 ~N9 N9 ~N17 N17 ~N10 N10 ~N11 N11
	   ~N18 N18 ~N12 N12 *

%MACRO LOR19(InFuse:%FF, LorOutput:%TEXT);
 LOR(%InFuse,%InFuse+66,%InFuse+132,%InFuse+198,%InFuse+264,%InFuse+330,
     %InFuse+396,%InFuse+462,%InFuse+528,%InFuse+594,%InFuse+660,%InFuse+726,
     %InFuse+792,%InFuse+858,%InFuse+924,%InFuse+990,%InFuse+1056,%InFuse+1122,
     %InFuse+1188; LorOutput);
%MACEND;

%MACRO LOR17(InFuse:%FF, LorOutput:%TEXT);
 LOR(%InFuse,%InFuse+66,%InFuse+132,%InFuse+198,%InFuse+264,%InFuse+330,
     %InFuse+396,%InFuse+462,%InFuse+528,%InFuse+594,%InFuse+660,%InFuse+726,
     %InFuse+792,%InFuse+858,%InFuse+924,%InFuse+990,%InFuse+1056; LorOutput);
%MACEND;

%MACRO LOR15(InFuse:%FF, LorOutput:%TEXT);
 LOR(%InFuse,%InFuse+66,%InFuse+132,%InFuse+198,%InFuse+264,%InFuse+330,
     %InFuse+396,%InFuse+462,%InFuse+528,%InFuse+594,%InFuse+660,%InFuse+726,
     %InFuse+792,%InFuse+858,%InFuse+924; LorOutput);
%MACEND;

%MACRO LOR13(InFuse:%FF, LorOutput:%TEXT);
 LOR(%InFuse,%InFuse+66,%InFuse+132,%InFuse+198,%InFuse+264,%InFuse+330,
     %InFuse+396,%InFuse+462,%InFuse+528,%InFuse+594,%InFuse+660,%InFuse+726,
     %InFuse+792; LorOutput);
%MACEND;

%MACRO LOR11(InFuse:%FF, LorOutput:%TEXT);
 LOR(%InFuse,%InFuse+66,%InFuse+132,%InFuse+198,%InFuse+264,%InFuse+330,
     %InFuse+396,%InFuse+462,%InFuse+528,%InFuse+594,%InFuse+660; LorOutput);
%MACEND;

%MACRO LOR9(InFuse:%FF, LorOutput:%TEXT);
 LOR(%InFuse,%InFuse+66,%InFuse+132,%InFuse+198,%InFuse+264,%InFuse+330,
     %InFuse+396,%InFuse+462,%InFuse+528; LorOutput);
%MACEND;

%MACRO INPUTMac(S4:%SF, InPin:%TEXT, TNode:%TEXT);

 %IF %SF17070 = 0 %THEN
   DQFFC(InPin, P2, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 %ELSE
   %IF %S4 = 0 %THEN
     DQFF(InPin, P2, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   %ELSE
     DQFF(InPin, P3, IPL; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   %END;
  %END;

%MACEND;

%MACRO INPUTREGMac(S2:%SF, OutPin:%TEXT, OutInReg:%TEXT);

 %IF %S2 = 0 %THEN
    DQFFC(OutPin, P2, IPL; OutInReg; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 %ELSE
    DQFFC(OutPin, P3, IPL; OutInReg; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 %END;

%MACEND;

%MACRO HIDDENMac(LorOutput:%TEXT, XorFuse:%SF, XorOutput:%TEXT,
                 TLNode1:%TEXT, TLNode2:%TEXT, TLNode:%TEXT,
		 HiddenRegOutput:%TEXT, FeedBack:%TEXT);
 %IF %XorFuse..%XorFuse+65 = 1 %THEN
   LNOR(LorOutput; XorOutput);
 %ELSE
   LOR(LorOutput; XorOutput);
 %END;
 LAND(XorOutput, L2; TLNode1);
 LAND(XorOutput, L1; TLNode2);
 LOR(TLNode1, TLNode2, L3; TLNode);
 DQFFC(TLNode, P1, IPL; HiddenRegOutput;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 INV(HiddenRegOutput; FeedBack; 1,1,1,1);

%MACEND;

%MACRO 330Mac(S0:%SF, LorOutput:%TEXT, InFuse:%FF, XorOutput:%TEXT,
              TLNode1:%TEXT, TLNode2:%TEXT, RegInput:%TEXT,
	      RegOutput:%TEXT, TLNode:%TEXT, Outpin:%TEXT, OutInReg:%TEXT,
	      FeedBack:%TEXT, Output:%TEXT, Enable:%TEXT, EnableFuse:%SF,
	      XorFuse:%SF);

 %IF %XorFuse..%XorFuse+65 = 1 %THEN
    LINV(LorOutput; XorOutput);
    LAND(XorOutput, L2; TLNode1);
    LAND(XorOutput, L1; TLNode2);
    LOR(TLNode1, TLNode2, L3; RegInput);
 %ELSE
    LAND(LorOutput, L2; TLNode1);
    LAND(LorOutput, L1; TLNode2);
    LOR(TLNode1, TLNode2, L3; RegInput);
 %END;
    DQFFC(RegInput, P1, IPL; RegOutput; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);

 %IF %S0+1 = 0 %THEN
    INV(RegOutput; FeedBack; 1,1,1,1);
 %ELSE
    BUF(OutInReg; FeedBack; 1,1,1,1);
 %END;

 %IF %S0 = 0 %THEN
    %IF %EnableFuse..%EnableFuse+65 = 1 %THEN
     INV(RegOutput; Outpin; 1,1,1,1);
    %ELSE
     BUF(RegOutput; Output; 1,1,1,1);
     AND(%InFuse; Enable; 1,1,1,1);
     ITSB(Output, Enable; Outpin; 1,1,1,1,1,1,1,1);
    %END;
 %ELSE
    BUF(RegOutput; Output; 1,1,1,1);
    ITSB(Output, L4; Outpin; 1,1,1,1,1,1,1,1);
 %END;

%MACEND;


%MACRO SHAREDMUXMac(S3:%SF, OutInReg:%TEXT, SharedInput:%TEXT, NextOutInReg:%TEXT);

 %IF %S3 = 0 %THEN
    BUF(OutInReg; SharedInput; 1,1,1,1);
 %ELSE
    BUF(NextOutInReg; SharedInput; 1,1,1,1);
 %END;

%MACEND;


LNAND(%FF00; L1);
LAND(%FF16962; L2);
LAND(L1,L2;L3);
LINV(P14;L4);

LOR9(%FF198, L5);
LOR19(%FF924, L6);
LOR11(%FF2310, L7);
LOR17(%FF3168, L8);
LOR13(%FF4422, L9);
LOR15(%FF5412, L10);
LOR19(%FF6468, L11);
LOR11(%FF7788, L12);
LOR15(%FF8646, L13);
LOR13(%FF9768, L14);
LOR17(%FF10692, L15);
LOR13(%FF11880, L16);
LOR17(%FF12870, L17);
LOR11(%FF14124, L18);
LOR19(%FF14982, L19);
LOR9(%FF16368, L20);

INPUTMac(%SF17071, P3, N23);
INPUTMac(%SF17072, P4, N24);
INPUTMac(%SF17073, P5, N25);
INPUTMac(%SF17074, P6, N26);
INPUTMac(%SF17075, P7, N27);
INPUTMac(%SF17076, P9, N28);
INPUTMac(%SF17077, P10, N29);
INPUTMac(%SF17078, P11, N30);
INPUTMac(%SF17079, P12, N31);
INPUTMac(%SF17080, P13, N32);
INPUTMac(%SF17081, P14, N33);

INPUTREGMac(%SF17030, P28, N34);
INPUTREGMac(%SF17034, P27, N35);
INPUTREGMac(%SF17037, P26, N36);
INPUTREGMac(%SF17041, P25, N37);
INPUTREGMac(%SF17044, P24, N38);
INPUTREGMac(%SF17048, P23, N39);
INPUTREGMac(%SF17051, P20, N40);
INPUTREGMac(%SF17055, P19, N41);
INPUTREGMac(%SF17058, P18, N42);
INPUTREGMac(%SF17062, P17, N43);
INPUTREGMac(%SF17065, P16, N44);
INPUTREGMac(%SF17069, P15, N45);

330Mac(%SF17028, L5, %FF66, L21, L22, L23, L24, N46, L25, P28, N34, N1,
       N62, N74, %SF66, %SF132);
330Mac(%SF17032, L6, %FF792, L26, L27, L28, L29, N47, L30, P27, N35, N2,
       N63, N75, %SF792, %SF858);
330Mac(%SF17035, L7, %FF2178, L31, L32, L33, L34, N48, L35, P26, N36, N3,
       N64, N76, %SF2178, %SF2244);
330Mac(%SF17039, L8, %FF3036, L36, L37, L38, L39, N49, L40, P25, N37, N4,
       N65, N77, %SF3036, %SF3102);
330Mac(%SF17042, L9, %FF4290, L41, L42, L43, L44, N50, L45, P24, N38, N5,
       N66, N78, %SF4290, %SF4356);
330Mac(%SF17046, L10, %FF5280, L46, L47, L48, L49, N51, L50, P23, N39, N6,
       N67, N79, %SF5280, %SF5346);
330Mac(%SF17049, L13, %FF8514, L51, L52, L53, L54, N52, L55, P20, N40, N7,
       N68, N80, %SF8514, %SF8580);
330Mac(%SF17053, L14, %FF9636, L56, L57, L58, L59, N53, L60, P19, N41, N8,
       N69, N81, %SF9636, %SF9702);
330Mac(%SF17056, L17, %FF12738, L61, L62, L63, L64, N54, L65, P18, N42, N9,
       N70, N82, %SF12738, %SF12804);
330Mac(%SF17060, L18, %FF13992, L66, L67, L68, L69, N55, L70, P17, N43, N10,
       N71, N83, %SF13992, %SF14058);
330Mac(%SF17063, L19, %FF14850, L71, L72, L73, L74, N56, L75, P16, N44, N11,
       N72, N84, %SF14850, %SF14916);
330Mac(%SF17067, L20, %FF16236, L76, L77, L78, L79, N57, L80, P15, N45, N12,
       N73, N85, %SF16236, %SF16302);

HIDDENMac(L11, %SF6402, L81, L82, L83, L84, N58, N19);
HIDDENMac(L12, %SF7722, L85, L86, L87, L88, N59, N20);
HIDDENMac(L15, %SF10626, L89, L90, L91, L92, N60, N21);
HIDDENMac(L16, %SF11814, L93, L94, L95, L96, N61, N22);

SHAREDMUXMac(%SF17031, N34, N13, N35);
SHAREDMUXMac(%SF17038, N36, N14, N37);
SHAREDMUXMac(%SF17045, N38, N15, N39);
SHAREDMUXMac(%SF17052, N40, N16, N41);
SHAREDMUXMac(%SF17059, N42, N17, N43);
SHAREDMUXMac(%SF17066, N44, N18, N45);

%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:CY7C331
%PartNumber:UDICY7C331
%LastNode ? ?
%NumPins: 28
%FDF AND 0 P1 ~P1 P2 ~P2 N1 ~N1 N13 ~N13 N2 ~N2 P3 ~P3 P4 ~P4 N3 ~N3 N14 ~N14
     N4 ~N4 P5 ~P5 P6 ~P6 N5 ~N5 N15 ~N15 N6 ~N6 P7 ~P7 P9 ~P9 N7 ~N7 N16 ~N16
     N8 ~N8 P10 ~P10 P11 ~P11 N9 ~N9 N17 ~N17 N10 ~N10 P12 ~P12 P13 ~P13
     N11 ~N11 N18 ~N18 N12 ~N12 P14 ~P14 *


%MACRO LOR12(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+62,%InFuse+124,%InFuse+186,%InFuse+248,%InFuse+310,
     %InFuse+372,%InFuse+434,%InFuse+496,%InFuse+558,%InFuse+620,%InFuse+682;
     OutLNode);
%MACEND;

%MACRO LOR10(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+62,%InFuse+124,%InFuse+186,%InFuse+248,%InFuse+310,
     %InFuse+372,%InFuse+434,%InFuse+496,%InFuse+558; OutLNode);
%MACEND;

%MACRO LOR8(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+62,%InFuse+124,%InFuse+186,%InFuse+248,%InFuse+310,
     %InFuse+372,%InFuse+434; OutLNode);
%MACEND;

%MACRO LOR6(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+62,%InFuse+124,%InFuse+186,%InFuse+248,%InFuse+310;
     OutLNode);
%MACEND;

%MACRO LOR4(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+62,%InFuse+124,%InFuse+186; OutLNode);
%MACEND;

%MACRO OUTPUTREGMac(XorFuse:%SF, OutLNode:%TEXT, InFuse:%FF, RegInput:%TEXT,
       SETNode:%TEXT, CLRNode:%TEXT, OutRegClock:%TEXT, OutRegOutput:%TEXT,
       SRNode:%TEXT, InvSRNode:%TEXT, DOutput:%TEXT, QOutput:%TEXT,
       Output:%TEXT, TNode:%TEXT, SETFuse:%SF, RESETFuse:%SF);

%IF %XorFuse..%XorFuse+61 = 1 %THEN
  LNAND(OutLNode; RegInput);
%ELSE
  LAND(OutLNode; RegInput);
%END;

   LNOR(%InFuse+62; SETNode);
   LNOR(%InFuse+186, IPH; CLRNode);
   AND(%InFuse+124; OutRegClock; 1,1,1,1);

   DQFFPC(RegInput, OutRegClock, SETNode, CLRNode; OutRegOutput; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);

%IF %SETFuse..%SETFuse+61 = 1 %THEN
 %IF %RESETFuse..%RESETFuse+61 = 1 %THEN
  INV(RegInput; TNode; 1,1,1,1);
 %ELSE
  LAND(%InFuse+62, %InFuse+186; SRNode);
  LINV(SRNode; InvSRNode);
  LAND(SRNode, RegInput; DOutput);
  LAND(InvSRNode,OutRegOutPut; QOutput);
  LOR(QOutput, DOutput; Output);
  INV(Output; TNode; 1,1,1,1);
 %END;
%ELSE
  %IF %RESETFuse..%RESETFuse+61 = 1 %THEN
    LAND(%InFuse+62, %InFuse+186; SRNode);
    LINV(SRNode; InvSRNode);
    LAND(SRNode, RegInput; DOutput);
    LAND(InvSRNode,OutRegOutPut; QOutput);
    LOR(QOutput, DOutput; Output);
    INV(Output; TNode; 1,1,1,1);
  %ELSE
    LAND(%InFuse+62, %InFuse+186; SRNode);
    LINV(SRNode; InvSRNode);
    LAND(SRNode, RegInput; DOutput);
    LAND(InvSRNode,OutRegOutPut; QOutput);
    LOR(QOutput, DOutput; Output);
    INV(Output; TNode; 1,1,1,1);
  %END;
 %END;
%MACEND;

%MACRO INPUTREGMac(InFuse:%FF, InRegSet:%TEXT, InRegClear:%TEXT, InRegClock:%TEXT,
       OutPin:%TEXT, InRegOutput:%TEXT, SRNode:%TEXT, InvSRNode:%TEXT,
       DOutput:%TEXT, QOutput:%TEXT, InputOutput:%TEXT, SETFuse:%SF,
       RESETFuse:%SF, Output:%TEXT);

   LNOR(%InFuse+310; InRegSet);
   LNOR(%InFuse+372, IPH; InRegClear);
   AND(%InFuse+248; InRegClock; 1,1,1,1);

   DQFFPC(OutPin, InRegClock, InRegSet, InRegClear; InRegOutput; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);

%IF %SETFuse..%SETFuse+61 = 1 %THEN
 %IF %RESETFuse..%RESETFuse+61 = 1 %THEN
  BUF(OutPin; InputOutput; 1,1,1,1);
 %ELSE
  LAND(%InFuse+310, %InFuse+372; SRNode);
  LINV(SRNode; InvSRNode);
  LAND(SRNode, OutPut; DOutput);
  LAND(InvSRNode,InRegOutPut; QOutput);
  LOR(QOutput, DOutput; Output);
  BUF(Output; InputOutput; 1,1,1,1);
 %END;
%ELSE
  %IF %RESETFuse..%RESETFuse+61 = 1 %THEN
    LAND(%InFuse+310, %InFuse+372; SRNode);
    LINV(SRNode; InvSRNode);
    LAND(SRNode, OutPin; DOutput);
    LAND(InvSRNode,InRegOutPut; QOutput);
    LOR(QOutput, DOutput; Output);
    BUF(Output; InputOutput; 1,1,1,1);
  %ELSE
    LAND(%InFuse+310, %InFuse+372; SRNode);
    LINV(SRNode; InvSRNode);
    LAND(SRNode, OutPin; DOutput);
    LAND(InvSRNode,InRegOutPut; QOutput);
    LOR(QOutput, DOutput; Output);
    BUF(Output; InputOutput; 1,1,1,1);
  %END;
 %END;
 %MACEND;

%MACRO 331Mac(S0:%SF, TNode:%TEXT, OutPin:%TEXT, FeedBack:%TEXT,
              InputOutput:%TEXT, InFuse:%FF, Enable:%TEXT, EnableFuse:%SF);

 %IF %S0+1 = 0 %THEN
    BUF(TNode; FeedBack; 1,1,1,1);
 %ELSE
    BUF(InputOutput; FeedBack; 1,1,1,1);
 %END;

 %IF %S0 = 0 %THEN
  %IF %EnableFuse..%EnableFuse+61 = 1 %THEN
    BUF(TNode; OutPin; 1,1,1,1);
  %ELSE
    AND(%InFuse; Enable; 1,1,1,1);
    TSB(TNode, Enable; OutPin; 1,1,1,1,1,1,1,1);
  %END;
 %ELSE
    TSB(TNode, L1; OutPin; 1,1,1,1,1,1,1,1);
 %END;

%MACEND;


%MACRO SHAREDMUXMac(S2:%SF, InputOutput:%TEXT, NextRegOutput:%TEXT,
                    SharedInput:%TEXT);

 %IF %S2 = 0 %THEN
    BUF(InputOutput; SharedInput; 1,1,1,1);
 %ELSE
    BUF(NextRegOutput; SharedInput; 1,1,1,1);
 %END;

%MACEND;

SET(LARGEMODEL);

LINV(P14;L1);

LOR4(%FF496, L2);
LOR12(%FF1240, L3);
LOR6(%FF2480, L4);
LOR10(%FF3348, L5);
LOR8(%FF4464, L6);
LOR8(%FF5456, L7);
LOR8(%FF6448, L8);
LOR8(%FF7440, L9);
LOR10(%FF8432, L10);
LOR6(%FF9548, L11);
LOR12(%FF10416, L12);
LOR4(%FF11656, L13);

OUTPUTREGMac(%SF434, L2, %FF00, L14, L26, L38, N19, N31, L50, L62, L74,
             L86, L98, N67, %SF62, %SF186);
OUTPUTREGMac(%SF1178, L3, %FF744, L15, L27, L39, N20, N32, L51, L63, L75,
             L87, L99, N68, %SF806, %SF930);
OUTPUTREGMac(%SF2418, L4, %FF1984, L16, L28, L40, N21, N33, L52, L64, L76,
             L88, L100, N69, %SF2046, %SF2170);
OUTPUTREGMac(%SF3286, L5, %FF2852, L17, L29, L41, N22, N34, L53, L65, L77,
             L89, L101, N70, %SF2914, %SF3038);
OUTPUTREGMac(%SF4402, L6, %FF3968, L18, L30, L42, N23, N35, L54, L66, L78,
             L90, L102, N71, %SF4030, %SF4154);
OUTPUTREGMac(%SF5394, L7, %FF4960, L19, L31, L43, N24, N36, L55, L67, L79,
             L91, L103, N72, %SF5022, %SF5146);
OUTPUTREGMac(%SF6386, L8, %FF5952, L20, L32, L44, N25, N37, L56, L68, L80,
             L92, L104, N73, %SF6014, %SF6138);
OUTPUTREGMac(%SF7378, L9, %FF6944, L21, L33, L45, N26, N38, L57, L69, L81,
             L93, L105, N74, %SF7006, %SF7130);
OUTPUTREGMac(%SF8370, L10, %FF7936, L22, L34, L46, N27, N39, L58, L70, L82,
             L94, L106, N75, %SF7998, %SF8122);
OUTPUTREGMac(%SF9486, L11, %FF9052, L23, L35, L47, N28, N40, L59, L71, L83,
             L95, L107, N76, %SF9114, %SF9238);
OUTPUTREGMac(%SF10354, L12, %FF9920, L24, L36, L48, N29, N41, L60, L72, L84,
             L96, L108, N77, %SF9982, %SF10106);
OUTPUTREGMac(%SF11594, L13, %FF11160, L25, L37, L49, N30, N42, L61, L73, L85,
             L97, L109, N78, %SF11222, %SF11346);

INPUTREGMac(%FF00, L110, L122, N43, P28, N79, L134, L146, L158, L170, N55,
            %SF310, %SF372, L182);
INPUTREGMac(%FF744, L111, L123, N44, P27, N80, L135, L147, L159, L171, N56
            %SF1054, %SF1116, L183);
INPUTREGMac(%FF1984, L112, L124, N45, P26, N81, L136, L148, L160, L172, N57
            %SF2294, %SF2356, L184);
INPUTREGMac(%FF2852, L113, L125, N46, P25, N82, L137, L149, L161, L173, N58
            %SF3162, %SF3224, L185);
INPUTREGMac(%FF3968, L114, L126, N47, P24, N83, L138, L150, L162, L174, N59
            %SF4278, %SF4340, L186);
INPUTREGMac(%FF4960, L115, L127, N48, P23, N84, L139, L151, L163, L175, N60
            %SF5270, %SF5330, L187);
INPUTREGMac(%FF5952, L116, L128, N49, P20, N85, L140, L152, L164, L176, N61
            %SF6262, %SF6324, L188);
INPUTREGMac(%FF6944, L117, L129, N50, P19, N86, L141, L153, L165, L177, N62
            %SF7254, %SF7316, L189);
INPUTREGMac(%FF7936, L118, L130, N51, P18, N87, L142, L154, L166, L178, N63
            %SF8246, %SF8308, L190);
INPUTREGMac(%FF9052, L119, L131, N52, P17, N88, L143, L155, L167, L179, N64
            %SF9362, %SF9424, L191);
INPUTREGMac(%FF9920, L120, L132, N53, P16, N89, L144, L156, L168, L180, N65
            %SF10230, %SF10292, L192);
INPUTREGMac(%FF11160, L121, L133, N54, P15, N90, L145, L157, L169, L181, N66
            %SF11470, %SF11532, L193);

331Mac(%SF11904, N67, P28, N1, N55, %FF00, N91, %SF00);
331Mac(%SF11907, N68, P27, N2, N56, %FF744, N92, %SF744);
331Mac(%SF11909, N69, P26, N3, N57, %FF1984, N93, %SF1984);
331Mac(%SF11912, N70, P25, N4, N58, %FF2852, N94, %SF2852);
331Mac(%SF11914, N71, P24, N5, N59, %FF3968, N95, %SF3968);
331Mac(%SF11917, N72, P23, N6, N60, %FF4960, N96, %SF4960);
331Mac(%SF11919, N73, P20, N7, N61, %FF5952, N97, %SF5952);
331Mac(%SF11922, N74, P19, N8, N62, %FF6944, N98, %SF6944);
331Mac(%SF11924, N75, P18, N9, N63, %FF7936, N99, %SF7936);
331Mac(%SF11927, N76, P17, N10, N64, %FF9052, N100, %SF9052);
331Mac(%SF11929, N77, P16, N11, N65, %FF9920, N101, %SF9920);
331Mac(%SF11932, N78, P15, N12, N66, %FF11222, N102, %SF11222);

SHAREDMUXMac(%SF11906, N55, N56, N13);
SHAREDMUXMac(%SF11911, N57, N58, N14);
SHAREDMUXMac(%SF11916, N59, N60, N15);
SHAREDMUXMac(%SF11921, N61, N62, N16);
SHAREDMUXMac(%SF11926, N63, N64, N17);
SHAREDMUXMac(%SF11931, N65, N66, N18);

%EndModel

;THE 16LM4A UNIT DELAY DEVICE WAS TAKEN FROM NATIONAL SEMICONDUCTOR.
;
%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EC16LM4A
%PartNumber:UDIEC16LM4A
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P5 ~P5 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 P20 ~P20 P7 ~P7 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 P18 ~P18 *

%MACRO POR8LATCH(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, EnLNode:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,EnLNode,ONE,L2;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 BUF(NodeInp;OutPin;1,1,1,1);
%MACEND;


LINV(P1;L1);
LAND(L1,IPL;L2);
LNOR(P16,P13;L3);
LNOR(P9,P13;L4);

SET(RLOW);
POR8LATCH(%SF2050, %FF512, N1, L3, L5, P20);
POR8LATCH(%SF2051, %FF768, N2, L4, L6, P5);
POR8LATCH(%SF2052, %FF1024, N3, L3, L7, P18);
POR8LATCH(%SF2053, %FF1280, N4, L4, L8, P7);
%EndModel

;THE 16RM4 UNIT DELAY DEVICE WAS TAKEN FROM NATIONAL SEMICONDUCTOR.
;
%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EC16RM4A
%PartNumber:UDIEC16RM4A
%LastNode ? ?
%NumPins: 24
%FDF AND 0 P5 ~P5 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 P20 ~P20 P7 ~P7 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 P18 ~P18 *

%MACRO POR8DFF(XorFuse:%SF, InFuse:%FF, ClockInp:%TEXT, NodeInp:%TEXT,  TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,ClockInp,L2;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 BUF(NodeInp;OutPin;1,1,1,1);
%MACEND;


LINV(P1;L1);
LAND(L1,IPL;L2);
OR(P16,P13;N1;1,1,1,1);
OR(P9,P13;N2;1,1,1,1);

SET(RLOW);
POR8DFF(%SF2050, %FF512, N1, N3, L3, P20);
POR8DFF(%SF2051, %FF768, N2, N4, L4, P5);
POR8DFF(%SF2052, %FF1024, N1, N5, L5, P18);
POR8DFF(%SF2053, %FF1280, N2, N6, L6, P7);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EC16LD4N
%PartNumber:UDIEC16LD4N
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N2 ~N2 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 N1 ~N1 N4 ~N4 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N3 ~N3 *

%MACRO POR8(XorFuse:%SF, InFuse:%FF, OutPin:%TEXT);
 %IF %XorFuse=0 %THEN
  NOR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
      %InFuse+192, %InFuse+224; OutPin; 1,1,1,1);
 %ELSE
  OR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 1,1,1,1);
 %END;
%MACEND;

%MACRO POR8LATCH(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, EnPin:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,EnPin,ONE,L2;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 AND(NodeInp,L3;OutPin;1,1,1,1);
%MACEND;


LINV(P1;L1);
LAND(L1,IPL;L2);
LINV(P13;L3);

SET(RLOW);
POR8(%SF2048, %FF00, P21);
POR8(%SF2049, %FF256, P4);
POR8LATCH(%SF2050, %FF512, N1, P16, L4, P20);
POR8LATCH(%SF2051, %FF768, N2, P9, L5, P5);
POR8LATCH(%SF2052, %FF1024, N3, P16, L6, P18);
POR8LATCH(%SF2053, %FF1280, N4, P9, L7, P7);
POR8(%SF2054, %FF1536, P17);
POR8(%SF2055, %FF1792, P8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EC16LD8N
%PartNumber:UDIEC16LD8N
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N4 ~N4 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 N1 ~N1 N2 ~N2 N7 ~N7
     N8 ~N8 N3 ~N3 N6 ~N6 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N5 ~N5 *

%MACRO POR8LATCH(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, EnPin:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,EnPin,ONE,L2;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 AND(NodeInp,L3;OutPin;1,1,1,1);
%MACEND;


LINV(P1;L1);
LAND(L1,IPL;L2);
LINV(P13;L3);

SET(RLOW);
POR8LATCH(%SF2048, %FF00, N1, P16, L4, P21);
POR8LATCH(%SF2049, %FF256, N2, P9, L5, P4);
POR8LATCH(%SF2050, %FF512, N3, P16, L6, P20);
POR8LATCH(%SF2051, %FF768, N4, P9, L7, P5);
POR8LATCH(%SF2052, %FF1024, N5, P16, L8, P18);
POR8LATCH(%SF2053, %FF1280, N6, P9, L9, P7);
POR8LATCH(%SF2054, %FF1536, N7, P16, L10, P17);
POR8LATCH(%SF2055, %FF1792, N8, P9, L11, P8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EC16RC4N
%PartNumber:UDIEC16RC4N
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N3 ~N3 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4  P17 ~P17
     P8 ~P8 N2 ~N2 N5 ~N5 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N4 ~N4 *

%MACRO POR8(XorFuse:%SF, InFuse:%FF, OutPin:%TEXT);
 %IF %XorFuse=0 %THEN
  NOR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
      %InFuse+192, %InFuse+224; OutPin; 1,1,1,1);
 %ELSE
  OR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 1,1,1,1);
 %END;
%MACEND;

%MACRO POR8DFF(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,N1,L2;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 AND(NodeInp,L3;OutPin;1,1,1,1);
%MACEND;

LINV(P1;L1);
LAND(L1,IPL;L2);
LINV(P13;L3);
OR(P9,P16;N1;1,1,1,1);

SET(RLOW);
POR8(%SF2048, %FF00, P21);
POR8(%SF2049, %FF256, P4);
POR8DFF(%SF2050, %FF512, N2, L4, P20);
POR8DFF(%SF2051, %FF768, N3, L5, P5);
POR8DFF(%SF2052, %FF1024, N4, L6, P18);
POR8DFF(%SF2053, %FF1280, N5, L7, P7);
POR8(%SF2054, %FF1536, P17);
POR8(%SF2055, %FF1792, P8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EC16RC8N
%PartNumber:UDIEC16RC8N
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N5 ~N5 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 N2 ~N2 N3 ~N3 N8 ~N8
     N9 ~N9 N4 ~N4 N7 ~N7 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N6 ~N6 *

%MACRO POR8DFF(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,N1,L2;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 AND(NodeInp,L3;OutPin;1,1,1,1);
%MACEND;

LINV(P1;L1);
LAND(L1,IPL;L2);
LINV(P13;L3);
OR(P9,P16;N1;1,1,1,1);

SET(RLOW);
POR8DFF(%SF2048, %FF00, N2, L4, P21);
POR8DFF(%SF2049, %FF256, N3, L5, P4);
POR8DFF(%SF2050, %FF512, N4, L6, P20);
POR8DFF(%SF2051, %FF768, N5, L7, P5);
POR8DFF(%SF2052, %FF1024, N6, L8, P18);
POR8DFF(%SF2053, %FF1280, N7, L9, P7);
POR8DFF(%SF2054, %FF1536, N8, L10, P17);
POR8DFF(%SF2055, %FF1792, N9, L11, P8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EC16RD4N
%PartNumber:UDIEC16RD4N
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N2 ~N2 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 N1 ~N1 N4 ~N4 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N3 ~N3 *

%MACRO POR8(XorFuse:%SF, InFuse:%FF, OutPin:%TEXT);
 %IF %XorFuse=0 %THEN
  NOR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
      %InFuse+192, %InFuse+224; OutPin; 1,1,1,1);
 %ELSE
  OR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 1,1,1,1);
 %END;
%MACEND;

%MACRO POR8DFF(XorFuse:%SF, InFuse:%FF, ClockInp:%TEXT, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,ClockInp,L2;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 AND(NodeInp,L3;OutPin;1,1,1,1);
%MACEND;

LINV(P1;L1);
LAND(L1,IPL;L2);
LINV(P13;L3);

SET(RLOW);
POR8(%SF2048, %FF00, P21);
POR8(%SF2049, %FF256, P4);
POR8DFF(%SF2050, %FF512, P16, N1, L4, P20);
POR8DFF(%SF2051, %FF768, P9, N2, L5, P5);
POR8DFF(%SF2052, %FF1024, P16, N3, L6, P18);
POR8DFF(%SF2053, %FF1280, P9, N4, L7, P7);
POR8(%SF2054, %FF1536, P17);
POR8(%SF2055, %FF1792, P8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EC16RD8N
%PartNumber:UDIEC16RD8N
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N4 ~N4 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 N1 ~N1 N2 ~N2 N7 ~N7
     N8 ~N8 N3 ~N3 N6 ~N6 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N5 ~N5 *

%MACRO POR8DFF(XorFuse:%SF, InFuse:%FF, ClockInp:%TEXT, NodeInp:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DQFFC(TLNode,ClockInp,L2;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 AND(NodeInp,L3;OutPin;1,1,1,1);
%MACEND;


LINV(P1;L1);
LAND(L1,IPL;L2);
LINV(P13;L3);

SET(RLOW);
POR8DFF(%SF2048, %FF00, P16, N1, L4, P21);
POR8DFF(%SF2049, %FF256, P9, N2, L5, P4);
POR8DFF(%SF2050, %FF512, P16, N3, L6, P20);
POR8DFF(%SF2051, %FF768, P9, N4, L7, P5);
POR8DFF(%SF2052, %FF1024, P16, N5, L8, P18);
POR8DFF(%SF2053, %FF1280, P9, N6, L9, P7);
POR8DFF(%SF2054, %FF1536, P16, N7, L10, P17);
POR8DFF(%SF2055, %FF1792, P9, N8, L11, P8);
%EndModel

;THE FOLLOWING UNIT DELAY DEVICE IS STRICTLY A NATIONAL SEMICONDUCTOR DEVICE;
;THE DIFFERENCE IS THAT THE XOR FUSE IN THIS CASE IS TIED TO VCC RATHER THAN
;GRND AND THE LATCH ENABLES ARE INVERTED
;
%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EC16LD4
%PartNumber:UDIEC16LD4
%LastNode ? ?
%NumPins: 24
%FDF AND 0 N2 ~N2 P23 ~P23 P2 ~P2 P22 ~P22 P3 ~P3 P21 ~P21 P4 ~P4 P17 ~P17
     P8 ~P8 N1 ~N1 N4 ~N4 P15 ~P15 P10 ~P10 P14 ~P14 P11 ~P11 N3 ~N3 *

%MACRO POR8(XorFuse:%SF, InFuse:%FF, OutPin:%TEXT);
 %IF %XorFuse=0 %THEN
  OR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
      %InFuse+192, %InFuse+224; OutPin; 1,1,1,1);
 %ELSE
  NOR(%InFuse, %InFuse+32, %InFuse+64, %InFuse+96, %InFuse+128, %InFuse+160,
     %InFuse+192, %InFuse+224; OutPin; 1,1,1,1);
 %END;
%MACEND;

%MACRO POR8LATCH(XorFuse:%SF, InFuse:%FF, NodeInp:%TEXT, EnLNode:%TEXT, TLNode:%TEXT, OutPin:%TEXT);
 %IF %XorFuse = 0 %THEN
  LOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
       %InFuse+192,%InFuse+224;TLNode);
 %ELSE
  LNOR(%InFuse,%InFuse+32,%InFuse+64,%InFuse+96,%InFuse+128,%InFuse+160,
      %InFuse+192,%InFuse+224;TLNode);
 %END;
 DLATCHPC(TLNode,EnLNode,ONE,L2;NodeInp;1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
 AND(NodeInp,L5;OutPin;1,1,1,1);
%MACEND;


LINV(P1;L1);
LAND(L1,IPL;L2);
LINV(P16;L3);
LINV(P9;L4);
LINV(P13;L5);

SET(RLOW);
POR8(%SF2048, %FF00, P21);
POR8(%SF2049, %FF256, P4);
POR8LATCH(%SF2050, %FF512, N1, L3, L6, P20);
POR8LATCH(%SF2051, %FF768, N2, L4, L7, P5);
POR8LATCH(%SF2052, %FF1024, N3, L3, L8, P18);
POR8LATCH(%SF2053, %FF1280, N4, L4, L9, P7);
POR8(%SF2054, %FF1536, P17);
POR8(%SF2055, %FF1792, P8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EP310
%PartNumber:UDIEP310
%LastNode ? ?
%NumPins: 20
%FDF AND 0 ~P1 P1 ~P11 P11 ~P2 P2 ~N1 N1 ~P3 P3 ~N2 N2 ~P4 P4 ~N3 N3 ~P5 P5
     ~N4 N4 ~P6 P6 ~N5 N5 ~P7 P7 ~N6 N6 ~P8 P8 ~N7 N7 ~P9 P9 ~N8 N8*

%MACRO LOR8(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+36,%InFuse+72,%InFuse+108,%InFuse+144,%InFuse+180,
     %InFuse+216,%InFuse+252; OutLNode);
%MACEND;

%MACRO Output(Out1:%SF, OrOutput:%TEXT, TLNode:%TEXT, TNode:%TEXT,
             EnableFuse:%SF, OutPin:%TEXT, InFuse:%FF);

%CASE %Out1, %Out1+1, %Out1+2, %Out1+3
   14:
     LOR(OrOutput, L21; TLNode);
     DQFFC(TLNode, P1, L22; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+35 = 1 %THEN
     INV(TNode; OutPin; 0,0,0,0);
    %ELSE
     ITSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
  |13:
     LOR(OrOutput, L21; TLNode);
     DQFFC(TLNode, P1, L22; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+35 = 1 %THEN
     BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
  |11:
    %IF %EnableFuse..%EnableFuse+35 = 1 %THEN
     INV(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     INV(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
  |7:
    %IF %EnableFuse..%EnableFuse+35 = 1 %THEN
     BUF(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     BUF(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
  %END;
%MACEND;

%MACRO 310FeedBack(FB1:%SF, OutPin:%TEXT, TNode:%TEXT, OutLNode:%TEXT,
                FeedBack:%TEXT);

%CASE %FB1, %FB1+1, %FB1+2
   6:
    BUF(OutPin; FeedBack; 0,0,0,0);
  |5:
    BUF(TNode; FeedBack; 0,0,0,0);
  |3:
    BUF(OutLNode; FeedBack; 0,0,0,0);
%END;
%MACEND;


LAND(%FF2592; L21);
LNOR(%FF2628, IPH; L22);

LOR8(%FF00, L1);
LOR8(%FF324, L2);
LOR8(%FF648, L3);
LOR8(%FF972, L4);
LOR8(%FF1296, L5);
LOR8(%FF1620, L6);
LOR8(%FF1944, L7);
LOR8(%FF2268, L8);

Output(%SF2664, L1, L9, N9, %SF288, P19, %FF288);
Output(%SF2671, L2, L10, N10, %SF612, P18, %FF612);
Output(%SF2678, L3, L11, N11, %SF936, P17, %FF936);
Output(%SF2685, L4, L12, N12, %SF1260, P16, %FF1260);
Output(%SF2692, L5, L13, N13, %SF1584, P15, %FF1584);
Output(%SF2699, L6, L14, N14, %SF1908, P14, %FF1908);
Output(%SF2706, L7, L15, N15, %SF2232, P13, %FF2232);
Output(%SF2713, L8, L16, N16, %SF2556, P12, %FF2556);

310FeedBack(%SF2668, P19, N9, L1, N1);
310FeedBack(%SF2675, P18, N10, L2, N2);
310FeedBack(%SF2682, P17, N11, L3, N3);
310FeedBack(%SF2689, P16, N12, L4, N4);
310FeedBack(%SF2696, P15, N13, L5, N5);
310FeedBack(%SF2703, P14, N14, L6, N6);
310FeedBack(%SF2710, P13, N15, L7, N7);
310FeedBack(%SF2717, P12, N16, L8, N8);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EP320
%PartNumber:UDIEP320
%LastNode ? ?
%NumPins: 20
%FDF AND 0 ~P1 P1 ~P2 P2 ~P3 P3 ~P4 P4 ~P5 P5 ~P6 P6 ~P7 P7 ~P8 P8 ~P9 P9
     ~P11 P11 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8*

%MACRO LOR8(InFuse:%FF, OutLNode:%TEXT);
 LOR(%InFuse,%InFuse+36,%InFuse+72,%InFuse+108,%InFuse+144,%InFuse+180,
     %InFuse+216,%InFuse+252; OutLNode);
%MACEND;

%MACRO EP320(ArchFuse:%SF, EnableFuse:%SF, OrOutput:%TEXT, OutPin:%TEXT,
             TNode:%TEXT, InFuse:%FF, FeedBack:%TEXT, QOut:%TEXT);

%CASE %ArchFuse+3, %ArchFuse+2, %ArchFuse+1, %ArchFuse
   0:
    %IF %EnableFuse..%EnableFuse+35 = 1 %THEN
     INV(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     INV(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(OutPin; FeedBack; 0,0,0,0);
  |3:
    %IF %EnableFuse..%EnableFuse+35 = 1 %THEN
     BUF(OrOutput; OutPin; 1,1,1,1);
    %ELSE
     BUF(OrOutput; TNode; 1,1,1,1);
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
     BUF(OutPin; FeedBack; 0,0,0,0);
  |12:
     INV(OrOutput; TNode; 0,0,0,0);
     DQFF(TNode, P1; QOut; 25,25,33,0,16,16,25,25,33,0,16,16);
    %IF %EnableFuse..%EnableFuse+35 = 1 %THEN
     BUF(QOut; OutPin; 0,0,0,0);
    %ELSE
     TSB(QOut, %InFuse; OutPin; 45,45,45,45,45,45,45,45);
    %END;
    BUF(QOut; FeedBack; 0,0,0,0);
  |15:
     DQFF(OrOutput, P1; TNode; 1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+35 = 1 %THEN
     BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
     TSB(TNode, %InFuse; OutPin; 1,1,1,1,1,1,1,1);
    %END;
    BUF(TNode; FeedBack; 0,0,0,0);
  %END;
%MACEND;

LOR8(%FF00, L1);
LOR8(%FF324, L2);
LOR8(%FF648, L3);
LOR8(%FF972, L4);
LOR8(%FF1296, L5);
LOR8(%FF1620, L6);
LOR8(%FF1944, L7);
LOR8(%FF2268, L8);

EP320(%SF2880, %SF288, L1, P19, N9, %FF288, N8, N17);
EP320(%SF2884, %SF612, L2, P18, N10, %FF612, N7, N18);
EP320(%SF2888, %SF936, L3, P17, N11, %FF936, N6, N19);
EP320(%SF2892, %SF1260, L4, P16, N12, %FF1260, N5, N20);
EP320(%SF2896, %SF1584, L5, P15, N13, %FF1584, N4, N21);
EP320(%SF2900, %SF1908, L6, P14, N14, %FF1908, N3, N22);
EP320(%SF2904, %SF2232, L7, P13, N15, %FF2232, N2, N23);
EP320(%SF2908, %SF2556, L8, P12, N16, %FF2556, N1, N24);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EP600
%PartNumber:UDIEP600
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 1,1,1,1);
   %ELSE
      BUF(LorOutput; TSBInput; 1,1,1,1);
      TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
   %END;
   BUF(OutPin; FeedBack; 0,0,0,0);
 |1,3:
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(OutPin; FeedBack; 0,0,0,0);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 1,1,1,1);
    %ELSE
       BUF(LorOutput; TSBInput; 1,1,1,1);
       TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 1,1,1,1);
    %ELSE
       BUF(LorOutput; TSBInput; 1,1,1,1);
       TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(Outpin; FeedBack; 0,0,0,0);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 0,0,0,0);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(Outpin; FeedBack; 0,0,0,0);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 0,0,0,0);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EP600
%PartNumber:UDIEP610
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 1,1,1,1);
   %ELSE
      BUF(LorOutput; TSBInput; 1,1,1,1);
      TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
   %END;
   BUF(OutPin; FeedBack; 0,0,0,0);
 |1,3:
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(OutPin; FeedBack; 0,0,0,0);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 1,1,1,1);
    %ELSE
       BUF(LorOutput; TSBInput; 1,1,1,1);
       TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 1,1,1,1);
    %ELSE
       BUF(LorOutput; TSBInput; 1,1,1,1);
       TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(Outpin; FeedBack; 0,0,0,0);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 0,0,0,0);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(Outpin; FeedBack; 0,0,0,0);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 0,0,0,0);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EP900
%PartNumber:UDIEP900
%LastNode ? ?
%NumPins: 40
%FDF AND 0 ~P2 P2 ~P3 P3 ~P4 P4 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6
         ~N7 N7 ~N8 N8 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~P17 P17 ~P18 P18
	 ~P19 P19 ~P22 P22 ~P23 P23 ~P24 P24 ~N13 N13 ~N14 N14 ~N15 N15
	 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19 ~N20 N20 ~N21 N21 ~N22 N22
	 ~N23 N23 ~N24 N24 ~P37 P37 ~P38 P38 ~P39 P39 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+72, %InFuse+144, %InFuse+216, %InFuse+288, %InFuse+360,
      %InFuse+432, %InFuse+504; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+72, %InFuse+144, %InFuse+216, %InFuse+288, %InFuse+360,
      %InFuse+432, %InFuse+504; LorOutput);
 %END;
%MACEND;

%MACRO EP900(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+71 = 1 %THEN
      BUF(LorOutput; Outpin; 1,1,1,1);
   %ELSE
      BUF(LorOutput; TSBInput; 1,1,1,1);
      TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
   %END;
   BUF(OutPin; FeedBack; 0,0,0,0);
 |1,3:
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(OutPin; FeedBack; 0,0,0,0);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+71 = 1 %THEN
       BUF(LorOutput; Outpin; 1,1,1,1);
    %ELSE
       BUF(LorOutput; TSBInput; 1,1,1,1);
       TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+71 = 1 %THEN
       BUF(LorOutput; Outpin; 1,1,1,1);
    %ELSE
       BUF(LorOutput; TSBInput; 1,1,1,1);
       TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+71 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(Outpin; FeedBack; 0,0,0,0);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 0,0,0,0);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+71 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(Outpin; FeedBack; 0,0,0,0);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 0,0,0,0);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+71 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+71 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF17340, %FF8640, L1);
LOR8(%SF17345, %FF9360, L2);
LOR8(%SF17350, %FF10080, L3);
LOR8(%SF17355, %FF10800, L4);
LOR8(%SF17360, %FF11520, L5);
LOR8(%SF17365, %FF12240, L6);
LOR8(%SF17370, %FF12960, L7);
LOR8(%SF17375, %FF13680, L8);
LOR8(%SF17380, %FF14400, L9);
LOR8(%SF17385, %FF15120, L10);
LOR8(%SF17390, %FF15840, L11);
LOR8(%SF17395, %FF16560, L12);
LOR8(%SF17335, %FF7920, L13);
LOR8(%SF17330, %FF7200, L14);
LOR8(%SF17325, %FF6480, L15);
LOR8(%SF17320, %FF5760, L16);
LOR8(%SF17315, %FF5040, L17);
LOR8(%SF17310, %FF4320, L18);
LOR8(%SF17305, %FF3600, L19);
LOR8(%SF17300, %FF2880, L20);
LOR8(%SF17295, %FF2160, L21);
LOR8(%SF17290, %FF1440, L22);
LOR8(%SF17285, %FF720, L23);
LOR8(%SF17280, %FF00, L24);

EP900(%SF17341, %SF9288, L1, P5, L25, %FF9288, N1, N25, N49, %FF9216, L49,
      N73, P1);
EP900(%SF17346, %SF10008, L2, P6, L26, %FF10008, N2, N26, N50, %FF9936, L50,
      N74, P1);
EP900(%SF17351, %SF10728, L3, P7, L27, %FF10728, N3, N27, N51, %FF10656, L51,
      N75, P1);
EP900(%SF17356, %SF11448, L4, P8, L28, %FF11448, N4, N28, N52, %FF11376, L52,
      N76, P1);
EP900(%SF17361, %SF12168, L5, P9, L29, %FF12168, N5, N29, N53, %FF12096, L53,
      N77, P1);
EP900(%SF17366, %SF12888, L6, P10, L30, %FF12888, N6, N30, N54, %FF12816, L54,
      N78, P1);
EP900(%SF17371, %SF13608, L7, P11, L31, %FF13608, N7, N31, N55, %FF13536, L55,
      N79, P1);
EP900(%SF17376, %SF14328, L8, P12, L32, %FF14328, N8, N32, N56, %FF14256, L56,
      N80, P1);
EP900(%SF17381, %SF15048, L9, P13, L33, %FF15048, N9, N33, N57, %FF14976, L57,
      N81, P1);
EP900(%SF17386, %SF15768, L10, P14, L34, %FF15768, N10, N34, N58, %FF15696, L58,
      N82, P1);
EP900(%SF17391, %SF16488, L11, P15, L35, %FF16488, N11, N35, N59, %FF16416, L59,
      N83, P1);
EP900(%SF17396, %SF17208, L12, P16, L36, %FF17208, N12, N36, N60, %FF17136, L60,
      N84, P1);
EP900(%SF17336, %SF8568, L13, P25, L37, %FF8568, N13, N37, N61, %FF8496, L61,
      N85, P21);
EP900(%SF17331, %SF7848, L14, P26, L38, %FF7848, N14, N38, N62, %FF7776, L62,
      N86, P21);
EP900(%SF17326, %SF7128, L15, P27, L39, %FF7128, N15, N39, N63, %FF7056, L63,
      N87, P21);
EP900(%SF17321, %SF6408, L16, P28, L40, %FF6408, N16, N40, N64, %FF6336, L64,
      N88, P21);
EP900(%SF17316, %SF5688, L17, P29, L41, %FF5688, N17, N41, N65, %FF5616, L65,
      N89, P21);
EP900(%SF17311, %SF4968, L18, P30, L42, %FF4968, N18, N42, N66, %FF4896, L66,
      N90, P21);
EP900(%SF17306, %SF4248, L19, P31, L43, %FF4248, N19, N43, N67, %FF4176, L67,
      N91, P21);
EP900(%SF17301, %SF3528, L20, P32, L44, %FF3528, N20, N44, N68, %FF3456, L68,
      N92, P21);
EP900(%SF17296, %SF2808, L21, P33, L45, %FF2808, N21, N45, N69, %FF2736, L69,
      N93, P21);
EP900(%SF17291, %SF2088, L22, P34, L46, %FF2088, N22, N46, N70, %FF2016, L70,
      N94, P21);
EP900(%SF17286, %SF1368, L23, P35, L47, %FF1368, N23, N47, N71, %FF1296, L71,
      N95, P21);
EP900(%SF17281, %SF648, L24, P36, L48, %FF648, N24, N48, N72, %FF576, L72,
      N96, P21);
%EndModel

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EP900
%PartNumber:UDIEP910
%LastNode ? ?
%NumPins: 40
%FDF AND 0 ~P2 P2 ~P3 P3 ~P4 P4 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6
         ~N7 N7 ~N8 N8 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~P17 P17 ~P18 P18
	 ~P19 P19 ~P22 P22 ~P23 P23 ~P24 P24 ~N13 N13 ~N14 N14 ~N15 N15
	 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19 ~N20 N20 ~N21 N21 ~N22 N22
	 ~N23 N23 ~N24 N24 ~P37 P37 ~P38 P38 ~P39 P39 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+72, %InFuse+144, %InFuse+216, %InFuse+288, %InFuse+360,
      %InFuse+432, %InFuse+504; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+72, %InFuse+144, %InFuse+216, %InFuse+288, %InFuse+360,
      %InFuse+432, %InFuse+504; LorOutput);
 %END;
%MACEND;

%MACRO EP900(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+71 = 1 %THEN
      BUF(LorOutput; Outpin; 1,1,1,1);
   %ELSE
      BUF(LorOutput; TSBInput; 1,1,1,1);
      TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
   %END;
   BUF(OutPin; FeedBack; 0,0,0,0);
 |1,3:
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(OutPin; FeedBack; 0,0,0,0);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+71 = 1 %THEN
       BUF(LorOutput; Outpin; 1,1,1,1);
    %ELSE
       BUF(LorOutput; TSBInput; 1,1,1,1);
       TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+71 = 1 %THEN
       BUF(LorOutput; Outpin; 1,1,1,1);
    %ELSE
       BUF(LorOutput; TSBInput; 1,1,1,1);
       TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+71 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(Outpin; FeedBack; 0,0,0,0);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 0,0,0,0);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+71 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(Outpin; FeedBack; 0,0,0,0);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 0,0,0,0);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+71 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+71 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF17340, %FF8640, L1);
LOR8(%SF17345, %FF9360, L2);
LOR8(%SF17350, %FF10080, L3);
LOR8(%SF17355, %FF10800, L4);
LOR8(%SF17360, %FF11520, L5);
LOR8(%SF17365, %FF12240, L6);
LOR8(%SF17370, %FF12960, L7);
LOR8(%SF17375, %FF13680, L8);
LOR8(%SF17380, %FF14400, L9);
LOR8(%SF17385, %FF15120, L10);
LOR8(%SF17390, %FF15840, L11);
LOR8(%SF17395, %FF16560, L12);
LOR8(%SF17335, %FF7920, L13);
LOR8(%SF17330, %FF7200, L14);
LOR8(%SF17325, %FF6480, L15);
LOR8(%SF17320, %FF5760, L16);
LOR8(%SF17315, %FF5040, L17);
LOR8(%SF17310, %FF4320, L18);
LOR8(%SF17305, %FF3600, L19);
LOR8(%SF17300, %FF2880, L20);
LOR8(%SF17295, %FF2160, L21);
LOR8(%SF17290, %FF1440, L22);
LOR8(%SF17285, %FF720, L23);
LOR8(%SF17280, %FF00, L24);

EP900(%SF17341, %SF9288, L1, P5, L25, %FF9288, N1, N25, N49, %FF9216, L49,
      N73, P1);
EP900(%SF17346, %SF10008, L2, P6, L26, %FF10008, N2, N26, N50, %FF9936, L50,
      N74, P1);
EP900(%SF17351, %SF10728, L3, P7, L27, %FF10728, N3, N27, N51, %FF10656, L51,
      N75, P1);
EP900(%SF17356, %SF11448, L4, P8, L28, %FF11448, N4, N28, N52, %FF11376, L52,
      N76, P1);
EP900(%SF17361, %SF12168, L5, P9, L29, %FF12168, N5, N29, N53, %FF12096, L53,
      N77, P1);
EP900(%SF17366, %SF12888, L6, P10, L30, %FF12888, N6, N30, N54, %FF12816, L54,
      N78, P1);
EP900(%SF17371, %SF13608, L7, P11, L31, %FF13608, N7, N31, N55, %FF13536, L55,
      N79, P1);
EP900(%SF17376, %SF14328, L8, P12, L32, %FF14328, N8, N32, N56, %FF14256, L56,
      N80, P1);
EP900(%SF17381, %SF15048, L9, P13, L33, %FF15048, N9, N33, N57, %FF14976, L57,
      N81, P1);
EP900(%SF17386, %SF15768, L10, P14, L34, %FF15768, N10, N34, N58, %FF15696, L58,
      N82, P1);
EP900(%SF17391, %SF16488, L11, P15, L35, %FF16488, N11, N35, N59, %FF16416, L59,
      N83, P1);
EP900(%SF17396, %SF17208, L12, P16, L36, %FF17208, N12, N36, N60, %FF17136, L60,
      N84, P1);
EP900(%SF17336, %SF8568, L13, P25, L37, %FF8568, N13, N37, N61, %FF8496, L61,
      N85, P21);
EP900(%SF17331, %SF7848, L14, P26, L38, %FF7848, N14, N38, N62, %FF7776, L62,
      N86, P21);
EP900(%SF17326, %SF7128, L15, P27, L39, %FF7128, N15, N39, N63, %FF7056, L63,
      N87, P21);
EP900(%SF17321, %SF6408, L16, P28, L40, %FF6408, N16, N40, N64, %FF6336, L64,
      N88, P21);
EP900(%SF17316, %SF5688, L17, P29, L41, %FF5688, N17, N41, N65, %FF5616, L65,
      N89, P21);
EP900(%SF17311, %SF4968, L18, P30, L42, %FF4968, N18, N42, N66, %FF4896, L66,
      N90, P21);
EP900(%SF17306, %SF4248, L19, P31, L43, %FF4248, N19, N43, N67, %FF4176, L67,
      N91, P21);
EP900(%SF17301, %SF3528, L20, P32, L44, %FF3528, N20, N44, N68, %FF3456, L68,
      N92, P21);
EP900(%SF17296, %SF2808, L21, P33, L45, %FF2808, N21, N45, N69, %FF2736, L69,
      N93, P21);
EP900(%SF17291, %SF2088, L22, P34, L46, %FF2088, N22, N46, N70, %FF2016, L70,
      N94, P21);
EP900(%SF17286, %SF1368, L23, P35, L47, %FF1368, N23, N47, N71, %FF1296, L71,
      N95, P21);
EP900(%SF17281, %SF648, L24, P36, L48, %FF648, N24, N48, N72, %FF576, L72,
      N96, P21);
%EndModel


%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EP1800
%PartNumber:UDIEP1800
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 1,1,1,1);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 1,1,1,1);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; Outpin; 1,1,1,1);
   %ELSE
      BUF(LorOutput; TSBInput; 1,1,1,1);
      TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 1,1,1,1);
   BUF(LorOutput; Outpin; 1,1,1,1);
 |4,5,6,7:
   BUF(LorOutput; TNode; 1,1,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; Outpin; 1,1,1,1);
   %ELSE
      BUF(LorOutput; TSBInput; 1,1,1,1);
      TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
   %END;
   BUF(OutPin; FeedBack; 0,0,0,0);
 |1,3:
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(OutPin; FeedBack; 0,0,0,0);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; Outpin; 1,1,1,1);
    %ELSE
       BUF(LorOutput; TSBInput; 1,1,1,1);
       TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; Outpin; 1,1,1,1);
    %ELSE
       BUF(LorOutput; TSBInput; 1,1,1,1);
       TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(Outpin; FeedBack; 0,0,0,0);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 0,0,0,0);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(Outpin; FeedBack; 0,0,0,0);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 0,0,0,0);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Unit_Delay_Initialized
%Type:EP1800
%PartNumber:UDIEP1810
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 1,1,1,1);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 1,1,1,1);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; Outpin; 1,1,1,1);
   %ELSE
      BUF(LorOutput; TSBInput; 1,1,1,1);
      TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 1,1,1,1);
   BUF(LorOutput; Outpin; 1,1,1,1);
 |4,5,6,7:
   BUF(LorOutput; TNode; 1,1,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; Outpin; 1,1,1,1);
   %ELSE
      BUF(LorOutput; TSBInput; 1,1,1,1);
      TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
   %END;
   BUF(OutPin; FeedBack; 0,0,0,0);
 |1,3:
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(OutPin; FeedBack; 0,0,0,0);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; Outpin; 1,1,1,1);
    %ELSE
       BUF(LorOutput; TSBInput; 1,1,1,1);
       TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; Outpin; 1,1,1,1);
    %ELSE
       BUF(LorOutput; TSBInput; 1,1,1,1);
       TSB(TSBInput, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(LorOutput; Outpin; 1,1,1,1);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(Outpin; FeedBack; 0,0,0,0);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 0,0,0,0);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(Outpin; FeedBack; 0,0,0,0);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 0,0,0,0);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLKPin, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 1,1,1,1,1,1,1,1);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 1,1,1,1);
   DQFFC(DInput, CLK, Clear; TNode; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL
