(*                                                                         *)
(*                         Copyright (C) 1987-1990                         *)
(*                      by Gogesch Micro Systems, INC.                     *)
(*                                                                         *)
(*                           All rights reserved.                          *)
(*                                                                         *)
(***************************************************************************)


%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1800JC
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 62,62,62,62);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 85,85,85,85);
   %ELSE
      BUF(LorOutput; TSBInput; 85,85,85,85);
      TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 62,62,62,62);
   BUF(LorOutput; OutPin; 85,85,85,85);
 |4,5,6,7:
   BUF(LorOutput; TNode; 62,62,62,62);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 85,85,85,85);
   %ELSE
      BUF(LorOutput; TSBInput; 85,85,85,85);
      TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
   %END;
   BUF(OutPin; FeedBack; 16,16,16,16);
 |1,3:
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(OutPin; FeedBack; 16,16,16,16);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 85,85,85,85);
    %ELSE
       BUF(LorOutput; TSBInput; 85,85,85,85);
       TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(TNode; FeedBack; 16,16,16,16);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 85,85,85,85);
    %ELSE
       BUF(LorOutput; TSBInput; 85,85,85,85);
       TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(TNode; FeedBack; 16,16,16,16);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(Outpin; FeedBack; 16,16,16,16);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(Outpin; FeedBack; 16,16,16,16);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(Outpin; FeedBack; 16,16,16,16);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(Outpin; FeedBack; 16,16,16,16);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(TNode; FeedBack; 16,16,16,16);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1800JI
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 62,62,62,62);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 85,85,85,85);
   %ELSE
      BUF(LorOutput; TSBInput; 85,85,85,85);
      TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 62,62,62,62);
   BUF(LorOutput; OutPin; 85,85,85,85);
 |4,5,6,7:
   BUF(LorOutput; TNode; 62,62,62,62);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 85,85,85,85);
   %ELSE
      BUF(LorOutput; TSBInput; 85,85,85,85);
      TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
   %END;
   BUF(OutPin; FeedBack; 16,16,16,16);
 |1,3:
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(OutPin; FeedBack; 16,16,16,16);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 85,85,85,85);
    %ELSE
       BUF(LorOutput; TSBInput; 85,85,85,85);
       TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(TNode; FeedBack; 16,16,16,16);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 85,85,85,85);
    %ELSE
       BUF(LorOutput; TSBInput; 85,85,85,85);
       TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(TNode; FeedBack; 16,16,16,16);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(Outpin; FeedBack; 16,16,16,16);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(Outpin; FeedBack; 16,16,16,16);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(Outpin; FeedBack; 16,16,16,16);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(Outpin; FeedBack; 16,16,16,16);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(TNode; FeedBack; 16,16,16,16);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1800JM
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 62,62,62,62);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 85,85,85,85);
   %ELSE
      BUF(LorOutput; TSBInput; 85,85,85,85);
      TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 62,62,62,62);
   BUF(LorOutput; OutPin; 85,85,85,85);
 |4,5,6,7:
   BUF(LorOutput; TNode; 62,62,62,62);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 85,85,85,85);
   %ELSE
      BUF(LorOutput; TSBInput; 85,85,85,85);
      TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
   %END;
   BUF(OutPin; FeedBack; 16,16,16,16);
 |1,3:
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(OutPin; FeedBack; 16,16,16,16);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 85,85,85,85);
    %ELSE
       BUF(LorOutput; TSBInput; 85,85,85,85);
       TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(TNode; FeedBack; 16,16,16,16);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 85,85,85,85);
    %ELSE
       BUF(LorOutput; TSBInput; 85,85,85,85);
       TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(TNode; FeedBack; 16,16,16,16);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(Outpin; FeedBack; 16,16,16,16);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(Outpin; FeedBack; 16,16,16,16);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(Outpin; FeedBack; 16,16,16,16);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(Outpin; FeedBack; 16,16,16,16);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(TNode; FeedBack; 16,16,16,16);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1800LC
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 62,62,62,62);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 85,85,85,85);
   %ELSE
      BUF(LorOutput; TSBInput; 85,85,85,85);
      TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 62,62,62,62);
   BUF(LorOutput; OutPin; 85,85,85,85);
 |4,5,6,7:
   BUF(LorOutput; TNode; 62,62,62,62);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 85,85,85,85);
   %ELSE
      BUF(LorOutput; TSBInput; 85,85,85,85);
      TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
   %END;
   BUF(OutPin; FeedBack; 16,16,16,16);
 |1,3:
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(OutPin; FeedBack; 16,16,16,16);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 85,85,85,85);
    %ELSE
       BUF(LorOutput; TSBInput; 85,85,85,85);
       TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(TNode; FeedBack; 16,16,16,16);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 85,85,85,85);
    %ELSE
       BUF(LorOutput; TSBInput; 85,85,85,85);
       TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(TNode; FeedBack; 16,16,16,16);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(Outpin; FeedBack; 16,16,16,16);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(Outpin; FeedBack; 16,16,16,16);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(Outpin; FeedBack; 16,16,16,16);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(Outpin; FeedBack; 16,16,16,16);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(TNode; FeedBack; 16,16,16,16);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1800LI
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 62,62,62,62);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 85,85,85,85);
   %ELSE
      BUF(LorOutput; TSBInput; 85,85,85,85);
      TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 62,62,62,62);
   BUF(LorOutput; OutPin; 85,85,85,85);
 |4,5,6,7:
   BUF(LorOutput; TNode; 62,62,62,62);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 85,85,85,85);
   %ELSE
      BUF(LorOutput; TSBInput; 85,85,85,85);
      TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
   %END;
   BUF(OutPin; FeedBack; 16,16,16,16);
 |1,3:
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(OutPin; FeedBack; 16,16,16,16);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 85,85,85,85);
    %ELSE
       BUF(LorOutput; TSBInput; 85,85,85,85);
       TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(TNode; FeedBack; 16,16,16,16);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 85,85,85,85);
    %ELSE
       BUF(LorOutput; TSBInput; 85,85,85,85);
       TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(TNode; FeedBack; 16,16,16,16);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(Outpin; FeedBack; 16,16,16,16);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(Outpin; FeedBack; 16,16,16,16);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(Outpin; FeedBack; 16,16,16,16);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(Outpin; FeedBack; 16,16,16,16);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(TNode; FeedBack; 16,16,16,16);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1800LM
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 62,62,62,62);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 85,85,85,85);
   %ELSE
      BUF(LorOutput; TSBInput; 85,85,85,85);
      TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 62,62,62,62);
   BUF(LorOutput; OutPin; 85,85,85,85);
 |4,5,6,7:
   BUF(LorOutput; TNode; 62,62,62,62);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 85,85,85,85);
   %ELSE
      BUF(LorOutput; TSBInput; 85,85,85,85);
      TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
   %END;
   BUF(OutPin; FeedBack; 16,16,16,16);
 |1,3:
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(OutPin; FeedBack; 16,16,16,16);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 85,85,85,85);
    %ELSE
       BUF(LorOutput; TSBInput; 85,85,85,85);
       TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(TNode; FeedBack; 16,16,16,16);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 18,18,18,0,30,30,48,48,1,1,18,18,18,0,30,30,48,48,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 85,85,85,85);
    %ELSE
       BUF(LorOutput; TSBInput; 85,85,85,85);
       TSB(TSBInput, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(LorOutput; OutPin; 85,85,85,85);
   BUF(TNode; FeedBack; 16,16,16,16);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(Outpin; FeedBack; 16,16,16,16);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(Outpin; FeedBack; 16,16,16,16);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(Outpin; FeedBack; 16,16,16,16);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(Outpin; FeedBack; 16,16,16,16);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLKPin, Clear; TNode; 41,41,18,0,30,30,71,71,1,1,41,41,18,0,30,30,71,71,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 23,23,23,23,23,23,23,23);
    %END;
   BUF(TNode; FeedBack; 16,16,16,16);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 48,48,48,48);
   DQFFC(DInput, CLK, Clear; TNode; 62,62,18,30,30,30,48,48,1,1,62,62,18,30,30,30,48,48,1,1);
   BUF(TNode; Outpin; 23,23,23,23);
   BUF(TNode; FeedBack; 16,16,16,16);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1800JC-2
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 50,50,50,50);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 65,65,65,65);
   %ELSE
      BUF(LorOutput; TSBInput; 65,65,65,65);
      TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 50,50,50,50);
   BUF(LorOutput; OutPin; 65,65,65,65);
 |4,5,6,7:
   BUF(LorOutput; TNode; 50,50,50,50);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 29,29,12,0,24,24,55,55,1,1,29,29,12,0,24,24,55,55,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(TNode; Outpin; 15,15,15,15);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 29,29,12,0,24,24,55,55,1,1,29,29,12,0,24,24,55,55,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(TNode; Outpin; 15,15,15,15);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 14,14,12,0,24,24,40,40,1,1,14,14,12,0,24,24,40,40,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 14,14,12,0,24,24,40,40,1,1,14,14,12,0,24,24,40,40,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 65,65,65,65);
   %ELSE
      BUF(LorOutput; TSBInput; 65,65,65,65);
      TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
   %END;
   BUF(OutPin; FeedBack; 10,10,10,10);
 |1,3:
   BUF(LorOutput; OutPin; 65,65,65,65);
   BUF(OutPin; FeedBack; 10,10,10,10);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 14,14,12,0,24,24,40,40,1,1,14,14,12,0,24,24,40,40,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 65,65,65,65);
    %ELSE
       BUF(LorOutput; TSBInput; 65,65,65,65);
       TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 10,10,10,10);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(LorOutput; OutPin; 65,65,65,65);
   BUF(TNode; FeedBack; 10,10,10,10);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 14,14,12,0,24,24,40,40,1,1,14,14,12,30,24,24,40,40,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 65,65,65,65);
    %ELSE
       BUF(LorOutput; TSBInput; 65,65,65,65);
       TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 10,10,10,10);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(LorOutput; OutPin; 65,65,65,65);
   BUF(TNode; FeedBack; 10,10,10,10);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 29,29,12,0,24,24,55,55,1,1,29,29,12,0,24,24,55,55,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(Outpin; FeedBack; 10,10,10,10);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(Outpin; FeedBack; 10,10,10,10);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 29,29,12,0,24,24,55,55,1,1,29,29,12,0,24,24,55,55,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(Outpin; FeedBack; 10,10,10,10);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(Outpin; FeedBack; 10,10,10,10);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 29,29,12,0,24,24,55,55,1,1,29,29,12,0,24,24,55,55,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 10,10,10,10);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(TNode; FeedBack; 10,10,10,10);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 29,29,12,0,24,24,40,40,1,1,29,29,12,0,24,24,40,40,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 10,10,10,10);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(TNode; FeedBack; 10,10,10,10);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1800LC-2
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 50,50,50,50);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 65,65,65,65);
   %ELSE
      BUF(LorOutput; TSBInput; 65,65,65,65);
      TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 50,50,50,50);
   BUF(LorOutput; OutPin; 65,65,65,65);
 |4,5,6,7:
   BUF(LorOutput; TNode; 50,50,50,50);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 29,29,12,0,24,24,55,55,1,1,29,29,12,0,24,24,55,55,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(TNode; Outpin; 15,15,15,15);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 29,29,12,0,24,24,55,55,1,1,29,29,12,0,24,24,55,55,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(TNode; Outpin; 15,15,15,15);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 14,14,12,0,24,24,40,40,1,1,14,14,12,0,24,24,40,40,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 14,14,12,0,24,24,40,40,1,1,14,14,12,0,24,24,40,40,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 65,65,65,65);
   %ELSE
      BUF(LorOutput; TSBInput; 65,65,65,65);
      TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
   %END;
   BUF(OutPin; FeedBack; 10,10,10,10);
 |1,3:
   BUF(LorOutput; OutPin; 65,65,65,65);
   BUF(OutPin; FeedBack; 10,10,10,10);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 14,14,12,0,24,24,40,40,1,1,14,14,12,0,24,24,40,40,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 65,65,65,65);
    %ELSE
       BUF(LorOutput; TSBInput; 65,65,65,65);
       TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 10,10,10,10);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(LorOutput; OutPin; 65,65,65,65);
   BUF(TNode; FeedBack; 10,10,10,10);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 14,14,12,0,24,24,40,40,1,1,14,14,12,30,24,24,40,40,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 65,65,65,65);
    %ELSE
       BUF(LorOutput; TSBInput; 65,65,65,65);
       TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 10,10,10,10);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(LorOutput; OutPin; 65,65,65,65);
   BUF(TNode; FeedBack; 10,10,10,10);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 29,29,12,0,24,24,55,55,1,1,29,29,12,0,24,24,55,55,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(Outpin; FeedBack; 10,10,10,10);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(Outpin; FeedBack; 10,10,10,10);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 29,29,12,0,24,24,55,55,1,1,29,29,12,0,24,24,55,55,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(Outpin; FeedBack; 10,10,10,10);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(Outpin; FeedBack; 10,10,10,10);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 29,29,12,0,24,24,55,55,1,1,29,29,12,0,24,24,55,55,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 10,10,10,10);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(TNode; FeedBack; 10,10,10,10);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLKPin, Clear; TNode; 29,29,12,0,24,24,40,40,1,1,29,29,12,0,24,24,40,40,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 10,10,10,10);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 40,40,40,40);
   DQFFC(DInput, CLK, Clear; TNode; 50,50,12,30,24,24,40,40,1,1,50,50,12,30,24,24,40,40,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(TNode; FeedBack; 10,10,10,10);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1800JC-3
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 56,56,56,56);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 75,75,75,75);
   %ELSE
      BUF(LorOutput; TSBInput; 75,75,75,75);
      TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 56,56,56,56);
   BUF(LorOutput; OutPin; 75,75,75,75);
 |4,5,6,7:
   BUF(LorOutput; TNode; 56,56,56,56);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 75,75,75,75);
   %ELSE
      BUF(LorOutput; TSBInput; 75,75,75,75);
      TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
   %END;
   BUF(OutPin; FeedBack; 14,14,14,14);
 |1,3:
   BUF(LorOutput; OutPin; 75,75,75,75);
   BUF(OutPin; FeedBack; 14,14,14,14);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 75,75,75,75);
    %ELSE
       BUF(LorOutput; TSBInput; 75,75,75,75);
       TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(LorOutput; OutPin; 75,75,75,75);
   BUF(TNode; FeedBack; 14,14,14,14);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 75,75,75,75);
    %ELSE
       BUF(LorOutput; TSBInput; 75,75,75,75);
       TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(LorOutput; OutPin; 75,75,75,75);
   BUF(TNode; FeedBack; 14,14,14,14);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(OutPin; FeedBack; 14,14,14,14);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(OutPin; FeedBack; 14,14,14,14);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(OutPin; FeedBack; 14,14,14,14);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(OutPin; FeedBack; 14,14,14,14);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(TNode; FeedBack; 14,14,14,14);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(TNode; FeedBack; 14,14,14,14);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1800JI-3
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 56,56,56,56);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 75,75,75,75);
   %ELSE
      BUF(LorOutput; TSBInput; 75,75,75,75);
      TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 56,56,56,56);
   BUF(LorOutput; OutPin; 75,75,75,75);
 |4,5,6,7:
   BUF(LorOutput; TNode; 56,56,56,56);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit
  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 75,75,75,75);
   %ELSE
      BUF(LorOutput; TSBInput; 75,75,75,75);
      TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
   %END;
   BUF(OutPin; FeedBack; 14,14,14,14);
 |1,3:
   BUF(LorOutput; OutPin; 75,75,75,75);
   BUF(OutPin; FeedBack; 14,14,14,14);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 75,75,75,75);
    %ELSE
       BUF(LorOutput; TSBInput; 75,75,75,75);
       TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(LorOutput; OutPin; 75,75,75,75);
   BUF(TNode; FeedBack; 14,14,14,14);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 75,75,75,75);
    %ELSE
       BUF(LorOutput; TSBInput; 75,75,75,75);
       TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(LorOutput; OutPin; 75,75,75,75);
   BUF(TNode; FeedBack; 14,14,14,14);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(OutPin; FeedBack; 14,14,14,14);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(OutPin; FeedBack; 14,14,14,14);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(OutPin; FeedBack; 14,14,14,14);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(OutPin; FeedBack; 14,14,14,14);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(TNode; FeedBack; 14,14,14,14);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(TNode; FeedBack; 14,14,14,14);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1800LC-3
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 56,56,56,56);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 75,75,75,75);
   %ELSE
      BUF(LorOutput; TSBInput; 75,75,75,75);
      TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 56,56,56,56);
   BUF(LorOutput; OutPin; 75,75,75,75);
 |4,5,6,7:
   BUF(LorOutput; TNode; 56,56,56,56);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 75,75,75,75);
   %ELSE
      BUF(LorOutput; TSBInput; 75,75,75,75);
      TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
   %END;
   BUF(OutPin; FeedBack; 14,14,14,14);
 |1,3:
   BUF(LorOutput; OutPin; 75,75,75,75);
   BUF(OutPin; FeedBack; 14,14,14,14);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 75,75,75,75);
    %ELSE
       BUF(LorOutput; TSBInput; 75,75,75,75);
       TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(LorOutput; OutPin; 75,75,75,75);
   BUF(TNode; FeedBack; 14,14,14,14);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 75,75,75,75);
    %ELSE
       BUF(LorOutput; TSBInput; 75,75,75,75);
       TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(LorOutput; OutPin; 75,75,75,75);
   BUF(TNode; FeedBack; 14,14,14,14);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(OutPin; FeedBack; 14,14,14,14);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(OutPin; FeedBack; 14,14,14,14);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(OutPin; FeedBack; 14,14,14,14);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(OutPin; FeedBack; 14,14,14,14);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(TNode; FeedBack; 14,14,14,14);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(TNode; FeedBack; 14,14,14,14);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1800LI-3
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 56,56,56,56);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 75,75,75,75);
   %ELSE
      BUF(LorOutput; TSBInput; 75,75,75,75);
      TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 56,56,56,56);
   BUF(LorOutput; OutPin; 75,75,75,75);
 |4,5,6,7:
   BUF(LorOutput; TNode; 56,56,56,56);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 75,75,75,75);
   %ELSE
      BUF(LorOutput; TSBInput; 75,75,75,75);
      TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
   %END;
   BUF(OutPin; FeedBack; 14,14,14,14);
 |1,3:
   BUF(LorOutput; OutPin; 75,75,75,75);
   BUF(OutPin; FeedBack; 14,14,14,14);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 75,75,75,75);
    %ELSE
       BUF(LorOutput; TSBInput; 75,75,75,75);
       TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(LorOutput; OutPin; 75,75,75,75);
   BUF(TNode; FeedBack; 14,14,14,14);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 16,16,14,0,27,27,44,44,1,1,16,16,14,0,27,27,44,44,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 75,75,75,75);
    %ELSE
       BUF(LorOutput; TSBInput; 75,75,75,75);
       TSB(TSBInput, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(LorOutput; OutPin; 75,75,75,75);
   BUF(TNode; FeedBack; 14,14,14,14);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(OutPin; FeedBack; 14,14,14,14);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(OutPin; FeedBack; 14,14,14,14);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(OutPin; FeedBack; 14,14,14,14);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(OutPin; FeedBack; 14,14,14,14);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(TNode; FeedBack; 14,14,14,14);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLKPin, Clear; TNode; 35,35,14,0,27,27,63,63,1,1,35,35,14,0,27,27,63,63,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 19,19,19,19,19,19,19,19);
    %END;
   BUF(TNode; FeedBack; 14,14,14,14);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 44,44,44,44);
   DQFFC(DInput, CLK, Clear; TNode; 56,56,14,30,27,27,44,44,1,1,56,56,14,30,27,27,44,44,1,1);
   BUF(TNode; Outpin; 19,19,19,19);
   BUF(TNode; FeedBack; 14,14,14,14);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1810JC-45
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 33,33,33,33);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 45,45,45,45);
   %ELSE
      BUF(LorOutput; TSBInput; 45,45,45,45);
      TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 33,33,33,33);
   BUF(LorOutput; OutPin; 45,45,45,45);
 |4,5,6,7:
   BUF(LorOutput; TNode; 33,33,33,33);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 45,45,45,45);
   %ELSE
      BUF(LorOutput; TSBInput; 45,45,45,45);
      TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 45,45,45,45);
    %ELSE
       BUF(LorOutput; TSBInput; 45,45,45,45);
       TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(TNode; FeedBack; 2,2,2,2);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 45,45,45,45);
    %ELSE
       BUF(LorOutput; TSBInput; 45,45,45,45);
       TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(TNode; FeedBack; 2,2,2,2);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(TNode; FeedBack; 2,2,2,2);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(TNode; FeedBack; 2,2,2,2);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1810JI-45
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 33,33,33,33);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 45,45,45,45);
   %ELSE
      BUF(LorOutput; TSBInput; 45,45,45,45);
      TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 33,33,33,33);
   BUF(LorOutput; OutPin; 45,45,45,45);
 |4,5,6,7:
   BUF(LorOutput; TNode; 33,33,33,33);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 45,45,45,45);
   %ELSE
      BUF(LorOutput; TSBInput; 45,45,45,45);
      TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 45,45,45,45);
    %ELSE
       BUF(LorOutput; TSBInput; 45,45,45,45);
       TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(TNode; FeedBack; 2,2,2,2);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 45,45,45,45);
    %ELSE
       BUF(LorOutput; TSBInput; 45,45,45,45);
       TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(TNode; FeedBack; 2,2,2,2);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(TNode; FeedBack; 2,2,2,2);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(TNode; FeedBack; 2,2,2,2);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1810JM-45
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 33,33,33,33);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 45,45,45,45);
   %ELSE
      BUF(LorOutput; TSBInput; 45,45,45,45);
      TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 33,33,33,33);
   BUF(LorOutput; OutPin; 45,45,45,45);
 |4,5,6,7:
   BUF(LorOutput; TNode; 33,33,33,33);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 45,45,45,45);
   %ELSE
      BUF(LorOutput; TSBInput; 45,45,45,45);
      TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 45,45,45,45);
    %ELSE
       BUF(LorOutput; TSBInput; 45,45,45,45);
       TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(TNode; FeedBack; 2,2,2,2);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 45,45,45,45);
    %ELSE
       BUF(LorOutput; TSBInput; 45,45,45,45);
       TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(TNode; FeedBack; 2,2,2,2);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(TNode; FeedBack; 2,2,2,2);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(TNode; FeedBack; 2,2,2,2);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1810LC-45
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 33,33,33,33);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 45,45,45,45);
   %ELSE
      BUF(LorOutput; TSBInput; 45,45,45,45);
      TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 33,33,33,33);
   BUF(LorOutput; OutPin; 45,45,45,45);
 |4,5,6,7:
   BUF(LorOutput; TNode; 33,33,33,33);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 45,45,45,45);
   %ELSE
      BUF(LorOutput; TSBInput; 45,45,45,45);
      TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 45,45,45,45);
    %ELSE
       BUF(LorOutput; TSBInput; 45,45,45,45);
       TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(TNode; FeedBack; 2,2,2,2);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 45,45,45,45);
    %ELSE
       BUF(LorOutput; TSBInput; 45,45,45,45);
       TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(TNode; FeedBack; 2,2,2,2);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(TNode; FeedBack; 2,2,2,2);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(TNode; FeedBack; 2,2,2,2);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1810LI-45
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 33,33,33,33);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 45,45,45,45);
   %ELSE
      BUF(LorOutput; TSBInput; 45,45,45,45);
      TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 33,33,33,33);
   BUF(LorOutput; OutPin; 45,45,45,45);
 |4,5,6,7:
   BUF(LorOutput; TNode; 33,33,33,33);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 45,45,45,45);
   %ELSE
      BUF(LorOutput; TSBInput; 45,45,45,45);
      TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 45,45,45,45);
    %ELSE
       BUF(LorOutput; TSBInput; 45,45,45,45);
       TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(TNode; FeedBack; 2,2,2,2);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 45,45,45,45);
    %ELSE
       BUF(LorOutput; TSBInput; 45,45,45,45);
       TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(TNode; FeedBack; 2,2,2,2);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(TNode; FeedBack; 2,2,2,2);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(TNode; FeedBack; 2,2,2,2);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1810LM-45
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 5,5,5,5);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 33,33,33,33);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 45,45,45,45);
   %ELSE
      BUF(LorOutput; TSBInput; 45,45,45,45);
      TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 33,33,33,33);
   BUF(LorOutput; OutPin; 45,45,45,45);
 |4,5,6,7:
   BUF(LorOutput; TNode; 33,33,33,33);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; OutPin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 45,45,45,45);
   %ELSE
      BUF(LorOutput; TSBInput; 45,45,45,45);
      TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 45,45,45,45);
    %ELSE
       BUF(LorOutput; TSBInput; 45,45,45,45);
       TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(TNode; FeedBack; 2,2,2,2);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 13,13,13,0,17,17,30,30,1,1,13,13,13,0,17,17,30,30,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 45,45,45,45);
    %ELSE
       BUF(LorOutput; TSBInput; 45,45,45,45);
       TSB(TSBInput, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(LorOutput; OutPin; 45,45,45,45);
   BUF(TNode; FeedBack; 2,2,2,2);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(TNode; FeedBack; 2,2,2,2);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLKPin, Clear; TNode; 25,25,13,0,17,17,42,42,1,1,25,25,13,0,17,17,42,42,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 12,12,12,12,12,12,12,12);
    %END;
   BUF(TNode; FeedBack; 2,2,2,2);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 25,25,25,25);
   DQFFC(DInput, CLK, Clear; TNode; 33,33,13,18,17,17,30,30,1,1,33,33,13,18,17,17,30,30,1,1);
   BUF(TNode; OutPin; 12,12,12,12);
   BUF(TNode; FeedBack; 2,2,2,2);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1810JC-55
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 1,1,1,1);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 40,40,40,40);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 55,55,55,55);
   %ELSE
      BUF(LorOutput; TSBInput; 55,55,55,55);
      TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 40,40,40,40);
   BUF(LorOutput; OutPin; 55,55,55,55);
 |4,5,6,7:
   BUF(LorOutput; TNode; 40,40,40,40);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 32,32,16,0,20,20,50,50,1,1,32,32,16,0,20,20,50,50,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 32,32,16,0,20,20,50,50,1,1,32,32,16,0,20,20,50,50,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 17,17,16,0,20,20,35,35,1,1,17,17,16,0,20,20,35,35,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 17,17,16,0,20,20,35,35,1,1,17,17,16,0,20,20,35,35,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 55,55,55,55);
   %ELSE
      BUF(LorOutput; TSBInput; 55,55,55,55);
      TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
   %END;
   BUF(OutPin; FeedBack; 4,4,4,4);
 |1,3:
   BUF(LorOutput; OutPin; 55,55,55,55);
   BUF(OutPin; FeedBack; 4,4,4,4);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 17,17,16,0,20,20,35,35,1,1,17,17,16,0,20,20,35,35,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 55,55,55,55);
    %ELSE
       BUF(LorOutput; TSBInput; 55,55,55,55);
       TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 4,4,4,4);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(LorOutput; OutPin; 55,55,55,55);
   BUF(TNode; FeedBack; 4,4,4,4);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 17,17,16,0,20,20,35,35,1,1,17,17,16,0,20,20,35,35,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 55,55,55,55);
    %ELSE
       BUF(LorOutput; TSBInput; 55,55,55,55);
       TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 4,4,4,4);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(LorOutput; OutPin; 55,55,55,55);
   BUF(TNode; FeedBack; 4,4,4,4);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 32,32,16,0,20,20,50,50,1,1,32,32,16,0,20,20,50,50,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(Outpin; FeedBack; 4,4,4,4);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(Outpin; FeedBack; 4,4,4,4);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 32,32,16,0,20,20,50,50,1,1,32,32,16,0,20,20,50,50,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(Outpin; FeedBack; 4,4,4,4);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(Outpin; FeedBack; 4,4,4,4);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 32,32,16,0,20,20,50,50,1,1,32,32,16,0,20,20,50,50,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 4,4,4,4);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(TNode; FeedBack; 4,4,4,4);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 32,32,16,0,20,20,50,50,1,1,32,32,16,0,20,20,50,50,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 4,4,4,4);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(TNode; FeedBack; 4,4,4,4);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *
LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL

%StartModel
%Manufacturer:Altera
%Type:EP1800
%PartNumber:EP1810LC-55
%LastNode ? ?
%NumPins: 68
%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

%MACRO IODelay(OutPin:%TEXT, FDFNode:%TEXT);
    BUF(OutPin; FDFNode; 1,1,1,1);
%MACEND;

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+88, %InFuse+176, %InFuse+264, %InFuse+352, %InFuse+440,
      %InFuse+528, %InFuse+616; LorOutput);
 %END;
%MACEND;

%MACRO EP1800GLOBAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
       XorInput:%TEXT, InFuse:%FF, TNode:%TEXT, CLK:%TEXT, ClrFuse:%FF,
       Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   BUF(LorOutput; TNode; 40,40,40,40);
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 55,55,55,55);
   %ELSE
      BUF(LorOutput; TSBInput; 55,55,55,55);
      TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
   %END;
 |1,3:
   BUF(LorOutput; TNode; 40,40,40,40);
   BUF(LorOutput; OutPin; 55,55,55,55);
 |4,5,6,7:
   BUF(LorOutput; TNode; 40,40,40,40);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 32,32,16,0,20,20,50,50,1,1,32,32,16,0,20,20,50,50,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 32,32,16,0,20,20,50,50,1,1,32,32,16,0,20,20,50,50,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 17,17,16,0,20,20,35,35,1,1,17,17,16,0,20,20,35,35,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 17,17,16,0,20,20,35,35,1,1,17,17,16,0,20,20,35,35,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   TSB(zero, ZERO; Outpin; 1,1,1,1,1,1,1,1);
 %END;
%MACEND;

%MACRO EP1800LOCAL(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT, DInput:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
      BUF(LorOutput; OutPin; 55,55,55,55);
   %ELSE
      BUF(LorOutput; TSBInput; 55,55,55,55);
      TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
   %END;
   BUF(OutPin; FeedBack; 4,4,4,4);
 |1,3:
   BUF(LorOutput; OutPin; 55,55,55,55);
   BUF(OutPin; FeedBack; 4,4,4,4);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 17,17,16,0,20,20,35,35,1,1,17,17,16,0,20,20,35,35,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 55,55,55,55);
    %ELSE
       BUF(LorOutput; TSBInput; 55,55,55,55);
       TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 4,4,4,4);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(LorOutput; OutPin; 55,55,55,55);
   BUF(TNode; FeedBack; 4,4,4,4);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 17,17,16,0,20,20,35,35,1,1,17,17,16,0,20,20,35,35,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(LorOutput; OutPin; 55,55,55,55);
    %ELSE
       BUF(LorOutput; TSBInput; 55,55,55,55);
       TSB(TSBInput, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 4,4,4,4);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(LorOutput; OutPin; 55,55,55,55);
   BUF(TNode; FeedBack; 4,4,4,4);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 32,32,16,0,20,20,50,50,1,1,32,32,16,0,20,20,50,50,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(Outpin; FeedBack; 4,4,4,4);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(Outpin; FeedBack; 4,4,4,4);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 32,32,16,0,20,20,50,50,1,1,32,32,16,0,20,20,50,50,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(Outpin; FeedBack; 4,4,4,4);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(Outpin; FeedBack; 4,4,4,4);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 32,32,16,0,20,20,50,50,1,1,32,32,16,0,20,20,50,50,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 4,4,4,4);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(LorOutput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(TNode; FeedBack; 4,4,4,4);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLKPin, Clear; TNode; 32,32,16,0,20,20,50,50,1,1,32,32,16,0,20,20,50,50,1,1);
    %IF %EnableFuse..%EnableFuse+87 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 15,15,15,15,15,15,15,15);
    %END;
   BUF(TNode; FeedBack; 4,4,4,4);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   BUF(XorInput; DInput; 30,30,30,30);
   DQFFC(DInput, CLK, Clear; TNode; 40,40,16,23,20,20,35,35,1,1,40,40,16,23,20,20,35,35,1,1);
   BUF(TNode; OutPin; 15,15,15,15);
   BUF(TNode; FeedBack; 4,4,4,4);
 %END;
%MACEND;

SET(LARGEMODEL);

IODelay(P47, N49);
IODelay(P46, N50);
IODelay(P45, N51);
IODelay(P44, N52);
IODelay(P23, N53);
IODelay(P24, N54);
IODelay(P25, N55);
IODelay(P26, N56);
IODelay(P13, N57);
IODelay(P12, N58);
IODelay(P11, N59);
IODelay(P10, N60);
IODelay(P57, N61);
IODelay(P58, N62);
IODelay(P59, N63);
IODelay(P60, N64);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

LOR8(%SF42240, %FF00, L1);
LOR8(%SF42245, %FF880, L2);
LOR8(%SF42250, %FF1760, L3);
LOR8(%SF42255, %FF2640, L4);
LOR8(%SF42260, %FF3520, L5);
LOR8(%SF42265, %FF4400, L6);
LOR8(%SF42270, %FF5280, L7);
LOR8(%SF42275, %FF6160, L8);
LOR8(%SF42280, %FF7040, L9);
LOR8(%SF42285, %FF7920, L10);
LOR8(%SF42290, %FF8800, L11);
LOR8(%SF42295, %FF9680, L12);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42300, %FF10560, L13);
LOR8(%SF42305, %FF11440, L14);
LOR8(%SF42310, %FF12320, L15);
LOR8(%SF42315, %FF13200, L16);
LOR8(%SF42320, %FF14080, L17);
LOR8(%SF42325, %FF14960, L18);
LOR8(%SF42330, %FF15840, L19);
LOR8(%SF42335, %FF16720, L20);
LOR8(%SF42340, %FF17600, L21);
LOR8(%SF42345, %FF18480, L22);
LOR8(%SF42350, %FF19360, L23);
LOR8(%SF42355, %FF20240, L24);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42360, %FF21120, L25);
LOR8(%SF42365, %FF22000, L26);
LOR8(%SF42370, %FF22880, L27);
LOR8(%SF42375, %FF23760, L28);
LOR8(%SF42380, %FF24640, L29);
LOR8(%SF42385, %FF25520, L30);
LOR8(%SF42390, %FF26400, L31);
LOR8(%SF42395, %FF27280, L32);
LOR8(%SF42400, %FF28160, L33);
LOR8(%SF42405, %FF29040, L34);
LOR8(%SF42410, %FF29920, L35);
LOR8(%SF42415, %FF30800, L36);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

LOR8(%SF42420, %FF31680, L37);
LOR8(%SF42425, %FF32560, L38);
LOR8(%SF42430, %FF33440, L39);
LOR8(%SF42435, %FF34320, L40);
LOR8(%SF42440, %FF35200, L41);
LOR8(%SF42445, %FF36080, L42);
LOR8(%SF42450, %FF36960, L43);
LOR8(%SF42455, %FF37840, L44);
LOR8(%SF42460, %FF38720, L45);
LOR8(%SF42465, %FF39600, L46);
LOR8(%SF42470, %FF40480, L47);
LOR8(%SF42475, %FF41360, L48);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42281, %SF7832, L9, P10, L49, %FF7832, N4, N113, %FF7744, L97, N177, P17, N193);
EP1800GLOBAL(%SF42286, %SF8712, L10, P11, L50, %FF8712, N3, N114, %FF8624, L98, N178, P17, N194);
EP1800GLOBAL(%SF42291, %SF9592, L11, P12, L51, %FF9592, N2, N115, %FF9504, L99, N179, P17, N195);
EP1800GLOBAL(%SF42296, %SF10472, L12, P13, L52, %FF10472, N1, N116, %FF10384, L100, N180, P17, N196);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42301, %SF11352, L13, P23, L53, %FF11352, N13, N133, %FF11264, L101, N181, P19, N197);
EP1800GLOBAL(%SF42306, %SF12232, L14, P24, L54, %FF12232, N14, N134, %FF12144, L102, N182, P19, N198);
EP1800GLOBAL(%SF42311, %SF13112, L15, P25, L55, %FF13112, N15, N135, %FF13024, L103, N183, P19, N199);
EP1800GLOBAL(%SF42316, %SF13992, L16, P26, L56, %FF13992, N16, N136, %FF13904, L104, N184, P19, N200);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42401, %SF28952, L33, P44, L57, %FF28952, N28, N137, %FF28864, L105, N185, P51, N201);
EP1800GLOBAL(%SF42406, %SF29832, L34, P45, L58, %FF29832, N27, N138, %FF29744, L106, N186, P51, N202);
EP1800GLOBAL(%SF42411, %SF30712, L35, P46, L59, %FF30712, N26, N139, %FF30624, L107, N187, P51, N203);
EP1800GLOBAL(%SF42416, %SF31592, L36, P47, L60, %FF31592, N25, N140, %FF31504, L108, N188, P51, N204);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800GLOBAL(%SF42421, %SF32472, L37, P57, L61, %FF32472, N37, N141, %FF32384, L109, N189, P53, N205);
EP1800GLOBAL(%SF42426, %SF33352, L38, P58, L62, %FF33352, N38, N142, %FF33264, L110, N190, P53, N206);
EP1800GLOBAL(%SF42431, %SF34232, L39, P59, L63, %FF34232, N39, N143, %FF34144, L111, N191, P53, N207);
EP1800GLOBAL(%SF42436, %SF35112, L40, P60, L64, %FF35112, N40, N144, %FF35024, L112, N192, P53, N208);

%FDF AND 0 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8 ~N9 N9
	   ~N10 N10 ~N11 N11 ~N12 N12 ~N49 N49 ~N50 N50 ~N51 N51 ~N52 N52
	   ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57 ~N58 N58 ~N59 N59
	   ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64 ~P50 P50 ~P49 P49
	   ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16 ~P15 P15 ~P14 P14
	   ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19 ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42241, %SF792, L1, P2, L65, %FF792, N12, N65, N97, %FF704, L113, N145, P17, N209);
EP1800LOCAL(%SF42246, %SF1672, L2, P3, L66, %FF1672, N11, N66, N98, %FF1584, L114, N146, P17, N210);
EP1800LOCAL(%SF42251, %SF2552, L3, P4, L67, %FF2552, N10, N67, N99, %FF2464, L115, N147, P17, N211);
EP1800LOCAL(%SF42256, %SF3432, L4, P5, L68, %FF3432, N9, N68, N100, %FF3344, L116, N148, P17, N212);
EP1800LOCAL(%SF42261, %SF4312, L5, P6, L69, %FF4312, N8, N69, N101, %FF4224, L117, N149, P17, N213);
EP1800LOCAL(%SF42266, %SF5192, L6, P7, L70, %FF5192, N7, N70, N102, %FF5104, L118, N150, P17, N214);
EP1800LOCAL(%SF42271, %SF6072, L7, P8, L71, %FF6072, N6, N71, N103, %FF5984, L119, N151, P17, N215);
EP1800LOCAL(%SF42276, %SF6952, L8, P9, L72, %FF6952, N5, N72, N104, %FF6864, L120, N152, P17, N216);

%FDF AND 0 ~N13 N13 ~N14 N14 ~N15 N15 ~N16 N16 ~N17 N17 ~N18 N18 ~N19 N19
           ~N20 N20 ~N21 N21 ~N22 N22 ~N23 N23 ~N24 N24 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42321, %SF14872, L17, P27, L73, %FF14872, N17, N73, N105, %FF14784, L121, N153, P19, N217);
EP1800LOCAL(%SF42326, %SF15752, L18, P28, L74, %FF15752, N18, N74, N106, %FF15664, L122, N154, P19, N218);
EP1800LOCAL(%SF42331, %SF16632, L19, P29, L75, %FF16632, N19, N75, N107, %FF16544, L123, N155, P19, N219);
EP1800LOCAL(%SF42336, %SF17512, L20, P30, L76, %FF17512, N20, N76, N108, %FF17424, L124, N156, P19, N220);
EP1800LOCAL(%SF42341, %SF18392, L21, P31, L77, %FF18392, N21, N77, N109, %FF18304, L125, N157, P19, N221);
EP1800LOCAL(%SF42346, %SF19272, L22, P32, L78, %FF19272, N22, N78, N110, %FF19184, L126, N158, P19, N222);
EP1800LOCAL(%SF42351, %SF20152, L23, P33, L79, %FF20152, N23, N79, N111, %FF20064, L127, N159, P19, N223);
EP1800LOCAL(%SF42356, %SF21032, L24, P34, L80, %FF21032, N24, N80, N112, %FF20944, L128, N160, P19, N224);

%FDF AND 0 ~N25 N25 ~N26 N26 ~N27 N27 ~N28 N28 ~N29 N29 ~N30 N30 ~N31 N31
           ~N32 N32 ~N33 N33 ~N34 N34 ~N35 N35 ~N36 N36 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42361, %SF21912, L25, P36, L81, %FF21912, N36, N81, N113, %FF21824, L129, N161, P51, N225);
EP1800LOCAL(%SF42366, %SF22792, L26, P37, L82, %FF22792, N35, N82, N114, %FF22704, L130, N162, P51, N226);
EP1800LOCAL(%SF42371, %SF23672, L27, P38, L83, %FF23672, N34, N83, N115, %FF23584, L131, N163, P51, N227);
EP1800LOCAL(%SF42376, %SF24552, L28, P39, L84, %FF24552, N33, N84, N116, %FF24464, L132, N164, P51, N228);
EP1800LOCAL(%SF42381, %SF25432, L29, P40, L85, %FF25432, N32, N85, N117, %FF25344, L133, N165, P51, N229);
EP1800LOCAL(%SF42386, %SF26312, L30, P41, L86, %FF26312, N31, N86, N118, %FF26224, L134, N166, P51, N230);
EP1800LOCAL(%SF42391, %SF27192, L31, P42, L87, %FF27192, N30, N87, N119, %FF27104, L135, N167, P51, N231);
EP1800LOCAL(%SF42396, %SF28072, L32, P43, L88, %FF28072, N29, N88, N120, %FF27984, L136, N168, P51, N232);

%FDF AND 0 ~N37 N37 ~N38 N38 ~N39 N39 ~N40 N40 ~N41 N41 ~N42 N42 ~N43 N43
           ~N44 N44 ~N45 N45 ~N46 N46 ~N47 N47 ~N48 N48 ~N49 N49 ~N50 N50
	   ~N51 N51 ~N52 N52 ~N53 N53 ~N54 N54 ~N55 N55 ~N56 N56 ~N57 N57
	   ~N58 N58 ~N59 N59 ~N60 N60 ~N61 N61 ~N62 N62 ~N63 N63 ~N64 N64
	   ~P50 P50 ~P49 P49 ~P48 P48 ~P20 P20 ~P21 P21 ~P22 P22 ~P16 P16
	   ~P15 P15 ~P14 P14 ~P54 P54 ~P55 P55 ~P56 P56 ~P51 P51 ~P19 P19
	   ~P17 P17 ~P53 P53 *

EP1800LOCAL(%SF42441, %SF35992, L41, P61, L89, %FF35992, N41, N89, N121, %FF35904, L137, N169, P53, N233);
EP1800LOCAL(%SF42446, %SF36872, L42, P62, L90, %FF36872, N42, N90, N122, %FF36784, L138, N170, P53, N234);
EP1800LOCAL(%SF42451, %SF37752, L43, P63, L91, %FF37752, N43, N91, N123, %FF37664, L139, N171, P53, N235);
EP1800LOCAL(%SF42456, %SF38632, L44, P64, L92, %FF38632, N44, N92, N124, %FF38544, L140, N172, P53, N236);
EP1800LOCAL(%SF42461, %SF39512, L45, P65, L93, %FF39512, N45, N93, N125, %FF39424, L141, N173, P53, N237);
EP1800LOCAL(%SF42466, %SF40392, L46, P66, L94, %FF40392, N46, N94, N126, %FF40304, L142, N174, P53, N238);
EP1800LOCAL(%SF42471, %SF41272, L47, P67, L95, %FF41272, N47, N95, N127, %FF41184, L143, N175, P53, N239);
EP1800LOCAL(%SF42476, %SF42152, L48, P68, L96, %FF42152, N48, N96, N128, %FF42064, L144, N176, P53, N240);

%ENDMODEL