(***************************************************************************)
(*                                                                         *)
(*                         Copyright (C) 1987-1990                         *)
(*                      by Gogesch Micro Systems, INC.                     *)
(*                                                                         *)
(*                           All rights reserved.                          *)
(*                                                                         *)
(***************************************************************************)


%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP600DC
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 53,53,53,53);
   %ELSE
      BUF(LorOutput; TSBInput; 53,53,53,53);
      TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 2,2,2,2);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP600DC-3
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 43,43,43,43);
   %ELSE
      BUF(LorOutput; TSBInput; 43,43,43,43);
      TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP600DI
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 53,53,53,53);
   %ELSE
      BUF(LorOutput; TSBInput; 53,53,53,53);
      TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 2,2,2,2);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP600DI-3
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 43,43,43,43);
   %ELSE
      BUF(LorOutput; TSBInput; 43,43,43,43);
      TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP600DM
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 53,53,53,53);
   %ELSE
      BUF(LorOutput; TSBInput; 53,53,53,53);
      TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 2,2,2,2);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP600LC
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 53,53,53,53);
   %ELSE
      BUF(LorOutput; TSBInput; 53,53,53,53);
      TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP600LC-3
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 43,43,43,43);
   %ELSE
      BUF(LorOutput; TSBInput; 43,43,43,43);
      TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP600LI
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 53,53,53,53);
   %ELSE
      BUF(LorOutput; TSBInput; 53,53,53,53);
      TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP600LI-3
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 43,43,43,43);
   %ELSE
      BUF(LorOutput; TSBInput; 43,43,43,43);
      TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP600LM
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 53,53,53,53);
   %ELSE
      BUF(LorOutput; TSBInput; 53,53,53,53);
      TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP600JC
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 53,53,53,53);
   %ELSE
      BUF(LorOutput; TSBInput; 53,53,53,53);
      TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP600JC-3
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 43,43,43,43);
   %ELSE
      BUF(LorOutput; TSBInput; 43,43,43,43);
      TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP600JI
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 53,53,53,53);
   %ELSE
      BUF(LorOutput; TSBInput; 53,53,53,53);
      TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP600JI-3
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 43,43,43,43);
   %ELSE
      BUF(LorOutput; TSBInput; 43,43,43,43);
      TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP600JM
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 53,53,53,53);
   %ELSE
      BUF(LorOutput; TSBInput; 53,53,53,53);
      TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP600PC
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 53,53,53,53);
   %ELSE
      BUF(LorOutput; TSBInput; 53,53,53,53);
      TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 2,2,2,2);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP600PC-3
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 43,43,43,43);
   %ELSE
      BUF(LorOutput; TSBInput; 43,43,43,43);
      TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP600PI
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 53,53,53,53);
   %ELSE
      BUF(LorOutput; TSBInput; 53,53,53,53);
      TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 53,53,53,53);
    %ELSE
       BUF(LorOutput; TSBInput; 53,53,53,53);
       TSB(TSBInput, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(LorOutput; Outpin; 53,53,53,53);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 2,2,2,2);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 25,25,43,0,22,22,55,55,0,0,25,25,43,0,22,22,55,55,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 55,55,55,55,55,55,55,55);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 58,58,10,15,22,22,55,55,0,0,58,58,10,15,22,22,55,55,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP600PI-3
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 43,43,43,43);
   %ELSE
      BUF(LorOutput; TSBInput; 43,43,43,43);
      TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 43,43,43,43);
    %ELSE
       BUF(LorOutput; TSBInput; 43,43,43,43);
       TSB(TSBInput, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(LorOutput; Outpin; 43,43,43,43);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 22,22,38,0,18,18,45,45,0,0,22,22,38,0,18,18,45,45,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 45,45,45,45,45,45,45,45);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 50,50,10,15,18,18,45,45,0,0,50,50,10,15,18,18,45,45,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);   
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);   
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);   
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);   
%EndModel      

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP610DC-25
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13 
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *
	 
%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE            
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;     
%MACEND;      

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT, 
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2: 
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 25,25,25,25);
   %ELSE
      BUF(LorOutput; TSBInput; 25,25,25,25);       
      TSB(TSBInput, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);    
 |1,3:
   BUF(LorOutput; Outpin; 25,25,25,25);
   BUF(OutPin; FeedBack; 2,2,2,2);    
 |4:                    
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);        
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 25,25,25,25);
    %ELSE
       BUF(LorOutput; TSBInput; 25,25,25,25);
       TSB(TSBInput, %InFuse; Outpin; 22,22,22,22,22,22,22,22);       
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);    
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);         
   BUF(LorOutput; Outpin; 25,25,25,25);
   BUF(TNode; FeedBack; 0,0,0,0);    
 |6:
   LXOR(LorOutput, TNode; XorInput);      
   LNOR(%ClrFuse, IPH; Clear);      
   DQFFC(XorInput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);       
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 25,25,25,25);
    %ELSE
       BUF(LorOutput; TSBInput; 25,25,25,25); 
       TSB(TSBInput, %InFuse; Outpin; 22,22,22,22,22,22,22,22);       
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);   
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(XorInput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);         
   BUF(LorOutput; Outpin; 25,25,25,25);
   BUF(TNode; FeedBack; 0,0,0,0);   
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);         
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);       
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);    
 |9:   
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);         
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);    
 |10:
   LXOR(LorOutput, TNode; XorInput);      
   LNOR(%ClrFuse, IPH; Clear);      
   DQFFC(XorInput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);        
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);       
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);   
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(XorInput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);         
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);   
 |12:    
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);         
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);       
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);       
 |13:
   AND(%InFuse; CLK; 0,0,0,0);   
   LNOR(%ClrFuse, IPH; Clear);  
   DQFFC(LorOutput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);         
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);    
 |14:   
   LXOR(LorOutput, TNode; XorInput);      
   LNOR(%ClrFuse, IPH; Clear);      
   DQFFC(XorInput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);        
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);       
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);   
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(XorInput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);         
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);   
 %END;
%MACEND;   

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);   
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);   
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);   
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);   
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);   
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);   
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);   
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);   
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);   
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);   
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);   
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);   
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);   
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);   
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);   
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);   
%EndModel      

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP610DC-30
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13 
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *
	 
%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE            
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;     
%MACEND;      

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT, 
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2: 
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 30,30,30,30);
   %ELSE
      BUF(LorOutput; TSBInput; 30,30,30,30);       
      TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);    
 |1,3:
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(OutPin; FeedBack; 2,2,2,2);    
 |4:                    
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30);
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);       
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);    
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);         
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);    
 |6:
   LXOR(LorOutput, TNode; XorInput);      
   LNOR(%ClrFuse, IPH; Clear);      
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);       
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30); 
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);       
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);   
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);         
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);   
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);         
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);       
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);    
 |9:   
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);         
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);    
 |10:
   LXOR(LorOutput, TNode; XorInput);      
   LNOR(%ClrFuse, IPH; Clear);      
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);        
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);       
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);   
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);         
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);   
 |12:    
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);         
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);       
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);       
 |13:
   AND(%InFuse; CLK; 0,0,0,0);   
   LNOR(%ClrFuse, IPH; Clear);  
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);         
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);    
 |14:   
   LXOR(LorOutput, TNode; XorInput);      
   LNOR(%ClrFuse, IPH; Clear);      
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);        
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);       
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);   
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);         
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);   
 %END;
%MACEND;   

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);   
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);   
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);   
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);   
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);   
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);   
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);   
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);   
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);   
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);   
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);   
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);   
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);   
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);   
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);   
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);   
%EndModel      

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP610DC-35
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13 
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *
	 
%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE            
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;     
%MACEND;      

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT, 
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2: 
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 35,35,35,35);
   %ELSE
      BUF(LorOutput; TSBInput; 35,35,35,35);       
      TSB(TSBInput, %InFuse; Outpin; 30,30,30,30,30,30,30,30);       
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);    
 |1,3:
   BUF(LorOutput; Outpin; 35,35,35,35);
   BUF(OutPin; FeedBack; 2,2,2,2);    
 |4:                    
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 35,35,35,35);
    %ELSE
       BUF(LorOutput; TSBInput; 35,35,35,35);
       TSB(TSBInput, %InFuse; Outpin; 30,30,30,30,30,30,30,30);       
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);    
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);         
   BUF(LorOutput; Outpin; 35,35,35,35);
   BUF(TNode; FeedBack; 0,0,0,0);    
 |6:
   LXOR(LorOutput, TNode; XorInput);      
   LNOR(%ClrFuse, IPH; Clear);      
   DQFFC(XorInput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);       
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 35,35,35,35);
    %ELSE
       BUF(LorOutput; TSBInput; 35,35,35,35); 
       TSB(TSBInput, %InFuse; Outpin; 30,30,30,30,30,30,30,30);       
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);   
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(XorInput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);         
   BUF(LorOutput; Outpin; 35,35,35,35);
   BUF(TNode; FeedBack; 0,0,0,0);   
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);         
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);       
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);    
 |9:   
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);         
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);    
 |10:
   LXOR(LorOutput, TNode; XorInput);      
   LNOR(%ClrFuse, IPH; Clear);      
   DQFFC(XorInput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);        
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);       
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);   
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(XorInput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);         
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);   
 |12:    
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);         
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);       
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);       
 |13:
   AND(%InFuse; CLK; 0,0,0,0);   
   LNOR(%ClrFuse, IPH; Clear);  
   DQFFC(LorOutput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);         
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);    
 |14:   
   LXOR(LorOutput, TNode; XorInput);      
   LNOR(%ClrFuse, IPH; Clear);      
   DQFFC(XorInput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);        
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);       
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);   
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(XorInput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);         
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);   
 %END;
%MACEND;   

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);   
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);   
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);   
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);   
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);   
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);   
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);   
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);   
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);   
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);   
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);   
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);   
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);   
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);   
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);   
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);   
%EndModel      

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP610DI-30
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13 
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *
	 
%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE            
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;     
%MACEND;      

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT, 
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2: 
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 30,30,30,30);
   %ELSE
      BUF(LorOutput; TSBInput; 30,30,30,30);       
      TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);       
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);    
 |1,3:
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(OutPin; FeedBack; 2,2,2,2);    
 |4:                    
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);        
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30);
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);       
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);    
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);         
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);    
 |6:
   LXOR(LorOutput, TNode; XorInput);      
   LNOR(%ClrFuse, IPH; Clear);      
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);       
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30); 
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);       
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);   
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);         
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);   
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);         
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);       
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);    
 |9:   
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);         
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);    
 |10:
   LXOR(LorOutput, TNode; XorInput);      
   LNOR(%ClrFuse, IPH; Clear);      
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);        
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);       
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);   
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);         
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);   
 |12:    
   LNOR(%ClrFuse, IPH; Clear);   
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);         
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);       
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);       
 |13:
   AND(%InFuse; CLK; 0,0,0,0);   
   LNOR(%ClrFuse, IPH; Clear);  
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);         
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);    
 |14:   
   LXOR(LorOutput, TNode; XorInput);      
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel


%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP610JC-25
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 25,25,25,25);
   %ELSE
      BUF(LorOutput; TSBInput; 25,25,25,25);
      TSB(TSBInput, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 25,25,25,25);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 25,25,25,25);
    %ELSE
       BUF(LorOutput; TSBInput; 25,25,25,25);
       TSB(TSBInput, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(LorOutput; Outpin; 25,25,25,25);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 25,25,25,25);
    %ELSE
       BUF(LorOutput; TSBInput; 25,25,25,25);
       TSB(TSBInput, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(LorOutput; Outpin; 25,25,25,25);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP610JC-30
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 30,30,30,30);
   %ELSE
      BUF(LorOutput; TSBInput; 30,30,30,30);
      TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30);
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30);
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP610JC-35
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 35,35,35,35);
   %ELSE
      BUF(LorOutput; TSBInput; 35,35,35,35);
      TSB(TSBInput, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 35,35,35,35);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 35,35,35,35);
    %ELSE
       BUF(LorOutput; TSBInput; 35,35,35,35);
       TSB(TSBInput, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(LorOutput; Outpin; 35,35,35,35);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 35,35,35,35);
    %ELSE
       BUF(LorOutput; TSBInput; 35,35,35,35);
       TSB(TSBInput, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(LorOutput; Outpin; 35,35,35,35);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP610JI-30
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 30,30,30,30);
   %ELSE
      BUF(LorOutput; TSBInput; 30,30,30,30);
      TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30);
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30);
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP610LC-25
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 25,25,25,25);
   %ELSE
      BUF(LorOutput; TSBInput; 25,25,25,25);
      TSB(TSBInput, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 25,25,25,25);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 25,25,25,25);
    %ELSE
       BUF(LorOutput; TSBInput; 25,25,25,25);
       TSB(TSBInput, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(LorOutput; Outpin; 25,25,25,25);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 25,25,25,25);
    %ELSE
       BUF(LorOutput; TSBInput; 25,25,25,25);
       TSB(TSBInput, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(LorOutput; Outpin; 25,25,25,25);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP610LC-30
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 30,30,30,30);
   %ELSE
      BUF(LorOutput; TSBInput; 30,30,30,30);
      TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30);
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30);
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP610LC-35
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 35,35,35,35);
   %ELSE
      BUF(LorOutput; TSBInput; 35,35,35,35);
      TSB(TSBInput, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 35,35,35,35);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 35,35,35,35);
    %ELSE
       BUF(LorOutput; TSBInput; 35,35,35,35);
       TSB(TSBInput, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(LorOutput; Outpin; 35,35,35,35);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 35,35,35,35);
    %ELSE
       BUF(LorOutput; TSBInput; 35,35,35,35);
       TSB(TSBInput, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(LorOutput; Outpin; 35,35,35,35);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600L
%PartNumber:EP610LI-30
%LastNode ? ?
%NumPins: 28
%FDF AND 0 ~P3 P3 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P13 P13 ~P17 P17 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P27 P27 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 30,30,30,30);
   %ELSE
      BUF(LorOutput; TSBInput; 30,30,30,30);
      TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30);
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30);
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P4, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P2);
EP600(%SF6446, %SF3960, L2, P5, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P2);
EP600(%SF6451, %SF4360, L3, P6, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P2);
EP600(%SF6456, %SF4760, L4, P7, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P2);
EP600(%SF6461, %SF5160, L5, P8, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P2);
EP600(%SF6466, %SF5560, L6, P9, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P2);
EP600(%SF6471, %SF5960, L7, P10, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P2);
EP600(%SF6476, %SF6360, L8, P12, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P2);
EP600(%SF6436, %SF3160, L9, P18, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P16);
EP600(%SF6431, %SF2760, L10, P20, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P16);
EP600(%SF6426, %SF2360, L11, P21, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P16);
EP600(%SF6421, %SF1960, L12, P22, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P16);
EP600(%SF6416, %SF1560, L13, P23, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P16);
EP600(%SF6411, %SF1160, L14, P24, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P16);
EP600(%SF6406, %SF760, L15, P25, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P16);
EP600(%SF6401, %SF360, L16, P26, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P16);
%EndModel


%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP610PC-25
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 25,25,25,25);
   %ELSE
      BUF(LorOutput; TSBInput; 25,25,25,25);
      TSB(TSBInput, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 25,25,25,25);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 25,25,25,25);
    %ELSE
       BUF(LorOutput; TSBInput; 25,25,25,25);
       TSB(TSBInput, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(LorOutput; Outpin; 25,25,25,25);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 25,25,25,25);
    %ELSE
       BUF(LorOutput; TSBInput; 25,25,25,25);
       TSB(TSBInput, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(LorOutput; Outpin; 25,25,25,25);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 13,13,15,0,8,8,22,22,0,0,13,13,15,0,8,8,22,22,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 22,22,22,22,22,22,22,22);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 22,22,6,6,8,8,22,22,0,0,22,22,6,6,8,8,22,22,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP610PC-30
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 30,30,30,30);
   %ELSE
      BUF(LorOutput; TSBInput; 30,30,30,30);
      TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30);
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30);
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP610PC-35
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 35,35,35,35);
   %ELSE
      BUF(LorOutput; TSBInput; 35,35,35,35);
      TSB(TSBInput, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 35,35,35,35);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 35,35,35,35);
    %ELSE
       BUF(LorOutput; TSBInput; 35,35,35,35);
       TSB(TSBInput, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(LorOutput; Outpin; 35,35,35,35);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 35,35,35,35);
    %ELSE
       BUF(LorOutput; TSBInput; 35,35,35,35);
       TSB(TSBInput, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(LorOutput; Outpin; 35,35,35,35);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP610PI-30
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 30,30,30,30);
   %ELSE
      BUF(LorOutput; TSBInput; 30,30,30,30);
      TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30);
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 30,30,30,30);
    %ELSE
       BUF(LorOutput; TSBInput; 30,30,30,30);
       TSB(TSBInput, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(LorOutput; Outpin; 30,30,30,30);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 16,16,20,0,10,10,26,26,0,0,16,16,20,0,10,10,26,26,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 26,26,26,26,26,26,26,26);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 26,26,6,6,10,10,26,26,0,0,26,26,6,6,10,10,26,26,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel

%StartModel
%Manufacturer:Altera
%Type:EP600
%PartNumber:EP610PI-35
%LastNode ? ?
%NumPins: 24
%FDF AND 0 ~P2 P2 ~N1 N1 ~N2 N2 ~N3 N3 ~N4 N4 ~N5 N5 ~N6 N6 ~N7 N7 ~N8 N8
         ~P11 P11 ~P14 P14 ~N9 N9 ~N10 N10 ~N11 N11 ~N12 N12 ~N13 N13
	 ~N14 N14 ~N15 N15 ~N16 N16 ~P23 P23 *

%MACRO LOR8(PolarityFuse:%SF, InFuse:%FF, LorOutput:%TEXT);
 %IF %PolarityFuse = 1 %THEN
  LOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %ELSE
  LNOR(%InFuse, %InFuse+40, %InFuse+80, %InFuse+120, %InFuse+160, %InFuse+200,
      %InFuse+240, %InFuse+280; LorOutput);
 %END;
%MACEND;

%MACRO EP600(ArchBit:%SF, EnableFuse:%SF, LorOutput:%TEXT, Outpin:%TEXT,
      XorInput:%TEXT, InFuse:%FF, FeedBack:%TEXT, TNode:%TEXT, CLK:%TEXT,
      ClrFuse:%FF, Clear:%TEXT, TSBInput:%TEXT, CLKPin:%TEXT);

%CASE %ArchBit+3, %ArchBit+2, %ArchBit+1, %ArchBit

  0,2:
   %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
      BUF(LorOutput; Outpin; 35,35,35,35);
   %ELSE
      BUF(LorOutput; TSBInput; 35,35,35,35);
      TSB(TSBInput, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
   %END;
   BUF(OutPin; FeedBack; 2,2,2,2);
 |1,3:
   BUF(LorOutput; Outpin; 35,35,35,35);
   BUF(OutPin; FeedBack; 2,2,2,2);
 |4:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 35,35,35,35);
    %ELSE
       BUF(LorOutput; TSBInput; 35,35,35,35);
       TSB(TSBInput, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |5:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(LorOutput; Outpin; 35,35,35,35);
   BUF(TNode; FeedBack; 0,0,0,0);
 |6:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(LorOutput; Outpin; 35,35,35,35);
    %ELSE
       BUF(LorOutput; TSBInput; 35,35,35,35);
       TSB(TSBInput, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |7:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(LorOutput; Outpin; 35,35,35,35);
   BUF(TNode; FeedBack; 0,0,0,0);
 |8:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |9:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |10:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(Outpin; FeedBack; 2,2,2,2);
 |11:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(Outpin; FeedBack; 2,2,2,2);
 |12:
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |13:
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(LorOutput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 |14:
   LXOR(LorOutput, TNode; XorInput);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLKPin, Clear; TNode; 18,18,25,0,13,13,30,30,0,0,18,18,25,0,13,13,30,30,0,0);
    %IF %EnableFuse..%EnableFuse+39 = 1 %THEN
       BUF(TNode; Outpin; 0,0,0,0);
    %ELSE
       TSB(TNode, %InFuse; Outpin; 30,30,30,30,30,30,30,30);
    %END;
   BUF(TNode; FeedBack; 0,0,0,0);
 |15:
   LXOR(LorOutput, TNode; XorInput);
   AND(%InFuse; CLK; 0,0,0,0);
   LNOR(%ClrFuse, IPH; Clear);
   DQFFC(XorInput, CLK, Clear; TNode; 30,30,6,6,13,13,30,30,0,0,30,30,6,6,13,13,30,30,0,0);
   BUF(TNode; Outpin; 0,0,0,0);
   BUF(TNode; FeedBack; 0,0,0,0);
 %END;
%MACEND;

LOR8(%SF6440, %FF3200, L1);
LOR8(%SF6445, %FF3600, L2);
LOR8(%SF6450, %FF4000, L3);
LOR8(%SF6455, %FF4400, L4);
LOR8(%SF6460, %FF4800, L5);
LOR8(%SF6465, %FF5200, L6);
LOR8(%SF6470, %FF5600, L7);
LOR8(%SF6475, %FF6000, L8);
LOR8(%SF6435, %FF2800, L9);
LOR8(%SF6430, %FF2400, L10);
LOR8(%SF6425, %FF2000, L11);
LOR8(%SF6420, %FF1600, L12);
LOR8(%SF6415, %FF1200, L13);
LOR8(%SF6410, %FF800, L14);
LOR8(%SF6405, %FF400, L15);
LOR8(%SF6400, %FF00, L16);

EP600(%SF6441, %SF3560, L1, P3, L17, %FF3560, N1, N17, N33, %FF3520, L33, N65, P1);
EP600(%SF6446, %SF3960, L2, P4, L18, %FF3960, N2, N18, N34, %FF3920, L34, N66, P1);
EP600(%SF6451, %SF4360, L3, P5, L19, %FF4360, N3, N19, N35, %FF4320, L35, N67, P1);
EP600(%SF6456, %SF4760, L4, P6, L20, %FF4760, N4, N20, N36, %FF4720, L36, N68, P1);
EP600(%SF6461, %SF5160, L5, P7, L21, %FF5160, N5, N21, N37, %FF5120, L37, N69, P1);
EP600(%SF6466, %SF5560, L6, P8, L22, %FF5560, N6, N22, N38, %FF5520, L38, N70, P1);
EP600(%SF6471, %SF5960, L7, P9, L23, %FF5960, N7, N23, N39, %FF5920, L39, N71, P1);
EP600(%SF6476, %SF6360, L8, P10, L24, %FF6360, N8, N24, N40, %FF6320, L40, N72, P1);
EP600(%SF6436, %SF3160, L9, P15, L25, %FF3160, N9, N25, N41, %FF3120, L41, N73, P13);
EP600(%SF6431, %SF2760, L10, P16, L26, %FF2760, N10, N26, N42, %FF2720, L42, N74, P13);
EP600(%SF6426, %SF2360, L11, P17, L27, %FF2360, N11, N27, N43, %FF2320, L43, N75, P13);
EP600(%SF6421, %SF1960, L12, P18, L28, %FF1960, N12, N28, N44, %FF1920, L44, N76, P13);
EP600(%SF6416, %SF1560, L13, P19, L29, %FF1560, N13, N29, N45, %FF1520, L45, N77, P13);
EP600(%SF6411, %SF1160, L14, P20, L30, %FF1160, N14, N30, N46, %FF1120, L46, N78, P13);
EP600(%SF6406, %SF760, L15, P21, L31, %FF760, N15, N31, N47, %FF720, L47, N79, P13);
EP600(%SF6401, %SF360, L16, P22, L32, %FF360, N16, N32, N48, %FF320, L48, N80, P13);
%EndModel