Exerpts from 'The BIOS Companion'
The book that should come with your motherboard!
"Invaluable...." Jerry Pournelle, Byte Magazine.
Here are some extracts from The BIOS Companion, which covers all the BIOS and Advanced Chipset settings you ever questioned the meaning of, up to Pentium® class machines, including PCI.
It contains over 390 pages, and is updated approximately every 6 months.
Subjects covered include:
There is also much background knowledge about PC performance to help you make the best of what you've got, and to help make sense of it all (yes, really!).
The BIOS
The instructions that turn a PC into a useful machine come in three stages; application programs, which are loaded by DOS, and DOS, which in turn is loaded by a bootstrap loader included in the BIOS.BIOS stands for Basic Input/Output System, of which there are several in a PC; a good example is the video BIOS which controls the interface between the video card and the computer. However, we are concerned with the System BIOS, which is a collection of assembly language routines that allow programs and the components of a PC to communicate with each other at the hardware level. It therefore works in two directions and is active all the time your computer is switched on, although these days it is bypassed by almost everything, typically anything 32-bit in Windows. Software doesn't have to talk to a device directly; it calls a BIOS routine which does the job instead. Think of the BIOS as a mini operating system.
On an IBM-compatible, you will find the BIOS embedded into a ROM on the motherboard, together with hard disk utilities and a CMOS setup program, although this will depend on the manufacturer. The ROM will usually occupy a 64K segment of upper memory at F000 if you have an ISA system, and a 128K segment starting at E000 with EISA. Older machines will have two ROMs, labelled Odd and Even, or High and Low (they must be in the right slots), but these days there tends to be only one - look for one with a printed label.
As well as ROM space, the BIOS will take 256 bytes of low memory for use as a BIOS data area, which will contain details about the Num Lock state, keyboard buffer and the like. DOS loads higher than this, so it's quite safe.
There are several types of BIOS because there are so many computers which need to be IBM-compatible; they're not allowed to copy each other, for obvious reasons. The BIOS worries about all the differences and presents a standard frontage to DOS, in the same way that DOS takes care of operating the computer and provides a standard interface for application programs.
PC and motherboard manufacturers used to make their own BIOSes, and many still do (such as Compaq or Chips and Technologies), but most tend to be based on code supplied by third party companies, the most well-known of which are Phoenix, Award, Quadtel, Microids Research and American Megatrends (AMI). The later AMI, Award, Phoenix or MR BIOSes, however, are probably the only ones that allow you past the standard CMOS setup.
Utilities
Many helpful utilities come with the BIOS, particularly diagnostic and low-level format routines for the hard disk.The main menu to the BIOS setup may contain the following heading:
HARD DISK UTILITY
It allows you to low-level format the drive attached to your computer.
DO NOT USE IT TO LOW LEVEL FORMAT AN IDE DISK!
Base I/O Address
I/O addresses (I/O = Input/Output) act as "mailboxes", where messages or data can be passed between programs and components; they are 1-byte wide openings in memory, also expressed in hexadecimal. On a 386, there are 65,536, most of which are never used.The Base I/O Address is the first of a range of addresses rather than a single one; for example, most network adapters use a range of 20h, so 360h really means 360h-37Fh (in which case watch for LPT 1, whose base is 378). Additionally, COM 1 reserves a range of addresses from 3F8h to 3FFh, which are used for various tasks, like setting up speed, parity, etc. The I/O address table is 00- FFFFh.
You can still get a conflict even when addresses appear to be different, because the cards may think in hexadecimal, when their drivers don't! They may resolve them in binary format, and from right to left (we read hex from left to right). Sound cards suffer from this in particular. In addition, most I/O cards only decode the lower 10 address lines; few use all 16, which is why some S3 video cards get confused with COM4; as far as the lower 10 address lines are concerned, they're in the same place!
For example, 220h (standard Sound Blaster setting) converts to 10 0010 0000 in binary. If you have a card set at 2A20, the first 10 binary digits are the same as 220 (10 1010 0010 0000 right to left, remember), so it won't work. The same goes for the following:
Hex Binary 220 10 0010 0000 0A20 1010 0010 0000 0E20 1110 0010 0000 1A20 1 1010 0010 0000 1E20 1 1110 0010 0000 2A20 10 1010 0010 0000 2E20 10 1110 0010 0000 3A20 11 1010 0010 0000
Fast Gate A20 Option
(or Turbo Switch Function) determines how memory gate A20 is used to access memory above 1 Mb, which is usually handled through the keyboard controller chip (the 8042 or 8742).The 8088 in the original PC would wrap around to lowest memory when it got to 1 Mb. The 286 would wrap around at 16 Mb, as it had more address lines. To allow older programs to operate, an AND Gate was installed on CPU address line 20 that could switch to allow either wraparound to 1 Mb or access to the 16 Mb address space. A spare pin on the keyboard controller was used to control the gate, either through the BIOS or with software that knew about it (the keyboard controller is a computer in its own right, and it had some spare programming space as well as a spare pin that could be used for stuff that was left out of the 286).
Programs such as Windows and OS/2 enter and shut down through the BIOS, so Gate A20 needs to be continually enabled and disabled, at the same time as another command to reset the CPU into the required mode is sent.
Enabling this gives you the best Windows performance, as a faster method of switching is used in place of using the (slower) keyboard controller, using I/O ports, to optimise the sending of the two commands required; the Fast Gate A20 sequence is generated by writing D1h to port 64h, and data 02h to port 60h. The fast CPU warm reset is generated when a port 64h write cycle with data FEh is decoded.
You will notice very little difference if all your programs operate inside conventional memory (that is, under DOS). However, this may cause Multiuser DOS not to boot. If you get keyboard errors, enable this.
One problem can occur with this option in AMI BIOSes dated 2/2/91 and later; it doesn't always work with the DOS 5.00 version of himem.sys. If you get an error message, disable this setting. If the error persists, there is a physical problem with the Gate A20 logic, part of which is contained in the keyboard BIOS chip, in which case try changing this chip.
This is nothing to do with the Turbo switch on the front of the computer; The alternative heading could be Turbo Switching Function.
Gate A20 Emulation
As for Fast Gate A20 Option, but you get the choice of Keyboard Controller (if disabled) or Chipset, which is faster. This is for programs that use BIOS calls or I/O ports 60/64H for A20 operations, where the chipset will intercept those commands and emulate the keyboard controller to allow the generation of the relevant signals (see above). The sequence is to write D1h to port 64h, followed by an I/O write to 60h with 00h. A fast reset is an I/O write to 64h with 1111XXX0b. Fast means that the A20 gate is controlled by I/O port 92H where programs use BIOS calls. Both means Gate A20 is controlled by the keyboard controller and chipset where programs use I/O port 60/64H.
Password Checking Option
Allows you to set up a password to be used during the computer's startup sequence. The options are:
You can still boot from a floppy and alter the settings with a diagnostic program, though.
You get three attempts to enter the correct password, after which the system will have to be rebooted. The default is usually the manufacturer's initials (try ami), or biostar or AWARD_SW for Award, but if this doesn't work, or you forget your own password, you must discharge the CMOS RAM. One way to do this is simply to wait for five years until the battery discharges (ten if you've got a Dallas)! Alternatively, you could remove the CMOS chip or the battery and just hang on for twenty minutes or so. Look for the chips mentioned below, under Clearing Chips.
Note: When CMOS RAM loses power, a bit is set which indicates this to the BIOS during the POST test. As a result, you will normally get slightly more aggressive default values.
If your battery is soldered in, you could discharge it enough so the CMOS loses power, but make sure it is rechargeable so you can get it up to speed again. To do this, connect a small resistor (say 39 ohms) across the battery and leave it for about half an hour. Some motherboards use a jumper for discharging the CMOS; it may be marked CMOS DRAIN. Sometimes (depending on the motherboard), you can connect P15 of the keyboard controller (pin 32, usually) to GND and switch the machine on. This makes the POST run, which deletes the password after one diagnostic test. Then reboot.
Very much a last resort is to get a multimeter and set it to a low resistance check (i.e. 4 ohms), place one probe on pin 1 of the chip concerned, and draw the other over the other pins. This will shock out the chip and scramble its brains. This is not for the faint hearted, and only for the desperate<197>use a paperclip or desolder the battery first! We assume no responsibility for damage!
Clearing Chips
The CMOS can mostly be cleared by shorting together appropriate pins with something like a bent paperclip (do this with the power off!). You could try a debug script if you are able to boot:DEBUG - o 70 2E - o 71 FF - qThe CMOS RAM is often incorporated into larger chips:P82C206 (Square). Also contains 2 DMA controllers, 2 Interrupt controllers, Timer, and RTC (Real-Time Clock). It is usually marked CHIPS, because it is made by Chips and Technologies.
Clear by shorting together pins 12 nd 32 on the bottom edge or pins 74 and 75 on the upper left corner.
F82C206 (Rectangular). Usually marked OPTi (the manufacturer). Also contains 2 DMA Controllers, 2 Interrupt Controllers, Timer, and Real-time Clock.
Clear by shorting together pins 3 and 26 on the bottom edge (third pin in from left and 5th pin from right).
Dallas DS1287, DS1287A, Benchmarq bp3287MT, bq3287AMT.
The Dallas DS1287 and Dallas DS1287A, and the compatible Benchmarq bp3287MT and bq3287AMT chips have a built-in battery, which should last up to 10 years; there should not be another battery on the motherboard.
Clear the 1287A and 3287AMT chips by shorting pins 12 and 21. You cannot clear the 1287 (and 3287MT). In this case, replace the chip (but make sure it is a 1287A!).
Although these are 24-pin chips, the Dallas chips may be missing 5, which are unused anyway.
Motorola MC146818AP or compatible. A rectangular 24-pin DIP chip, usually in a socket, found on older machines. Compatibles are made by several manufacturers including Hitachi (HD146818AP) and Samsung (KS82C6818A), but the number on the chip should end in 6818.
Although it is pin-compatible with the Dallas 1287/1287A, there is no built-in battery, which means it can be cleared by just removing it from the socket for a few seconds and replacing it, but shorting pins 12 and 24 is a safer option.
Dallas DS12885S or Benchmarq bq3258S. Clear by shorting pins 12 and 20, on diagonally opposite corners; lower right and upper left. (try also pins 12 and 24).
One other point, if you have a foreign keyboard (that is, outside the United States) - the computer expects to see a USA keyboard until your keyboard driver is loaded, so DON'T use anything in your password that is not in the USA keyboard!
Advanced Chipset Setup
What you can do here depends on what facilities the motherboard manufacturer decides to supply you with when you want to program the chipset registersit is not information used by the BIOS, but by the chipset. All the BIOS manufacturer has done is provide a screen so you can make your changes. Bear in mind that the items in this area are actually provided for debugging purposes or to provide some level of tolerance for older expansion cards and slow memory chips; you alter the settings to help the machine cope with them. What one motherboard doesn't like is not necessarily wrong on another, so experiment! For Pentium®s, it's usually best to set the defaults; what you might gain in performance, you often lose in floppy access!There is a program called amisetup, written by Robert Muchsel, which interrogates your Chipset settings at a very deep level, often allowing you to tweak settings not displayed. The shareware version can be downloaded from the MCCS BBS in Singen/Germany, on (49) 7731 69523 (use GAST as a username). It's on CIX or Compuserve as well.
Decoupled Refresh Option
When this is disabled, the CPU (a 486) sends refresh signals to system RAM and the ISA bus; the latter takes longer because it's running slower. Enabling this allows the ISA bus refresh to finish while the CPU gets on with another instruction.The problem is that some expansion cards (particularly video cards) need to have the CPU handle the first bus refresh cycle. Disable this if you get random characters or snowy pictures during high resolution graphics modes (you may need to disable Memory Relocation as well), albeit with the loss of a little performance. This is especially true with S3 801 boards (such as the SPEA V7 Mirage) coupled with Adaptec C cards and Bs fitted with enhanced ROMs for drives greater than 1 Gb.
AT Cycle Wait State
This figure represents the number of wait states inserted before an operation is performed on the AT bus. The effect is to lengthen the I/O cycle for expansion cards that have a tight tolerance on speed, such as high-end graphics cards. Again, for expansion cards with special requirements (you may get separate options for 16- bit and 8-bit transfers). The higher the delay in bus timing, the slower your system will run; you will also need to set a higher DMA wait state.To avoid confusion, a private message is sent along the data bus for 16-bit cards, before data is sent. The high part of the target address is sent out first, so that 16-bit cards are alerted as to where instructions are headed. As these are sent out over the extra 4 address lines on the extended bus (20-23), the only information the cards really get is which of the 16 possible megabytes is the destination, so three of the original 8-bit lines are duplicated (17-19), which narrows it down to the nearest 128K.
Once a card decides that the message is for itself, it places a signal on MEMCS16, a line on the extended bus, which triggers a 16-bit signal transfer. Without such a signal, the message is sent as 8-bit.
When the CPU sees MEMCS16, it assumes the current access will be to a 16-bit device, and begins to assemble data so any mismatches are transparent to the CPU and adapter card.
The trouble is that there's no specification governing the amount of time between the advance notice and the actual transfer, and some cards don't request 16-bit transfers fast enough, so it gets its data as 8-bit, hence confusion, and the need for wait states. VGA cards have the ability to switch into 8-bit mode automatically, but many others don't.
AT Bus Clock Source
The clock is responsible for the speed at which numbers are crunched and instructions executed. It results in an electrical signal that switches constantly between high and low voltage several million times a second.The System Clock, or CLKIN, is the frequency used by the processor; on 286s and 386s, this will be half the speed of the main crystal on the motherboard (the CPU divides it by two). 486 processors run at the same speed as the motherboard. A clock generator chip (82284 or similar) is used to synchronise timing signals around the computer, and the data bus would be run at a slower speed synchronously with the CPU, e.g. CLKIN/4 for an ISA bus with a 33 MHz CPU.
ATCLK is a separate clock for the bus, used when the bus is run asynchronously. There is also a 14.138 MHz crystal which was used for all system timing on XTs. Now it's only used for the colour frequency of the video controller (6845).
The AT bus clock is an output clock for the I/O channel. This setting allows you to change the access speed of the (ISA) bus, which should be somewhere between 6-8.33 MHz to be compatible with AT specifications (not that any were officially issued), so if your motherboard is running at 33 MHz, divide this by 4 (CLKIN/4). Similarly, divide 40 MHz by 5. Choosing Autosync sets this item based on the CPU clock speed. Only valid when Auto Config is disabled.
Single ALE Enable
If enabled, single instead of multiple ALEs (see below) will be activated during data bus access cycles. Yes is compatible with AT bus specifications. This option sometimes appears in older BIOSes as Quick Mode. May slow the video if enabled.ALE stands for Address Latch Enable, a signal used by 808x processors while moving data inside the memory map; it is used by DMA controllers to tell the CPU it can move data along the data bus. Conversely, they can stop this signal and make the CPU wait while data is moved by the controller, so set to No for normal use.
E0000 ROM belongs to AT BUS
Officially, the E000 area of upper memory is reserved for System BIOS code, together with F000, but many machines don't use it, so E000 can often be used for other purposes (note, however, that this 64K is needed to run protected mode software, such as OS/2, which loads Advanced BIOS code into E000-EFFF).This determines whether access to the E area of upper memory is directed to the system board, or to the AT bus. Set to Yes if you want to use the E000 area for anything (e.g. a page frame), or if you're using Multiuser DOS and want the maximum TPA to be available. Can also turn up as E000 ROM Addressable.
IDE Multi-Block Mode
Enables suitably configured IDE hard drives to transfer multiple sectors (there may be an option to specify the number of sectors). There are several modes available, often dependent on the size of your hard disk cache:
Wrongly set, this one can mess up comms software when up or downloading, because multi block transfers cannot be interrupted, and you may lose characters. For example, you need to run Telix with the D option (e.g. drop DTR when writing to disk), or make sure you use buffered UARTS for terminals with Multiuser DOS. Consider also disabling Smartdrive.
Cache Read Hit Burst
Burst Mode is a 486 function for optimising memory fetches if you need to go off-chip, which works by reading groups of four double-words in quick succession, hence burst. The first cycle has to cope with the start address as well as its data, so it takes the longest (the other three addresses are deduced). 4 32-bit words therefore move in only 5 cycles, as opposed to 8 (or maybe 9). For this, you need fast RAM capable of Page Mode.This setting determines the number of cycle times to be inserted when the CPU reads data from the external (level 2) cache, when it can't catch up with the CPU. The Secondary Cache Read Hit can be set to 2-1-1-1, 3-1-1-1, 2-2-2-2 or 3-2-2-2 (3-1-1-1 means the first 32-bit word (leadoff) needs three clock cycles and the remainder need one).
Performance is affected most by the first value; the lower the better; 2-1-1-1 is fastest. You can alter it with the Cache Read Hit 1st Cycle WS setting.
The fastest burst timing is 3-1-1-1, for some 33 MHz systems, but this can depend on the size of the cache available. For example, the setting for 33 MHz may need to be changed to 3-2-2-2 if you only have 128K.
Pentium®s can perform Burst Writes as well as Burst Reads, so you might have a separate selection for these. 4-1-1-1 is usually recommended.