RISC

A Reduced Instruction Set Computer is an architecture that reduces complexity by using simpler instructions. RISC compilers generate software routines to perform complex instructions that were previously done in hardware by CISC computers. In RISC, the microcode layer and associated overhead is eliminated.

In most cases, the RISC chip is faster than its CISC counterpart and is designed and built more economically. The Alpha processor is an example of a RISC architecture.