====== TX-0 upgraded system (8 kWords of RAM) (1962) ======
===== History and Trivia =====
After its transfer from the MIT Lincoln Laboratory in July 1958, the TX-0 was supported by the MIT Research Laboratory of Electronics, the MIT Electronic Systems Laboratory and the MIT Electrical Engineering Department.
A so-called Extended Input/Output System was installed soon after the transfer it enabled users to add custom I/O devices relatively easily.
The TX-0 originally had a 64kw memory matrix, which had been transferred to the TX-2 and replaced with a 4kw matrix in the spring of 1958; this 4kw matrix was extended to 8 kw in 1959.
Since the address size was reduced from 16 to 13 bits, more bits were available for instruction opcodes (5 instead of 2): the instruction set was subsequently extended from 4 instructions to 23. The first three additional instructions, which required little processor changes, were implemented in 1959; the logical design for the other instructions was completed in 1960, and was implemented
from 1960 to 1962. Also, a magnetic tape system was added in 1961.
There were projects for further expansion (e.g. timesharing system), but after the PDP-1 arrived at the MIT, further development on the TX-0 was stopped.
The TX-0 remained in operation at the MIT until 1975, at which point it was transfered to the Computer Museum set-up by DEC in Marlborough, Massachusetts.
Though the upgrades were designed not to break compatibility, only programs that use 8 kw of RAM and the 4 original instructions may run on both the 8kw model and the 64kw model. (Even so, there are changes in the microprogrammed operate instruction that may prevent programs to run on both models). At the time of writing, all available programs were designed specifically for the later 8 kw model.
===== Links =====
* Tape images of TX-0 -- http://www.bitsavers.org/bits/MIT/tx-0//
* Information of TX-0 on bitsavers.org -- http://www.bitsavers.org/pdf/mit/tx-0//
Generated on Sun Jul 19 10:17:28 2009